1/* 2 * Copyright 2008 Analog Devices Inc. 3 * 4 * Licensed under the GPL-2 or later. 5 */ 6 7#ifndef _CDEF_BF547_H 8#define _CDEF_BF547_H 9 10/* include all Core registers and bit definitions */ 11#include "defBF547.h" 12 13/* include core sbfin_read_()ecific register pointer definitions */ 14#include <asm/cdef_LPBlackfin.h> 15 16/* SYSTEM & MMR ADDRESS DEFINITIONS FOR ADSP-BF547 */ 17 18/* include cdefBF54x_base.h for the set of #defines that are common to all ADSP-BF54x bfin_read_()rocessors */ 19#include "cdefBF54x_base.h" 20 21/* The following are the #defines needed by ADSP-BF547 that are not in the common header */ 22 23/* Timer Registers */ 24 25#define bfin_read_TIMER8_CONFIG() bfin_read16(TIMER8_CONFIG) 26#define bfin_write_TIMER8_CONFIG(val) bfin_write16(TIMER8_CONFIG, val) 27#define bfin_read_TIMER8_COUNTER() bfin_read32(TIMER8_COUNTER) 28#define bfin_write_TIMER8_COUNTER(val) bfin_write32(TIMER8_COUNTER, val) 29#define bfin_read_TIMER8_PERIOD() bfin_read32(TIMER8_PERIOD) 30#define bfin_write_TIMER8_PERIOD(val) bfin_write32(TIMER8_PERIOD, val) 31#define bfin_read_TIMER8_WIDTH() bfin_read32(TIMER8_WIDTH) 32#define bfin_write_TIMER8_WIDTH(val) bfin_write32(TIMER8_WIDTH, val) 33#define bfin_read_TIMER9_CONFIG() bfin_read16(TIMER9_CONFIG) 34#define bfin_write_TIMER9_CONFIG(val) bfin_write16(TIMER9_CONFIG, val) 35#define bfin_read_TIMER9_COUNTER() bfin_read32(TIMER9_COUNTER) 36#define bfin_write_TIMER9_COUNTER(val) bfin_write32(TIMER9_COUNTER, val) 37#define bfin_read_TIMER9_PERIOD() bfin_read32(TIMER9_PERIOD) 38#define bfin_write_TIMER9_PERIOD(val) bfin_write32(TIMER9_PERIOD, val) 39#define bfin_read_TIMER9_WIDTH() bfin_read32(TIMER9_WIDTH) 40#define bfin_write_TIMER9_WIDTH(val) bfin_write32(TIMER9_WIDTH, val) 41#define bfin_read_TIMER10_CONFIG() bfin_read16(TIMER10_CONFIG) 42#define bfin_write_TIMER10_CONFIG(val) bfin_write16(TIMER10_CONFIG, val) 43#define bfin_read_TIMER10_COUNTER() bfin_read32(TIMER10_COUNTER) 44#define bfin_write_TIMER10_COUNTER(val) bfin_write32(TIMER10_COUNTER, val) 45#define bfin_read_TIMER10_PERIOD() bfin_read32(TIMER10_PERIOD) 46#define bfin_write_TIMER10_PERIOD(val) bfin_write32(TIMER10_PERIOD, val) 47#define bfin_read_TIMER10_WIDTH() bfin_read32(TIMER10_WIDTH) 48#define bfin_write_TIMER10_WIDTH(val) bfin_write32(TIMER10_WIDTH, val) 49 50/* Timer Groubfin_read_() of 3 */ 51 52#define bfin_read_TIMER_ENABLE1() bfin_read16(TIMER_ENABLE1) 53#define bfin_write_TIMER_ENABLE1(val) bfin_write16(TIMER_ENABLE1, val) 54#define bfin_read_TIMER_DISABLE1() bfin_read16(TIMER_DISABLE1) 55#define bfin_write_TIMER_DISABLE1(val) bfin_write16(TIMER_DISABLE1, val) 56#define bfin_read_TIMER_STATUS1() bfin_read32(TIMER_STATUS1) 57#define bfin_write_TIMER_STATUS1(val) bfin_write32(TIMER_STATUS1, val) 58 59/* SPORT0 Registers */ 60 61#define bfin_read_SPORT0_TCR1() bfin_read16(SPORT0_TCR1) 62#define bfin_write_SPORT0_TCR1(val) bfin_write16(SPORT0_TCR1, val) 63#define bfin_read_SPORT0_TCR2() bfin_read16(SPORT0_TCR2) 64#define bfin_write_SPORT0_TCR2(val) bfin_write16(SPORT0_TCR2, val) 65#define bfin_read_SPORT0_TCLKDIV() bfin_read16(SPORT0_TCLKDIV) 66#define bfin_write_SPORT0_TCLKDIV(val) bfin_write16(SPORT0_TCLKDIV, val) 67#define bfin_read_SPORT0_TFSDIV() bfin_read16(SPORT0_TFSDIV) 68#define bfin_write_SPORT0_TFSDIV(val) bfin_write16(SPORT0_TFSDIV, val) 69#define bfin_read_SPORT0_TX() bfin_read32(SPORT0_TX) 70#define bfin_write_SPORT0_TX(val) bfin_write32(SPORT0_TX, val) 71#define bfin_read_SPORT0_RX() bfin_read32(SPORT0_RX) 72#define bfin_write_SPORT0_RX(val) bfin_write32(SPORT0_RX, val) 73#define bfin_read_SPORT0_RCR1() bfin_read16(SPORT0_RCR1) 74#define bfin_write_SPORT0_RCR1(val) bfin_write16(SPORT0_RCR1, val) 75#define bfin_read_SPORT0_RCR2() bfin_read16(SPORT0_RCR2) 76#define bfin_write_SPORT0_RCR2(val) bfin_write16(SPORT0_RCR2, val) 77#define bfin_read_SPORT0_RCLKDIV() bfin_read16(SPORT0_RCLKDIV) 78#define bfin_write_SPORT0_RCLKDIV(val) bfin_write16(SPORT0_RCLKDIV, val) 79#define bfin_read_SPORT0_RFSDIV() bfin_read16(SPORT0_RFSDIV) 80#define bfin_write_SPORT0_RFSDIV(val) bfin_write16(SPORT0_RFSDIV, val) 81#define bfin_read_SPORT0_STAT() bfin_read16(SPORT0_STAT) 82#define bfin_write_SPORT0_STAT(val) bfin_write16(SPORT0_STAT, val) 83#define bfin_read_SPORT0_CHNL() bfin_read16(SPORT0_CHNL) 84#define bfin_write_SPORT0_CHNL(val) bfin_write16(SPORT0_CHNL, val) 85#define bfin_read_SPORT0_MCMC1() bfin_read16(SPORT0_MCMC1) 86#define bfin_write_SPORT0_MCMC1(val) bfin_write16(SPORT0_MCMC1, val) 87#define bfin_read_SPORT0_MCMC2() bfin_read16(SPORT0_MCMC2) 88#define bfin_write_SPORT0_MCMC2(val) bfin_write16(SPORT0_MCMC2, val) 89#define bfin_read_SPORT0_MTCS0() bfin_read32(SPORT0_MTCS0) 90#define bfin_write_SPORT0_MTCS0(val) bfin_write32(SPORT0_MTCS0, val) 91#define bfin_read_SPORT0_MTCS1() bfin_read32(SPORT0_MTCS1) 92#define bfin_write_SPORT0_MTCS1(val) bfin_write32(SPORT0_MTCS1, val) 93#define bfin_read_SPORT0_MTCS2() bfin_read32(SPORT0_MTCS2) 94#define bfin_write_SPORT0_MTCS2(val) bfin_write32(SPORT0_MTCS2, val) 95#define bfin_read_SPORT0_MTCS3() bfin_read32(SPORT0_MTCS3) 96#define bfin_write_SPORT0_MTCS3(val) bfin_write32(SPORT0_MTCS3, val) 97#define bfin_read_SPORT0_MRCS0() bfin_read32(SPORT0_MRCS0) 98#define bfin_write_SPORT0_MRCS0(val) bfin_write32(SPORT0_MRCS0, val) 99#define bfin_read_SPORT0_MRCS1() bfin_read32(SPORT0_MRCS1) 100#define bfin_write_SPORT0_MRCS1(val) bfin_write32(SPORT0_MRCS1, val) 101#define bfin_read_SPORT0_MRCS2() bfin_read32(SPORT0_MRCS2) 102#define bfin_write_SPORT0_MRCS2(val) bfin_write32(SPORT0_MRCS2, val) 103#define bfin_read_SPORT0_MRCS3() bfin_read32(SPORT0_MRCS3) 104#define bfin_write_SPORT0_MRCS3(val) bfin_write32(SPORT0_MRCS3, val) 105 106/* EPPI0 Registers */ 107 108#define bfin_read_EPPI0_STATUS() bfin_read16(EPPI0_STATUS) 109#define bfin_write_EPPI0_STATUS(val) bfin_write16(EPPI0_STATUS, val) 110#define bfin_read_EPPI0_HCOUNT() bfin_read16(EPPI0_HCOUNT) 111#define bfin_write_EPPI0_HCOUNT(val) bfin_write16(EPPI0_HCOUNT, val) 112#define bfin_read_EPPI0_HDELAY() bfin_read16(EPPI0_HDELAY) 113#define bfin_write_EPPI0_HDELAY(val) bfin_write16(EPPI0_HDELAY, val) 114#define bfin_read_EPPI0_VCOUNT() bfin_read16(EPPI0_VCOUNT) 115#define bfin_write_EPPI0_VCOUNT(val) bfin_write16(EPPI0_VCOUNT, val) 116#define bfin_read_EPPI0_VDELAY() bfin_read16(EPPI0_VDELAY) 117#define bfin_write_EPPI0_VDELAY(val) bfin_write16(EPPI0_VDELAY, val) 118#define bfin_read_EPPI0_FRAME() bfin_read16(EPPI0_FRAME) 119#define bfin_write_EPPI0_FRAME(val) bfin_write16(EPPI0_FRAME, val) 120#define bfin_read_EPPI0_LINE() bfin_read16(EPPI0_LINE) 121#define bfin_write_EPPI0_LINE(val) bfin_write16(EPPI0_LINE, val) 122#define bfin_read_EPPI0_CLKDIV() bfin_read16(EPPI0_CLKDIV) 123#define bfin_write_EPPI0_CLKDIV(val) bfin_write16(EPPI0_CLKDIV, val) 124#define bfin_read_EPPI0_CONTROL() bfin_read32(EPPI0_CONTROL) 125#define bfin_write_EPPI0_CONTROL(val) bfin_write32(EPPI0_CONTROL, val) 126#define bfin_read_EPPI0_FS1W_HBL() bfin_read32(EPPI0_FS1W_HBL) 127#define bfin_write_EPPI0_FS1W_HBL(val) bfin_write32(EPPI0_FS1W_HBL, val) 128#define bfin_read_EPPI0_FS1P_AVPL() bfin_read32(EPPI0_FS1P_AVPL) 129#define bfin_write_EPPI0_FS1P_AVPL(val) bfin_write32(EPPI0_FS1P_AVPL, val) 130#define bfin_read_EPPI0_FS2W_LVB() bfin_read32(EPPI0_FS2W_LVB) 131#define bfin_write_EPPI0_FS2W_LVB(val) bfin_write32(EPPI0_FS2W_LVB, val) 132#define bfin_read_EPPI0_FS2P_LAVF() bfin_read32(EPPI0_FS2P_LAVF) 133#define bfin_write_EPPI0_FS2P_LAVF(val) bfin_write32(EPPI0_FS2P_LAVF, val) 134#define bfin_read_EPPI0_CLIP() bfin_read32(EPPI0_CLIP) 135#define bfin_write_EPPI0_CLIP(val) bfin_write32(EPPI0_CLIP, val) 136 137/* UART2 Registers */ 138 139#define bfin_read_UART2_DLL() bfin_read16(UART2_DLL) 140#define bfin_write_UART2_DLL(val) bfin_write16(UART2_DLL, val) 141#define bfin_read_UART2_DLH() bfin_read16(UART2_DLH) 142#define bfin_write_UART2_DLH(val) bfin_write16(UART2_DLH, val) 143#define bfin_read_UART2_GCTL() bfin_read16(UART2_GCTL) 144#define bfin_write_UART2_GCTL(val) bfin_write16(UART2_GCTL, val) 145#define bfin_read_UART2_LCR() bfin_read16(UART2_LCR) 146#define bfin_write_UART2_LCR(val) bfin_write16(UART2_LCR, val) 147#define bfin_read_UART2_MCR() bfin_read16(UART2_MCR) 148#define bfin_write_UART2_MCR(val) bfin_write16(UART2_MCR, val) 149#define bfin_read_UART2_LSR() bfin_read16(UART2_LSR) 150#define bfin_write_UART2_LSR(val) bfin_write16(UART2_LSR, val) 151#define bfin_read_UART2_MSR() bfin_read16(UART2_MSR) 152#define bfin_write_UART2_MSR(val) bfin_write16(UART2_MSR, val) 153#define bfin_read_UART2_SCR() bfin_read16(UART2_SCR) 154#define bfin_write_UART2_SCR(val) bfin_write16(UART2_SCR, val) 155#define bfin_read_UART2_IER_SET() bfin_read16(UART2_IER_SET) 156#define bfin_write_UART2_IER_SET(val) bfin_write16(UART2_IER_SET, val) 157#define bfin_read_UART2_IER_CLEAR() bfin_read16(UART2_IER_CLEAR) 158#define bfin_write_UART2_IER_CLEAR(val) bfin_write16(UART2_IER_CLEAR, val) 159#define bfin_read_UART2_RBR() bfin_read16(UART2_RBR) 160#define bfin_write_UART2_RBR(val) bfin_write16(UART2_RBR, val) 161 162/* Two Wire Interface Registers (TWI1) */ 163 164/* SPI2 Registers */ 165 166#define bfin_read_SPI2_CTL() bfin_read16(SPI2_CTL) 167#define bfin_write_SPI2_CTL(val) bfin_write16(SPI2_CTL, val) 168#define bfin_read_SPI2_FLG() bfin_read16(SPI2_FLG) 169#define bfin_write_SPI2_FLG(val) bfin_write16(SPI2_FLG, val) 170#define bfin_read_SPI2_STAT() bfin_read16(SPI2_STAT) 171#define bfin_write_SPI2_STAT(val) bfin_write16(SPI2_STAT, val) 172#define bfin_read_SPI2_TDBR() bfin_read16(SPI2_TDBR) 173#define bfin_write_SPI2_TDBR(val) bfin_write16(SPI2_TDBR, val) 174#define bfin_read_SPI2_RDBR() bfin_read16(SPI2_RDBR) 175#define bfin_write_SPI2_RDBR(val) bfin_write16(SPI2_RDBR, val) 176#define bfin_read_SPI2_BAUD() bfin_read16(SPI2_BAUD) 177#define bfin_write_SPI2_BAUD(val) bfin_write16(SPI2_BAUD, val) 178#define bfin_read_SPI2_SHADOW() bfin_read16(SPI2_SHADOW) 179#define bfin_write_SPI2_SHADOW(val) bfin_write16(SPI2_SHADOW, val) 180 181/* ATAPI Registers */ 182 183#define bfin_read_ATAPI_CONTROL() bfin_read16(ATAPI_CONTROL) 184#define bfin_write_ATAPI_CONTROL(val) bfin_write16(ATAPI_CONTROL, val) 185#define bfin_read_ATAPI_STATUS() bfin_read16(ATAPI_STATUS) 186#define bfin_write_ATAPI_STATUS(val) bfin_write16(ATAPI_STATUS, val) 187#define bfin_read_ATAPI_DEV_ADDR() bfin_read16(ATAPI_DEV_ADDR) 188#define bfin_write_ATAPI_DEV_ADDR(val) bfin_write16(ATAPI_DEV_ADDR, val) 189#define bfin_read_ATAPI_DEV_TXBUF() bfin_read16(ATAPI_DEV_TXBUF) 190#define bfin_write_ATAPI_DEV_TXBUF(val) bfin_write16(ATAPI_DEV_TXBUF, val) 191#define bfin_read_ATAPI_DEV_RXBUF() bfin_read16(ATAPI_DEV_RXBUF) 192#define bfin_write_ATAPI_DEV_RXBUF(val) bfin_write16(ATAPI_DEV_RXBUF, val) 193#define bfin_read_ATAPI_INT_MASK() bfin_read16(ATAPI_INT_MASK) 194#define bfin_write_ATAPI_INT_MASK(val) bfin_write16(ATAPI_INT_MASK, val) 195#define bfin_read_ATAPI_INT_STATUS() bfin_read16(ATAPI_INT_STATUS) 196#define bfin_write_ATAPI_INT_STATUS(val) bfin_write16(ATAPI_INT_STATUS, val) 197#define bfin_read_ATAPI_XFER_LEN() bfin_read16(ATAPI_XFER_LEN) 198#define bfin_write_ATAPI_XFER_LEN(val) bfin_write16(ATAPI_XFER_LEN, val) 199#define bfin_read_ATAPI_LINE_STATUS() bfin_read16(ATAPI_LINE_STATUS) 200#define bfin_write_ATAPI_LINE_STATUS(val) bfin_write16(ATAPI_LINE_STATUS, val) 201#define bfin_read_ATAPI_SM_STATE() bfin_read16(ATAPI_SM_STATE) 202#define bfin_write_ATAPI_SM_STATE(val) bfin_write16(ATAPI_SM_STATE, val) 203#define bfin_read_ATAPI_TERMINATE() bfin_read16(ATAPI_TERMINATE) 204#define bfin_write_ATAPI_TERMINATE(val) bfin_write16(ATAPI_TERMINATE, val) 205#define bfin_read_ATAPI_PIO_TFRCNT() bfin_read16(ATAPI_PIO_TFRCNT) 206#define bfin_write_ATAPI_PIO_TFRCNT(val) bfin_write16(ATAPI_PIO_TFRCNT, val) 207#define bfin_read_ATAPI_DMA_TFRCNT() bfin_read16(ATAPI_DMA_TFRCNT) 208#define bfin_write_ATAPI_DMA_TFRCNT(val) bfin_write16(ATAPI_DMA_TFRCNT, val) 209#define bfin_read_ATAPI_UMAIN_TFRCNT() bfin_read16(ATAPI_UMAIN_TFRCNT) 210#define bfin_write_ATAPI_UMAIN_TFRCNT(val) bfin_write16(ATAPI_UMAIN_TFRCNT, val) 211#define bfin_read_ATAPI_UDMAOUT_TFRCNT() bfin_read16(ATAPI_UDMAOUT_TFRCNT) 212#define bfin_write_ATAPI_UDMAOUT_TFRCNT(val) bfin_write16(ATAPI_UDMAOUT_TFRCNT, val) 213#define bfin_read_ATAPI_REG_TIM_0() bfin_read16(ATAPI_REG_TIM_0) 214#define bfin_write_ATAPI_REG_TIM_0(val) bfin_write16(ATAPI_REG_TIM_0, val) 215#define bfin_read_ATAPI_PIO_TIM_0() bfin_read16(ATAPI_PIO_TIM_0) 216#define bfin_write_ATAPI_PIO_TIM_0(val) bfin_write16(ATAPI_PIO_TIM_0, val) 217#define bfin_read_ATAPI_PIO_TIM_1() bfin_read16(ATAPI_PIO_TIM_1) 218#define bfin_write_ATAPI_PIO_TIM_1(val) bfin_write16(ATAPI_PIO_TIM_1, val) 219#define bfin_read_ATAPI_MULTI_TIM_0() bfin_read16(ATAPI_MULTI_TIM_0) 220#define bfin_write_ATAPI_MULTI_TIM_0(val) bfin_write16(ATAPI_MULTI_TIM_0, val) 221#define bfin_read_ATAPI_MULTI_TIM_1() bfin_read16(ATAPI_MULTI_TIM_1) 222#define bfin_write_ATAPI_MULTI_TIM_1(val) bfin_write16(ATAPI_MULTI_TIM_1, val) 223#define bfin_read_ATAPI_MULTI_TIM_2() bfin_read16(ATAPI_MULTI_TIM_2) 224#define bfin_write_ATAPI_MULTI_TIM_2(val) bfin_write16(ATAPI_MULTI_TIM_2, val) 225#define bfin_read_ATAPI_ULTRA_TIM_0() bfin_read16(ATAPI_ULTRA_TIM_0) 226#define bfin_write_ATAPI_ULTRA_TIM_0(val) bfin_write16(ATAPI_ULTRA_TIM_0, val) 227#define bfin_read_ATAPI_ULTRA_TIM_1() bfin_read16(ATAPI_ULTRA_TIM_1) 228#define bfin_write_ATAPI_ULTRA_TIM_1(val) bfin_write16(ATAPI_ULTRA_TIM_1, val) 229#define bfin_read_ATAPI_ULTRA_TIM_2() bfin_read16(ATAPI_ULTRA_TIM_2) 230#define bfin_write_ATAPI_ULTRA_TIM_2(val) bfin_write16(ATAPI_ULTRA_TIM_2, val) 231#define bfin_read_ATAPI_ULTRA_TIM_3() bfin_read16(ATAPI_ULTRA_TIM_3) 232#define bfin_write_ATAPI_ULTRA_TIM_3(val) bfin_write16(ATAPI_ULTRA_TIM_3, val) 233 234/* SDH Registers */ 235 236#define bfin_read_SDH_PWR_CTL() bfin_read16(SDH_PWR_CTL) 237#define bfin_write_SDH_PWR_CTL(val) bfin_write16(SDH_PWR_CTL, val) 238#define bfin_read_SDH_CLK_CTL() bfin_read16(SDH_CLK_CTL) 239#define bfin_write_SDH_CLK_CTL(val) bfin_write16(SDH_CLK_CTL, val) 240#define bfin_read_SDH_ARGUMENT() bfin_read32(SDH_ARGUMENT) 241#define bfin_write_SDH_ARGUMENT(val) bfin_write32(SDH_ARGUMENT, val) 242#define bfin_read_SDH_COMMAND() bfin_read16(SDH_COMMAND) 243#define bfin_write_SDH_COMMAND(val) bfin_write16(SDH_COMMAND, val) 244#define bfin_read_SDH_RESP_CMD() bfin_read16(SDH_RESP_CMD) 245#define bfin_write_SDH_RESP_CMD(val) bfin_write16(SDH_RESP_CMD, val) 246#define bfin_read_SDH_RESPONSE0() bfin_read32(SDH_RESPONSE0) 247#define bfin_write_SDH_RESPONSE0(val) bfin_write32(SDH_RESPONSE0, val) 248#define bfin_read_SDH_RESPONSE1() bfin_read32(SDH_RESPONSE1) 249#define bfin_write_SDH_RESPONSE1(val) bfin_write32(SDH_RESPONSE1, val) 250#define bfin_read_SDH_RESPONSE2() bfin_read32(SDH_RESPONSE2) 251#define bfin_write_SDH_RESPONSE2(val) bfin_write32(SDH_RESPONSE2, val) 252#define bfin_read_SDH_RESPONSE3() bfin_read32(SDH_RESPONSE3) 253#define bfin_write_SDH_RESPONSE3(val) bfin_write32(SDH_RESPONSE3, val) 254#define bfin_read_SDH_DATA_TIMER() bfin_read32(SDH_DATA_TIMER) 255#define bfin_write_SDH_DATA_TIMER(val) bfin_write32(SDH_DATA_TIMER, val) 256#define bfin_read_SDH_DATA_LGTH() bfin_read16(SDH_DATA_LGTH) 257#define bfin_write_SDH_DATA_LGTH(val) bfin_write16(SDH_DATA_LGTH, val) 258#define bfin_read_SDH_DATA_CTL() bfin_read16(SDH_DATA_CTL) 259#define bfin_write_SDH_DATA_CTL(val) bfin_write16(SDH_DATA_CTL, val) 260#define bfin_read_SDH_DATA_CNT() bfin_read16(SDH_DATA_CNT) 261#define bfin_write_SDH_DATA_CNT(val) bfin_write16(SDH_DATA_CNT, val) 262#define bfin_read_SDH_STATUS() bfin_read32(SDH_STATUS) 263#define bfin_write_SDH_STATUS(val) bfin_write32(SDH_STATUS, val) 264#define bfin_read_SDH_STATUS_CLR() bfin_read16(SDH_STATUS_CLR) 265#define bfin_write_SDH_STATUS_CLR(val) bfin_write16(SDH_STATUS_CLR, val) 266#define bfin_read_SDH_MASK0() bfin_read32(SDH_MASK0) 267#define bfin_write_SDH_MASK0(val) bfin_write32(SDH_MASK0, val) 268#define bfin_read_SDH_MASK1() bfin_read32(SDH_MASK1) 269#define bfin_write_SDH_MASK1(val) bfin_write32(SDH_MASK1, val) 270#define bfin_read_SDH_FIFO_CNT() bfin_read16(SDH_FIFO_CNT) 271#define bfin_write_SDH_FIFO_CNT(val) bfin_write16(SDH_FIFO_CNT, val) 272#define bfin_read_SDH_FIFO() bfin_read32(SDH_FIFO) 273#define bfin_write_SDH_FIFO(val) bfin_write32(SDH_FIFO, val) 274#define bfin_read_SDH_E_STATUS() bfin_read16(SDH_E_STATUS) 275#define bfin_write_SDH_E_STATUS(val) bfin_write16(SDH_E_STATUS, val) 276#define bfin_read_SDH_E_MASK() bfin_read16(SDH_E_MASK) 277#define bfin_write_SDH_E_MASK(val) bfin_write16(SDH_E_MASK, val) 278#define bfin_read_SDH_CFG() bfin_read16(SDH_CFG) 279#define bfin_write_SDH_CFG(val) bfin_write16(SDH_CFG, val) 280#define bfin_read_SDH_RD_WAIT_EN() bfin_read16(SDH_RD_WAIT_EN) 281#define bfin_write_SDH_RD_WAIT_EN(val) bfin_write16(SDH_RD_WAIT_EN, val) 282#define bfin_read_SDH_PID0() bfin_read16(SDH_PID0) 283#define bfin_write_SDH_PID0(val) bfin_write16(SDH_PID0, val) 284#define bfin_read_SDH_PID1() bfin_read16(SDH_PID1) 285#define bfin_write_SDH_PID1(val) bfin_write16(SDH_PID1, val) 286#define bfin_read_SDH_PID2() bfin_read16(SDH_PID2) 287#define bfin_write_SDH_PID2(val) bfin_write16(SDH_PID2, val) 288#define bfin_read_SDH_PID3() bfin_read16(SDH_PID3) 289#define bfin_write_SDH_PID3(val) bfin_write16(SDH_PID3, val) 290#define bfin_read_SDH_PID4() bfin_read16(SDH_PID4) 291#define bfin_write_SDH_PID4(val) bfin_write16(SDH_PID4, val) 292#define bfin_read_SDH_PID5() bfin_read16(SDH_PID5) 293#define bfin_write_SDH_PID5(val) bfin_write16(SDH_PID5, val) 294#define bfin_read_SDH_PID6() bfin_read16(SDH_PID6) 295#define bfin_write_SDH_PID6(val) bfin_write16(SDH_PID6, val) 296#define bfin_read_SDH_PID7() bfin_read16(SDH_PID7) 297#define bfin_write_SDH_PID7(val) bfin_write16(SDH_PID7, val) 298 299/* HOST Port Registers */ 300 301#define bfin_read_HOST_CONTROL() bfin_read16(HOST_CONTROL) 302#define bfin_write_HOST_CONTROL(val) bfin_write16(HOST_CONTROL, val) 303#define bfin_read_HOST_STATUS() bfin_read16(HOST_STATUS) 304#define bfin_write_HOST_STATUS(val) bfin_write16(HOST_STATUS, val) 305#define bfin_read_HOST_TIMEOUT() bfin_read16(HOST_TIMEOUT) 306#define bfin_write_HOST_TIMEOUT(val) bfin_write16(HOST_TIMEOUT, val) 307 308/* USB Control Registers */ 309 310#define bfin_read_USB_FADDR() bfin_read16(USB_FADDR) 311#define bfin_write_USB_FADDR(val) bfin_write16(USB_FADDR, val) 312#define bfin_read_USB_POWER() bfin_read16(USB_POWER) 313#define bfin_write_USB_POWER(val) bfin_write16(USB_POWER, val) 314#define bfin_read_USB_INTRTX() bfin_read16(USB_INTRTX) 315#define bfin_write_USB_INTRTX(val) bfin_write16(USB_INTRTX, val) 316#define bfin_read_USB_INTRRX() bfin_read16(USB_INTRRX) 317#define bfin_write_USB_INTRRX(val) bfin_write16(USB_INTRRX, val) 318#define bfin_read_USB_INTRTXE() bfin_read16(USB_INTRTXE) 319#define bfin_write_USB_INTRTXE(val) bfin_write16(USB_INTRTXE, val) 320#define bfin_read_USB_INTRRXE() bfin_read16(USB_INTRRXE) 321#define bfin_write_USB_INTRRXE(val) bfin_write16(USB_INTRRXE, val) 322#define bfin_read_USB_INTRUSB() bfin_read16(USB_INTRUSB) 323#define bfin_write_USB_INTRUSB(val) bfin_write16(USB_INTRUSB, val) 324#define bfin_read_USB_INTRUSBE() bfin_read16(USB_INTRUSBE) 325#define bfin_write_USB_INTRUSBE(val) bfin_write16(USB_INTRUSBE, val) 326#define bfin_read_USB_FRAME() bfin_read16(USB_FRAME) 327#define bfin_write_USB_FRAME(val) bfin_write16(USB_FRAME, val) 328#define bfin_read_USB_INDEX() bfin_read16(USB_INDEX) 329#define bfin_write_USB_INDEX(val) bfin_write16(USB_INDEX, val) 330#define bfin_read_USB_TESTMODE() bfin_read16(USB_TESTMODE) 331#define bfin_write_USB_TESTMODE(val) bfin_write16(USB_TESTMODE, val) 332#define bfin_read_USB_GLOBINTR() bfin_read16(USB_GLOBINTR) 333#define bfin_write_USB_GLOBINTR(val) bfin_write16(USB_GLOBINTR, val) 334#define bfin_read_USB_GLOBAL_CTL() bfin_read16(USB_GLOBAL_CTL) 335#define bfin_write_USB_GLOBAL_CTL(val) bfin_write16(USB_GLOBAL_CTL, val) 336 337/* USB Packet Control Registers */ 338 339#define bfin_read_USB_TX_MAX_PACKET() bfin_read16(USB_TX_MAX_PACKET) 340#define bfin_write_USB_TX_MAX_PACKET(val) bfin_write16(USB_TX_MAX_PACKET, val) 341#define bfin_read_USB_CSR0() bfin_read16(USB_CSR0) 342#define bfin_write_USB_CSR0(val) bfin_write16(USB_CSR0, val) 343#define bfin_read_USB_TXCSR() bfin_read16(USB_TXCSR) 344#define bfin_write_USB_TXCSR(val) bfin_write16(USB_TXCSR, val) 345#define bfin_read_USB_RX_MAX_PACKET() bfin_read16(USB_RX_MAX_PACKET) 346#define bfin_write_USB_RX_MAX_PACKET(val) bfin_write16(USB_RX_MAX_PACKET, val) 347#define bfin_read_USB_RXCSR() bfin_read16(USB_RXCSR) 348#define bfin_write_USB_RXCSR(val) bfin_write16(USB_RXCSR, val) 349#define bfin_read_USB_COUNT0() bfin_read16(USB_COUNT0) 350#define bfin_write_USB_COUNT0(val) bfin_write16(USB_COUNT0, val) 351#define bfin_read_USB_RXCOUNT() bfin_read16(USB_RXCOUNT) 352#define bfin_write_USB_RXCOUNT(val) bfin_write16(USB_RXCOUNT, val) 353#define bfin_read_USB_TXTYPE() bfin_read16(USB_TXTYPE) 354#define bfin_write_USB_TXTYPE(val) bfin_write16(USB_TXTYPE, val) 355#define bfin_read_USB_NAKLIMIT0() bfin_read16(USB_NAKLIMIT0) 356#define bfin_write_USB_NAKLIMIT0(val) bfin_write16(USB_NAKLIMIT0, val) 357#define bfin_read_USB_TXINTERVAL() bfin_read16(USB_TXINTERVAL) 358#define bfin_write_USB_TXINTERVAL(val) bfin_write16(USB_TXINTERVAL, val) 359#define bfin_read_USB_RXTYPE() bfin_read16(USB_RXTYPE) 360#define bfin_write_USB_RXTYPE(val) bfin_write16(USB_RXTYPE, val) 361#define bfin_read_USB_RXINTERVAL() bfin_read16(USB_RXINTERVAL) 362#define bfin_write_USB_RXINTERVAL(val) bfin_write16(USB_RXINTERVAL, val) 363#define bfin_read_USB_TXCOUNT() bfin_read16(USB_TXCOUNT) 364#define bfin_write_USB_TXCOUNT(val) bfin_write16(USB_TXCOUNT, val) 365 366/* USB Endbfin_read_()oint FIFO Registers */ 367 368#define bfin_read_USB_EP0_FIFO() bfin_read16(USB_EP0_FIFO) 369#define bfin_write_USB_EP0_FIFO(val) bfin_write16(USB_EP0_FIFO, val) 370#define bfin_read_USB_EP1_FIFO() bfin_read16(USB_EP1_FIFO) 371#define bfin_write_USB_EP1_FIFO(val) bfin_write16(USB_EP1_FIFO, val) 372#define bfin_read_USB_EP2_FIFO() bfin_read16(USB_EP2_FIFO) 373#define bfin_write_USB_EP2_FIFO(val) bfin_write16(USB_EP2_FIFO, val) 374#define bfin_read_USB_EP3_FIFO() bfin_read16(USB_EP3_FIFO) 375#define bfin_write_USB_EP3_FIFO(val) bfin_write16(USB_EP3_FIFO, val) 376#define bfin_read_USB_EP4_FIFO() bfin_read16(USB_EP4_FIFO) 377#define bfin_write_USB_EP4_FIFO(val) bfin_write16(USB_EP4_FIFO, val) 378#define bfin_read_USB_EP5_FIFO() bfin_read16(USB_EP5_FIFO) 379#define bfin_write_USB_EP5_FIFO(val) bfin_write16(USB_EP5_FIFO, val) 380#define bfin_read_USB_EP6_FIFO() bfin_read16(USB_EP6_FIFO) 381#define bfin_write_USB_EP6_FIFO(val) bfin_write16(USB_EP6_FIFO, val) 382#define bfin_read_USB_EP7_FIFO() bfin_read16(USB_EP7_FIFO) 383#define bfin_write_USB_EP7_FIFO(val) bfin_write16(USB_EP7_FIFO, val) 384 385/* USB OTG Control Registers */ 386 387#define bfin_read_USB_OTG_DEV_CTL() bfin_read16(USB_OTG_DEV_CTL) 388#define bfin_write_USB_OTG_DEV_CTL(val) bfin_write16(USB_OTG_DEV_CTL, val) 389#define bfin_read_USB_OTG_VBUS_IRQ() bfin_read16(USB_OTG_VBUS_IRQ) 390#define bfin_write_USB_OTG_VBUS_IRQ(val) bfin_write16(USB_OTG_VBUS_IRQ, val) 391#define bfin_read_USB_OTG_VBUS_MASK() bfin_read16(USB_OTG_VBUS_MASK) 392#define bfin_write_USB_OTG_VBUS_MASK(val) bfin_write16(USB_OTG_VBUS_MASK, val) 393 394/* USB Phy Control Registers */ 395 396#define bfin_read_USB_LINKINFO() bfin_read16(USB_LINKINFO) 397#define bfin_write_USB_LINKINFO(val) bfin_write16(USB_LINKINFO, val) 398#define bfin_read_USB_VPLEN() bfin_read16(USB_VPLEN) 399#define bfin_write_USB_VPLEN(val) bfin_write16(USB_VPLEN, val) 400#define bfin_read_USB_HS_EOF1() bfin_read16(USB_HS_EOF1) 401#define bfin_write_USB_HS_EOF1(val) bfin_write16(USB_HS_EOF1, val) 402#define bfin_read_USB_FS_EOF1() bfin_read16(USB_FS_EOF1) 403#define bfin_write_USB_FS_EOF1(val) bfin_write16(USB_FS_EOF1, val) 404#define bfin_read_USB_LS_EOF1() bfin_read16(USB_LS_EOF1) 405#define bfin_write_USB_LS_EOF1(val) bfin_write16(USB_LS_EOF1, val) 406 407/* (APHY_CNTRL is for ADI usage only) */ 408 409#define bfin_read_USB_APHY_CNTRL() bfin_read16(USB_APHY_CNTRL) 410#define bfin_write_USB_APHY_CNTRL(val) bfin_write16(USB_APHY_CNTRL, val) 411 412/* (APHY_CALIB is for ADI usage only) */ 413 414#define bfin_read_USB_APHY_CALIB() bfin_read16(USB_APHY_CALIB) 415#define bfin_write_USB_APHY_CALIB(val) bfin_write16(USB_APHY_CALIB, val) 416#define bfin_read_USB_APHY_CNTRL2() bfin_read16(USB_APHY_CNTRL2) 417#define bfin_write_USB_APHY_CNTRL2(val) bfin_write16(USB_APHY_CNTRL2, val) 418 419/* (PHY_TEST is for ADI usage only) */ 420 421#define bfin_read_USB_PHY_TEST() bfin_read16(USB_PHY_TEST) 422#define bfin_write_USB_PHY_TEST(val) bfin_write16(USB_PHY_TEST, val) 423#define bfin_read_USB_PLLOSC_CTRL() bfin_read16(USB_PLLOSC_CTRL) 424#define bfin_write_USB_PLLOSC_CTRL(val) bfin_write16(USB_PLLOSC_CTRL, val) 425#define bfin_read_USB_SRP_CLKDIV() bfin_read16(USB_SRP_CLKDIV) 426#define bfin_write_USB_SRP_CLKDIV(val) bfin_write16(USB_SRP_CLKDIV, val) 427 428/* USB Endbfin_read_()oint 0 Control Registers */ 429 430#define bfin_read_USB_EP_NI0_TXMAXP() bfin_read16(USB_EP_NI0_TXMAXP) 431#define bfin_write_USB_EP_NI0_TXMAXP(val) bfin_write16(USB_EP_NI0_TXMAXP, val) 432#define bfin_read_USB_EP_NI0_TXCSR() bfin_read16(USB_EP_NI0_TXCSR) 433#define bfin_write_USB_EP_NI0_TXCSR(val) bfin_write16(USB_EP_NI0_TXCSR, val) 434#define bfin_read_USB_EP_NI0_RXMAXP() bfin_read16(USB_EP_NI0_RXMAXP) 435#define bfin_write_USB_EP_NI0_RXMAXP(val) bfin_write16(USB_EP_NI0_RXMAXP, val) 436#define bfin_read_USB_EP_NI0_RXCSR() bfin_read16(USB_EP_NI0_RXCSR) 437#define bfin_write_USB_EP_NI0_RXCSR(val) bfin_write16(USB_EP_NI0_RXCSR, val) 438#define bfin_read_USB_EP_NI0_RXCOUNT() bfin_read16(USB_EP_NI0_RXCOUNT) 439#define bfin_write_USB_EP_NI0_RXCOUNT(val) bfin_write16(USB_EP_NI0_RXCOUNT, val) 440#define bfin_read_USB_EP_NI0_TXTYPE() bfin_read16(USB_EP_NI0_TXTYPE) 441#define bfin_write_USB_EP_NI0_TXTYPE(val) bfin_write16(USB_EP_NI0_TXTYPE, val) 442#define bfin_read_USB_EP_NI0_TXINTERVAL() bfin_read16(USB_EP_NI0_TXINTERVAL) 443#define bfin_write_USB_EP_NI0_TXINTERVAL(val) bfin_write16(USB_EP_NI0_TXINTERVAL, val) 444#define bfin_read_USB_EP_NI0_RXTYPE() bfin_read16(USB_EP_NI0_RXTYPE) 445#define bfin_write_USB_EP_NI0_RXTYPE(val) bfin_write16(USB_EP_NI0_RXTYPE, val) 446#define bfin_read_USB_EP_NI0_RXINTERVAL() bfin_read16(USB_EP_NI0_RXINTERVAL) 447#define bfin_write_USB_EP_NI0_RXINTERVAL(val) bfin_write16(USB_EP_NI0_RXINTERVAL, val) 448 449/* USB Endbfin_read_()oint 1 Control Registers */ 450 451#define bfin_read_USB_EP_NI0_TXCOUNT() bfin_read16(USB_EP_NI0_TXCOUNT) 452#define bfin_write_USB_EP_NI0_TXCOUNT(val) bfin_write16(USB_EP_NI0_TXCOUNT, val) 453#define bfin_read_USB_EP_NI1_TXMAXP() bfin_read16(USB_EP_NI1_TXMAXP) 454#define bfin_write_USB_EP_NI1_TXMAXP(val) bfin_write16(USB_EP_NI1_TXMAXP, val) 455#define bfin_read_USB_EP_NI1_TXCSR() bfin_read16(USB_EP_NI1_TXCSR) 456#define bfin_write_USB_EP_NI1_TXCSR(val) bfin_write16(USB_EP_NI1_TXCSR, val) 457#define bfin_read_USB_EP_NI1_RXMAXP() bfin_read16(USB_EP_NI1_RXMAXP) 458#define bfin_write_USB_EP_NI1_RXMAXP(val) bfin_write16(USB_EP_NI1_RXMAXP, val) 459#define bfin_read_USB_EP_NI1_RXCSR() bfin_read16(USB_EP_NI1_RXCSR) 460#define bfin_write_USB_EP_NI1_RXCSR(val) bfin_write16(USB_EP_NI1_RXCSR, val) 461#define bfin_read_USB_EP_NI1_RXCOUNT() bfin_read16(USB_EP_NI1_RXCOUNT) 462#define bfin_write_USB_EP_NI1_RXCOUNT(val) bfin_write16(USB_EP_NI1_RXCOUNT, val) 463#define bfin_read_USB_EP_NI1_TXTYPE() bfin_read16(USB_EP_NI1_TXTYPE) 464#define bfin_write_USB_EP_NI1_TXTYPE(val) bfin_write16(USB_EP_NI1_TXTYPE, val) 465#define bfin_read_USB_EP_NI1_TXINTERVAL() bfin_read16(USB_EP_NI1_TXINTERVAL) 466#define bfin_write_USB_EP_NI1_TXINTERVAL(val) bfin_write16(USB_EP_NI1_TXINTERVAL, val) 467#define bfin_read_USB_EP_NI1_RXTYPE() bfin_read16(USB_EP_NI1_RXTYPE) 468#define bfin_write_USB_EP_NI1_RXTYPE(val) bfin_write16(USB_EP_NI1_RXTYPE, val) 469#define bfin_read_USB_EP_NI1_RXINTERVAL() bfin_read16(USB_EP_NI1_RXINTERVAL) 470#define bfin_write_USB_EP_NI1_RXINTERVAL(val) bfin_write16(USB_EP_NI1_RXINTERVAL, val) 471 472/* USB Endbfin_read_()oint 2 Control Registers */ 473 474#define bfin_read_USB_EP_NI1_TXCOUNT() bfin_read16(USB_EP_NI1_TXCOUNT) 475#define bfin_write_USB_EP_NI1_TXCOUNT(val) bfin_write16(USB_EP_NI1_TXCOUNT, val) 476#define bfin_read_USB_EP_NI2_TXMAXP() bfin_read16(USB_EP_NI2_TXMAXP) 477#define bfin_write_USB_EP_NI2_TXMAXP(val) bfin_write16(USB_EP_NI2_TXMAXP, val) 478#define bfin_read_USB_EP_NI2_TXCSR() bfin_read16(USB_EP_NI2_TXCSR) 479#define bfin_write_USB_EP_NI2_TXCSR(val) bfin_write16(USB_EP_NI2_TXCSR, val) 480#define bfin_read_USB_EP_NI2_RXMAXP() bfin_read16(USB_EP_NI2_RXMAXP) 481#define bfin_write_USB_EP_NI2_RXMAXP(val) bfin_write16(USB_EP_NI2_RXMAXP, val) 482#define bfin_read_USB_EP_NI2_RXCSR() bfin_read16(USB_EP_NI2_RXCSR) 483#define bfin_write_USB_EP_NI2_RXCSR(val) bfin_write16(USB_EP_NI2_RXCSR, val) 484#define bfin_read_USB_EP_NI2_RXCOUNT() bfin_read16(USB_EP_NI2_RXCOUNT) 485#define bfin_write_USB_EP_NI2_RXCOUNT(val) bfin_write16(USB_EP_NI2_RXCOUNT, val) 486#define bfin_read_USB_EP_NI2_TXTYPE() bfin_read16(USB_EP_NI2_TXTYPE) 487#define bfin_write_USB_EP_NI2_TXTYPE(val) bfin_write16(USB_EP_NI2_TXTYPE, val) 488#define bfin_read_USB_EP_NI2_TXINTERVAL() bfin_read16(USB_EP_NI2_TXINTERVAL) 489#define bfin_write_USB_EP_NI2_TXINTERVAL(val) bfin_write16(USB_EP_NI2_TXINTERVAL, val) 490#define bfin_read_USB_EP_NI2_RXTYPE() bfin_read16(USB_EP_NI2_RXTYPE) 491#define bfin_write_USB_EP_NI2_RXTYPE(val) bfin_write16(USB_EP_NI2_RXTYPE, val) 492#define bfin_read_USB_EP_NI2_RXINTERVAL() bfin_read16(USB_EP_NI2_RXINTERVAL) 493#define bfin_write_USB_EP_NI2_RXINTERVAL(val) bfin_write16(USB_EP_NI2_RXINTERVAL, val) 494 495/* USB Endbfin_read_()oint 3 Control Registers */ 496 497#define bfin_read_USB_EP_NI2_TXCOUNT() bfin_read16(USB_EP_NI2_TXCOUNT) 498#define bfin_write_USB_EP_NI2_TXCOUNT(val) bfin_write16(USB_EP_NI2_TXCOUNT, val) 499#define bfin_read_USB_EP_NI3_TXMAXP() bfin_read16(USB_EP_NI3_TXMAXP) 500#define bfin_write_USB_EP_NI3_TXMAXP(val) bfin_write16(USB_EP_NI3_TXMAXP, val) 501#define bfin_read_USB_EP_NI3_TXCSR() bfin_read16(USB_EP_NI3_TXCSR) 502#define bfin_write_USB_EP_NI3_TXCSR(val) bfin_write16(USB_EP_NI3_TXCSR, val) 503#define bfin_read_USB_EP_NI3_RXMAXP() bfin_read16(USB_EP_NI3_RXMAXP) 504#define bfin_write_USB_EP_NI3_RXMAXP(val) bfin_write16(USB_EP_NI3_RXMAXP, val) 505#define bfin_read_USB_EP_NI3_RXCSR() bfin_read16(USB_EP_NI3_RXCSR) 506#define bfin_write_USB_EP_NI3_RXCSR(val) bfin_write16(USB_EP_NI3_RXCSR, val) 507#define bfin_read_USB_EP_NI3_RXCOUNT() bfin_read16(USB_EP_NI3_RXCOUNT) 508#define bfin_write_USB_EP_NI3_RXCOUNT(val) bfin_write16(USB_EP_NI3_RXCOUNT, val) 509#define bfin_read_USB_EP_NI3_TXTYPE() bfin_read16(USB_EP_NI3_TXTYPE) 510#define bfin_write_USB_EP_NI3_TXTYPE(val) bfin_write16(USB_EP_NI3_TXTYPE, val) 511#define bfin_read_USB_EP_NI3_TXINTERVAL() bfin_read16(USB_EP_NI3_TXINTERVAL) 512#define bfin_write_USB_EP_NI3_TXINTERVAL(val) bfin_write16(USB_EP_NI3_TXINTERVAL, val) 513#define bfin_read_USB_EP_NI3_RXTYPE() bfin_read16(USB_EP_NI3_RXTYPE) 514#define bfin_write_USB_EP_NI3_RXTYPE(val) bfin_write16(USB_EP_NI3_RXTYPE, val) 515#define bfin_read_USB_EP_NI3_RXINTERVAL() bfin_read16(USB_EP_NI3_RXINTERVAL) 516#define bfin_write_USB_EP_NI3_RXINTERVAL(val) bfin_write16(USB_EP_NI3_RXINTERVAL, val) 517 518/* USB Endbfin_read_()oint 4 Control Registers */ 519 520#define bfin_read_USB_EP_NI3_TXCOUNT() bfin_read16(USB_EP_NI3_TXCOUNT) 521#define bfin_write_USB_EP_NI3_TXCOUNT(val) bfin_write16(USB_EP_NI3_TXCOUNT, val) 522#define bfin_read_USB_EP_NI4_TXMAXP() bfin_read16(USB_EP_NI4_TXMAXP) 523#define bfin_write_USB_EP_NI4_TXMAXP(val) bfin_write16(USB_EP_NI4_TXMAXP, val) 524#define bfin_read_USB_EP_NI4_TXCSR() bfin_read16(USB_EP_NI4_TXCSR) 525#define bfin_write_USB_EP_NI4_TXCSR(val) bfin_write16(USB_EP_NI4_TXCSR, val) 526#define bfin_read_USB_EP_NI4_RXMAXP() bfin_read16(USB_EP_NI4_RXMAXP) 527#define bfin_write_USB_EP_NI4_RXMAXP(val) bfin_write16(USB_EP_NI4_RXMAXP, val) 528#define bfin_read_USB_EP_NI4_RXCSR() bfin_read16(USB_EP_NI4_RXCSR) 529#define bfin_write_USB_EP_NI4_RXCSR(val) bfin_write16(USB_EP_NI4_RXCSR, val) 530#define bfin_read_USB_EP_NI4_RXCOUNT() bfin_read16(USB_EP_NI4_RXCOUNT) 531#define bfin_write_USB_EP_NI4_RXCOUNT(val) bfin_write16(USB_EP_NI4_RXCOUNT, val) 532#define bfin_read_USB_EP_NI4_TXTYPE() bfin_read16(USB_EP_NI4_TXTYPE) 533#define bfin_write_USB_EP_NI4_TXTYPE(val) bfin_write16(USB_EP_NI4_TXTYPE, val) 534#define bfin_read_USB_EP_NI4_TXINTERVAL() bfin_read16(USB_EP_NI4_TXINTERVAL) 535#define bfin_write_USB_EP_NI4_TXINTERVAL(val) bfin_write16(USB_EP_NI4_TXINTERVAL, val) 536#define bfin_read_USB_EP_NI4_RXTYPE() bfin_read16(USB_EP_NI4_RXTYPE) 537#define bfin_write_USB_EP_NI4_RXTYPE(val) bfin_write16(USB_EP_NI4_RXTYPE, val) 538#define bfin_read_USB_EP_NI4_RXINTERVAL() bfin_read16(USB_EP_NI4_RXINTERVAL) 539#define bfin_write_USB_EP_NI4_RXINTERVAL(val) bfin_write16(USB_EP_NI4_RXINTERVAL, val) 540 541/* USB Endbfin_read_()oint 5 Control Registers */ 542 543#define bfin_read_USB_EP_NI4_TXCOUNT() bfin_read16(USB_EP_NI4_TXCOUNT) 544#define bfin_write_USB_EP_NI4_TXCOUNT(val) bfin_write16(USB_EP_NI4_TXCOUNT, val) 545#define bfin_read_USB_EP_NI5_TXMAXP() bfin_read16(USB_EP_NI5_TXMAXP) 546#define bfin_write_USB_EP_NI5_TXMAXP(val) bfin_write16(USB_EP_NI5_TXMAXP, val) 547#define bfin_read_USB_EP_NI5_TXCSR() bfin_read16(USB_EP_NI5_TXCSR) 548#define bfin_write_USB_EP_NI5_TXCSR(val) bfin_write16(USB_EP_NI5_TXCSR, val) 549#define bfin_read_USB_EP_NI5_RXMAXP() bfin_read16(USB_EP_NI5_RXMAXP) 550#define bfin_write_USB_EP_NI5_RXMAXP(val) bfin_write16(USB_EP_NI5_RXMAXP, val) 551#define bfin_read_USB_EP_NI5_RXCSR() bfin_read16(USB_EP_NI5_RXCSR) 552#define bfin_write_USB_EP_NI5_RXCSR(val) bfin_write16(USB_EP_NI5_RXCSR, val) 553#define bfin_read_USB_EP_NI5_RXCOUNT() bfin_read16(USB_EP_NI5_RXCOUNT) 554#define bfin_write_USB_EP_NI5_RXCOUNT(val) bfin_write16(USB_EP_NI5_RXCOUNT, val) 555#define bfin_read_USB_EP_NI5_TXTYPE() bfin_read16(USB_EP_NI5_TXTYPE) 556#define bfin_write_USB_EP_NI5_TXTYPE(val) bfin_write16(USB_EP_NI5_TXTYPE, val) 557#define bfin_read_USB_EP_NI5_TXINTERVAL() bfin_read16(USB_EP_NI5_TXINTERVAL) 558#define bfin_write_USB_EP_NI5_TXINTERVAL(val) bfin_write16(USB_EP_NI5_TXINTERVAL, val) 559#define bfin_read_USB_EP_NI5_RXTYPE() bfin_read16(USB_EP_NI5_RXTYPE) 560#define bfin_write_USB_EP_NI5_RXTYPE(val) bfin_write16(USB_EP_NI5_RXTYPE, val) 561#define bfin_read_USB_EP_NI5_RXINTERVAL() bfin_read16(USB_EP_NI5_RXINTERVAL) 562#define bfin_write_USB_EP_NI5_RXINTERVAL(val) bfin_write16(USB_EP_NI5_RXINTERVAL, val) 563 564/* USB Endbfin_read_()oint 6 Control Registers */ 565 566#define bfin_read_USB_EP_NI5_TXCOUNT() bfin_read16(USB_EP_NI5_TXCOUNT) 567#define bfin_write_USB_EP_NI5_TXCOUNT(val) bfin_write16(USB_EP_NI5_TXCOUNT, val) 568#define bfin_read_USB_EP_NI6_TXMAXP() bfin_read16(USB_EP_NI6_TXMAXP) 569#define bfin_write_USB_EP_NI6_TXMAXP(val) bfin_write16(USB_EP_NI6_TXMAXP, val) 570#define bfin_read_USB_EP_NI6_TXCSR() bfin_read16(USB_EP_NI6_TXCSR) 571#define bfin_write_USB_EP_NI6_TXCSR(val) bfin_write16(USB_EP_NI6_TXCSR, val) 572#define bfin_read_USB_EP_NI6_RXMAXP() bfin_read16(USB_EP_NI6_RXMAXP) 573#define bfin_write_USB_EP_NI6_RXMAXP(val) bfin_write16(USB_EP_NI6_RXMAXP, val) 574#define bfin_read_USB_EP_NI6_RXCSR() bfin_read16(USB_EP_NI6_RXCSR) 575#define bfin_write_USB_EP_NI6_RXCSR(val) bfin_write16(USB_EP_NI6_RXCSR, val) 576#define bfin_read_USB_EP_NI6_RXCOUNT() bfin_read16(USB_EP_NI6_RXCOUNT) 577#define bfin_write_USB_EP_NI6_RXCOUNT(val) bfin_write16(USB_EP_NI6_RXCOUNT, val) 578#define bfin_read_USB_EP_NI6_TXTYPE() bfin_read16(USB_EP_NI6_TXTYPE) 579#define bfin_write_USB_EP_NI6_TXTYPE(val) bfin_write16(USB_EP_NI6_TXTYPE, val) 580#define bfin_read_USB_EP_NI6_TXINTERVAL() bfin_read16(USB_EP_NI6_TXINTERVAL) 581#define bfin_write_USB_EP_NI6_TXINTERVAL(val) bfin_write16(USB_EP_NI6_TXINTERVAL, val) 582#define bfin_read_USB_EP_NI6_RXTYPE() bfin_read16(USB_EP_NI6_RXTYPE) 583#define bfin_write_USB_EP_NI6_RXTYPE(val) bfin_write16(USB_EP_NI6_RXTYPE, val) 584#define bfin_read_USB_EP_NI6_RXINTERVAL() bfin_read16(USB_EP_NI6_RXINTERVAL) 585#define bfin_write_USB_EP_NI6_RXINTERVAL(val) bfin_write16(USB_EP_NI6_RXINTERVAL, val) 586 587/* USB Endbfin_read_()oint 7 Control Registers */ 588 589#define bfin_read_USB_EP_NI6_TXCOUNT() bfin_read16(USB_EP_NI6_TXCOUNT) 590#define bfin_write_USB_EP_NI6_TXCOUNT(val) bfin_write16(USB_EP_NI6_TXCOUNT, val) 591#define bfin_read_USB_EP_NI7_TXMAXP() bfin_read16(USB_EP_NI7_TXMAXP) 592#define bfin_write_USB_EP_NI7_TXMAXP(val) bfin_write16(USB_EP_NI7_TXMAXP, val) 593#define bfin_read_USB_EP_NI7_TXCSR() bfin_read16(USB_EP_NI7_TXCSR) 594#define bfin_write_USB_EP_NI7_TXCSR(val) bfin_write16(USB_EP_NI7_TXCSR, val) 595#define bfin_read_USB_EP_NI7_RXMAXP() bfin_read16(USB_EP_NI7_RXMAXP) 596#define bfin_write_USB_EP_NI7_RXMAXP(val) bfin_write16(USB_EP_NI7_RXMAXP, val) 597#define bfin_read_USB_EP_NI7_RXCSR() bfin_read16(USB_EP_NI7_RXCSR) 598#define bfin_write_USB_EP_NI7_RXCSR(val) bfin_write16(USB_EP_NI7_RXCSR, val) 599#define bfin_read_USB_EP_NI7_RXCOUNT() bfin_read16(USB_EP_NI7_RXCOUNT) 600#define bfin_write_USB_EP_NI7_RXCOUNT(val) bfin_write16(USB_EP_NI7_RXCOUNT, val) 601#define bfin_read_USB_EP_NI7_TXTYPE() bfin_read16(USB_EP_NI7_TXTYPE) 602#define bfin_write_USB_EP_NI7_TXTYPE(val) bfin_write16(USB_EP_NI7_TXTYPE, val) 603#define bfin_read_USB_EP_NI7_TXINTERVAL() bfin_read16(USB_EP_NI7_TXINTERVAL) 604#define bfin_write_USB_EP_NI7_TXINTERVAL(val) bfin_write16(USB_EP_NI7_TXINTERVAL, val) 605#define bfin_read_USB_EP_NI7_RXTYPE() bfin_read16(USB_EP_NI7_RXTYPE) 606#define bfin_write_USB_EP_NI7_RXTYPE(val) bfin_write16(USB_EP_NI7_RXTYPE, val) 607#define bfin_read_USB_EP_NI7_RXINTERVAL() bfin_read16(USB_EP_NI7_RXINTERVAL) 608#define bfin_write_USB_EP_NI7_RXINTERVAL(val) bfin_write16(USB_EP_NI7_RXINTERVAL, val) 609#define bfin_read_USB_EP_NI7_TXCOUNT() bfin_read16(USB_EP_NI7_TXCOUNT) 610#define bfin_write_USB_EP_NI7_TXCOUNT(val) bfin_write16(USB_EP_NI7_TXCOUNT, val) 611#define bfin_read_USB_DMA_INTERRUPT() bfin_read16(USB_DMA_INTERRUPT) 612#define bfin_write_USB_DMA_INTERRUPT(val) bfin_write16(USB_DMA_INTERRUPT, val) 613 614/* USB Channel 0 Config Registers */ 615 616#define bfin_read_USB_DMA0CONTROL() bfin_read16(USB_DMA0CONTROL) 617#define bfin_write_USB_DMA0CONTROL(val) bfin_write16(USB_DMA0CONTROL, val) 618#define bfin_read_USB_DMA0ADDRLOW() bfin_read16(USB_DMA0ADDRLOW) 619#define bfin_write_USB_DMA0ADDRLOW(val) bfin_write16(USB_DMA0ADDRLOW, val) 620#define bfin_read_USB_DMA0ADDRHIGH() bfin_read16(USB_DMA0ADDRHIGH) 621#define bfin_write_USB_DMA0ADDRHIGH(val) bfin_write16(USB_DMA0ADDRHIGH, val) 622#define bfin_read_USB_DMA0COUNTLOW() bfin_read16(USB_DMA0COUNTLOW) 623#define bfin_write_USB_DMA0COUNTLOW(val) bfin_write16(USB_DMA0COUNTLOW, val) 624#define bfin_read_USB_DMA0COUNTHIGH() bfin_read16(USB_DMA0COUNTHIGH) 625#define bfin_write_USB_DMA0COUNTHIGH(val) bfin_write16(USB_DMA0COUNTHIGH, val) 626 627/* USB Channel 1 Config Registers */ 628 629#define bfin_read_USB_DMA1CONTROL() bfin_read16(USB_DMA1CONTROL) 630#define bfin_write_USB_DMA1CONTROL(val) bfin_write16(USB_DMA1CONTROL, val) 631#define bfin_read_USB_DMA1ADDRLOW() bfin_read16(USB_DMA1ADDRLOW) 632#define bfin_write_USB_DMA1ADDRLOW(val) bfin_write16(USB_DMA1ADDRLOW, val) 633#define bfin_read_USB_DMA1ADDRHIGH() bfin_read16(USB_DMA1ADDRHIGH) 634#define bfin_write_USB_DMA1ADDRHIGH(val) bfin_write16(USB_DMA1ADDRHIGH, val) 635#define bfin_read_USB_DMA1COUNTLOW() bfin_read16(USB_DMA1COUNTLOW) 636#define bfin_write_USB_DMA1COUNTLOW(val) bfin_write16(USB_DMA1COUNTLOW, val) 637#define bfin_read_USB_DMA1COUNTHIGH() bfin_read16(USB_DMA1COUNTHIGH) 638#define bfin_write_USB_DMA1COUNTHIGH(val) bfin_write16(USB_DMA1COUNTHIGH, val) 639 640/* USB Channel 2 Config Registers */ 641 642#define bfin_read_USB_DMA2CONTROL() bfin_read16(USB_DMA2CONTROL) 643#define bfin_write_USB_DMA2CONTROL(val) bfin_write16(USB_DMA2CONTROL, val) 644#define bfin_read_USB_DMA2ADDRLOW() bfin_read16(USB_DMA2ADDRLOW) 645#define bfin_write_USB_DMA2ADDRLOW(val) bfin_write16(USB_DMA2ADDRLOW, val) 646#define bfin_read_USB_DMA2ADDRHIGH() bfin_read16(USB_DMA2ADDRHIGH) 647#define bfin_write_USB_DMA2ADDRHIGH(val) bfin_write16(USB_DMA2ADDRHIGH, val) 648#define bfin_read_USB_DMA2COUNTLOW() bfin_read16(USB_DMA2COUNTLOW) 649#define bfin_write_USB_DMA2COUNTLOW(val) bfin_write16(USB_DMA2COUNTLOW, val) 650#define bfin_read_USB_DMA2COUNTHIGH() bfin_read16(USB_DMA2COUNTHIGH) 651#define bfin_write_USB_DMA2COUNTHIGH(val) bfin_write16(USB_DMA2COUNTHIGH, val) 652 653/* USB Channel 3 Config Registers */ 654 655#define bfin_read_USB_DMA3CONTROL() bfin_read16(USB_DMA3CONTROL) 656#define bfin_write_USB_DMA3CONTROL(val) bfin_write16(USB_DMA3CONTROL, val) 657#define bfin_read_USB_DMA3ADDRLOW() bfin_read16(USB_DMA3ADDRLOW) 658#define bfin_write_USB_DMA3ADDRLOW(val) bfin_write16(USB_DMA3ADDRLOW, val) 659#define bfin_read_USB_DMA3ADDRHIGH() bfin_read16(USB_DMA3ADDRHIGH) 660#define bfin_write_USB_DMA3ADDRHIGH(val) bfin_write16(USB_DMA3ADDRHIGH, val) 661#define bfin_read_USB_DMA3COUNTLOW() bfin_read16(USB_DMA3COUNTLOW) 662#define bfin_write_USB_DMA3COUNTLOW(val) bfin_write16(USB_DMA3COUNTLOW, val) 663#define bfin_read_USB_DMA3COUNTHIGH() bfin_read16(USB_DMA3COUNTHIGH) 664#define bfin_write_USB_DMA3COUNTHIGH(val) bfin_write16(USB_DMA3COUNTHIGH, val) 665 666/* USB Channel 4 Config Registers */ 667 668#define bfin_read_USB_DMA4CONTROL() bfin_read16(USB_DMA4CONTROL) 669#define bfin_write_USB_DMA4CONTROL(val) bfin_write16(USB_DMA4CONTROL, val) 670#define bfin_read_USB_DMA4ADDRLOW() bfin_read16(USB_DMA4ADDRLOW) 671#define bfin_write_USB_DMA4ADDRLOW(val) bfin_write16(USB_DMA4ADDRLOW, val) 672#define bfin_read_USB_DMA4ADDRHIGH() bfin_read16(USB_DMA4ADDRHIGH) 673#define bfin_write_USB_DMA4ADDRHIGH(val) bfin_write16(USB_DMA4ADDRHIGH, val) 674#define bfin_read_USB_DMA4COUNTLOW() bfin_read16(USB_DMA4COUNTLOW) 675#define bfin_write_USB_DMA4COUNTLOW(val) bfin_write16(USB_DMA4COUNTLOW, val) 676#define bfin_read_USB_DMA4COUNTHIGH() bfin_read16(USB_DMA4COUNTHIGH) 677#define bfin_write_USB_DMA4COUNTHIGH(val) bfin_write16(USB_DMA4COUNTHIGH, val) 678 679/* USB Channel 5 Config Registers */ 680 681#define bfin_read_USB_DMA5CONTROL() bfin_read16(USB_DMA5CONTROL) 682#define bfin_write_USB_DMA5CONTROL(val) bfin_write16(USB_DMA5CONTROL, val) 683#define bfin_read_USB_DMA5ADDRLOW() bfin_read16(USB_DMA5ADDRLOW) 684#define bfin_write_USB_DMA5ADDRLOW(val) bfin_write16(USB_DMA5ADDRLOW, val) 685#define bfin_read_USB_DMA5ADDRHIGH() bfin_read16(USB_DMA5ADDRHIGH) 686#define bfin_write_USB_DMA5ADDRHIGH(val) bfin_write16(USB_DMA5ADDRHIGH, val) 687#define bfin_read_USB_DMA5COUNTLOW() bfin_read16(USB_DMA5COUNTLOW) 688#define bfin_write_USB_DMA5COUNTLOW(val) bfin_write16(USB_DMA5COUNTLOW, val) 689#define bfin_read_USB_DMA5COUNTHIGH() bfin_read16(USB_DMA5COUNTHIGH) 690#define bfin_write_USB_DMA5COUNTHIGH(val) bfin_write16(USB_DMA5COUNTHIGH, val) 691 692/* USB Channel 6 Config Registers */ 693 694#define bfin_read_USB_DMA6CONTROL() bfin_read16(USB_DMA6CONTROL) 695#define bfin_write_USB_DMA6CONTROL(val) bfin_write16(USB_DMA6CONTROL, val) 696#define bfin_read_USB_DMA6ADDRLOW() bfin_read16(USB_DMA6ADDRLOW) 697#define bfin_write_USB_DMA6ADDRLOW(val) bfin_write16(USB_DMA6ADDRLOW, val) 698#define bfin_read_USB_DMA6ADDRHIGH() bfin_read16(USB_DMA6ADDRHIGH) 699#define bfin_write_USB_DMA6ADDRHIGH(val) bfin_write16(USB_DMA6ADDRHIGH, val) 700#define bfin_read_USB_DMA6COUNTLOW() bfin_read16(USB_DMA6COUNTLOW) 701#define bfin_write_USB_DMA6COUNTLOW(val) bfin_write16(USB_DMA6COUNTLOW, val) 702#define bfin_read_USB_DMA6COUNTHIGH() bfin_read16(USB_DMA6COUNTHIGH) 703#define bfin_write_USB_DMA6COUNTHIGH(val) bfin_write16(USB_DMA6COUNTHIGH, val) 704 705/* USB Channel 7 Config Registers */ 706 707#define bfin_read_USB_DMA7CONTROL() bfin_read16(USB_DMA7CONTROL) 708#define bfin_write_USB_DMA7CONTROL(val) bfin_write16(USB_DMA7CONTROL, val) 709#define bfin_read_USB_DMA7ADDRLOW() bfin_read16(USB_DMA7ADDRLOW) 710#define bfin_write_USB_DMA7ADDRLOW(val) bfin_write16(USB_DMA7ADDRLOW, val) 711#define bfin_read_USB_DMA7ADDRHIGH() bfin_read16(USB_DMA7ADDRHIGH) 712#define bfin_write_USB_DMA7ADDRHIGH(val) bfin_write16(USB_DMA7ADDRHIGH, val) 713#define bfin_read_USB_DMA7COUNTLOW() bfin_read16(USB_DMA7COUNTLOW) 714#define bfin_write_USB_DMA7COUNTLOW(val) bfin_write16(USB_DMA7COUNTLOW, val) 715#define bfin_read_USB_DMA7COUNTHIGH() bfin_read16(USB_DMA7COUNTHIGH) 716#define bfin_write_USB_DMA7COUNTHIGH(val) bfin_write16(USB_DMA7COUNTHIGH, val) 717 718/* Keybfin_read_()ad Registers */ 719 720#define bfin_read_KPAD_CTL() bfin_read16(KPAD_CTL) 721#define bfin_write_KPAD_CTL(val) bfin_write16(KPAD_CTL, val) 722#define bfin_read_KPAD_PRESCALE() bfin_read16(KPAD_PRESCALE) 723#define bfin_write_KPAD_PRESCALE(val) bfin_write16(KPAD_PRESCALE, val) 724#define bfin_read_KPAD_MSEL() bfin_read16(KPAD_MSEL) 725#define bfin_write_KPAD_MSEL(val) bfin_write16(KPAD_MSEL, val) 726#define bfin_read_KPAD_ROWCOL() bfin_read16(KPAD_ROWCOL) 727#define bfin_write_KPAD_ROWCOL(val) bfin_write16(KPAD_ROWCOL, val) 728#define bfin_read_KPAD_STAT() bfin_read16(KPAD_STAT) 729#define bfin_write_KPAD_STAT(val) bfin_write16(KPAD_STAT, val) 730#define bfin_read_KPAD_SOFTEVAL() bfin_read16(KPAD_SOFTEVAL) 731#define bfin_write_KPAD_SOFTEVAL(val) bfin_write16(KPAD_SOFTEVAL, val) 732 733/* Pixel Combfin_read_()ositor (PIXC) Registers */ 734 735#define bfin_read_PIXC_CTL() bfin_read16(PIXC_CTL) 736#define bfin_write_PIXC_CTL(val) bfin_write16(PIXC_CTL, val) 737#define bfin_read_PIXC_PPL() bfin_read16(PIXC_PPL) 738#define bfin_write_PIXC_PPL(val) bfin_write16(PIXC_PPL, val) 739#define bfin_read_PIXC_LPF() bfin_read16(PIXC_LPF) 740#define bfin_write_PIXC_LPF(val) bfin_write16(PIXC_LPF, val) 741#define bfin_read_PIXC_AHSTART() bfin_read16(PIXC_AHSTART) 742#define bfin_write_PIXC_AHSTART(val) bfin_write16(PIXC_AHSTART, val) 743#define bfin_read_PIXC_AHEND() bfin_read16(PIXC_AHEND) 744#define bfin_write_PIXC_AHEND(val) bfin_write16(PIXC_AHEND, val) 745#define bfin_read_PIXC_AVSTART() bfin_read16(PIXC_AVSTART) 746#define bfin_write_PIXC_AVSTART(val) bfin_write16(PIXC_AVSTART, val) 747#define bfin_read_PIXC_AVEND() bfin_read16(PIXC_AVEND) 748#define bfin_write_PIXC_AVEND(val) bfin_write16(PIXC_AVEND, val) 749#define bfin_read_PIXC_ATRANSP() bfin_read16(PIXC_ATRANSP) 750#define bfin_write_PIXC_ATRANSP(val) bfin_write16(PIXC_ATRANSP, val) 751#define bfin_read_PIXC_BHSTART() bfin_read16(PIXC_BHSTART) 752#define bfin_write_PIXC_BHSTART(val) bfin_write16(PIXC_BHSTART, val) 753#define bfin_read_PIXC_BHEND() bfin_read16(PIXC_BHEND) 754#define bfin_write_PIXC_BHEND(val) bfin_write16(PIXC_BHEND, val) 755#define bfin_read_PIXC_BVSTART() bfin_read16(PIXC_BVSTART) 756#define bfin_write_PIXC_BVSTART(val) bfin_write16(PIXC_BVSTART, val) 757#define bfin_read_PIXC_BVEND() bfin_read16(PIXC_BVEND) 758#define bfin_write_PIXC_BVEND(val) bfin_write16(PIXC_BVEND, val) 759#define bfin_read_PIXC_BTRANSP() bfin_read16(PIXC_BTRANSP) 760#define bfin_write_PIXC_BTRANSP(val) bfin_write16(PIXC_BTRANSP, val) 761#define bfin_read_PIXC_INTRSTAT() bfin_read16(PIXC_INTRSTAT) 762#define bfin_write_PIXC_INTRSTAT(val) bfin_write16(PIXC_INTRSTAT, val) 763#define bfin_read_PIXC_RYCON() bfin_read32(PIXC_RYCON) 764#define bfin_write_PIXC_RYCON(val) bfin_write32(PIXC_RYCON, val) 765#define bfin_read_PIXC_GUCON() bfin_read32(PIXC_GUCON) 766#define bfin_write_PIXC_GUCON(val) bfin_write32(PIXC_GUCON, val) 767#define bfin_read_PIXC_BVCON() bfin_read32(PIXC_BVCON) 768#define bfin_write_PIXC_BVCON(val) bfin_write32(PIXC_BVCON, val) 769#define bfin_read_PIXC_CCBIAS() bfin_read32(PIXC_CCBIAS) 770#define bfin_write_PIXC_CCBIAS(val) bfin_write32(PIXC_CCBIAS, val) 771#define bfin_read_PIXC_TC() bfin_read32(PIXC_TC) 772#define bfin_write_PIXC_TC(val) bfin_write32(PIXC_TC, val) 773 774/* Handshake MDMA 0 Registers */ 775 776#define bfin_read_HMDMA0_CONTROL() bfin_read16(HMDMA0_CONTROL) 777#define bfin_write_HMDMA0_CONTROL(val) bfin_write16(HMDMA0_CONTROL, val) 778#define bfin_read_HMDMA0_ECINIT() bfin_read16(HMDMA0_ECINIT) 779#define bfin_write_HMDMA0_ECINIT(val) bfin_write16(HMDMA0_ECINIT, val) 780#define bfin_read_HMDMA0_BCINIT() bfin_read16(HMDMA0_BCINIT) 781#define bfin_write_HMDMA0_BCINIT(val) bfin_write16(HMDMA0_BCINIT, val) 782#define bfin_read_HMDMA0_ECURGENT() bfin_read16(HMDMA0_ECURGENT) 783#define bfin_write_HMDMA0_ECURGENT(val) bfin_write16(HMDMA0_ECURGENT, val) 784#define bfin_read_HMDMA0_ECOVERFLOW() bfin_read16(HMDMA0_ECOVERFLOW) 785#define bfin_write_HMDMA0_ECOVERFLOW(val) bfin_write16(HMDMA0_ECOVERFLOW, val) 786#define bfin_read_HMDMA0_ECOUNT() bfin_read16(HMDMA0_ECOUNT) 787#define bfin_write_HMDMA0_ECOUNT(val) bfin_write16(HMDMA0_ECOUNT, val) 788#define bfin_read_HMDMA0_BCOUNT() bfin_read16(HMDMA0_BCOUNT) 789#define bfin_write_HMDMA0_BCOUNT(val) bfin_write16(HMDMA0_BCOUNT, val) 790 791/* Handshake MDMA 1 Registers */ 792 793#define bfin_read_HMDMA1_CONTROL() bfin_read16(HMDMA1_CONTROL) 794#define bfin_write_HMDMA1_CONTROL(val) bfin_write16(HMDMA1_CONTROL, val) 795#define bfin_read_HMDMA1_ECINIT() bfin_read16(HMDMA1_ECINIT) 796#define bfin_write_HMDMA1_ECINIT(val) bfin_write16(HMDMA1_ECINIT, val) 797#define bfin_read_HMDMA1_BCINIT() bfin_read16(HMDMA1_BCINIT) 798#define bfin_write_HMDMA1_BCINIT(val) bfin_write16(HMDMA1_BCINIT, val) 799#define bfin_read_HMDMA1_ECURGENT() bfin_read16(HMDMA1_ECURGENT) 800#define bfin_write_HMDMA1_ECURGENT(val) bfin_write16(HMDMA1_ECURGENT, val) 801#define bfin_read_HMDMA1_ECOVERFLOW() bfin_read16(HMDMA1_ECOVERFLOW) 802#define bfin_write_HMDMA1_ECOVERFLOW(val) bfin_write16(HMDMA1_ECOVERFLOW, val) 803#define bfin_read_HMDMA1_ECOUNT() bfin_read16(HMDMA1_ECOUNT) 804#define bfin_write_HMDMA1_ECOUNT(val) bfin_write16(HMDMA1_ECOUNT, val) 805#define bfin_read_HMDMA1_BCOUNT() bfin_read16(HMDMA1_BCOUNT) 806#define bfin_write_HMDMA1_BCOUNT(val) bfin_write16(HMDMA1_BCOUNT, val) 807 808#endif /* _CDEF_BF547_H */ 809