/freebsd-11.0-release/contrib/llvm/lib/Target/XCore/Disassembler/ |
H A D | XCoreDisassembler.cpp | 46 uint64_t &Size, uint16_t &Insn) { 53 Insn = (Bytes[0] << 0) | (Bytes[1] << 8); 58 uint64_t &Size, uint32_t &Insn) { 65 Insn = 93 unsigned Insn, 98 unsigned Insn, 103 unsigned Insn, 108 unsigned Insn, 113 unsigned Insn, 118 unsigned Insn, 45 readInstruction16(ArrayRef<uint8_t> Bytes, uint64_t Address, uint64_t &Size, uint16_t &Insn) argument 57 readInstruction32(ArrayRef<uint8_t> Bytes, uint64_t Address, uint64_t &Size, uint32_t &Insn) argument 241 Decode2OpInstruction(unsigned Insn, unsigned &Op1, unsigned &Op2) argument 259 Decode3OpInstruction(unsigned Insn, unsigned &Op1, unsigned &Op2, unsigned &Op3) argument 275 Decode2OpInstructionFail(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 345 Decode2RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 358 Decode2RImmInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 371 DecodeR2RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 384 Decode2RSrcDstInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 398 DecodeRUSInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 411 DecodeRUSBitpInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 424 DecodeRUSSrcDstBitpInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 438 DecodeL2OpInstructionFail(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 509 DecodeL2RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 523 DecodeLR2RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 537 Decode3RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 550 Decode3RImmInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 563 Decode2RUSInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 576 Decode2RUSBitpInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 589 DecodeL3RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 603 DecodeL3RSrcDstInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 618 DecodeL2RUSInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 632 DecodeL2RUSBitpInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 646 DecodeL6RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 666 DecodeL5RInstructionFail(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 680 DecodeL5RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 700 DecodeL4RSrcDstInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 719 DecodeL4RSrcDstSrcDstInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument [all...] |
/freebsd-11.0-release/contrib/llvm/lib/Target/ARM/Disassembler/ |
H A D | ARMDisassembler.cpp | 186 static DecodeStatus DecodeBitfieldMaskOperand(MCInst &Inst, unsigned Insn, 188 static DecodeStatus DecodeCopMemInstruction(MCInst &Inst, unsigned Insn, 191 unsigned Insn, 194 static DecodeStatus DecodeSORegMemOperand(MCInst &Inst, unsigned Insn, 196 static DecodeStatus DecodeAddrMode3Instruction(MCInst &Inst,unsigned Insn, 198 static DecodeStatus DecodeSORegImmOperand(MCInst &Inst, unsigned Insn, 200 static DecodeStatus DecodeSORegRegOperand(MCInst &Inst, unsigned Insn, 204 unsigned Insn, 207 static DecodeStatus DecodeT2MOVTWInstruction(MCInst &Inst, unsigned Insn, 209 static DecodeStatus DecodeArmMOVTWInstruction(MCInst &Inst, unsigned Insn, 411 checkDecodedInstruction(MCInst &MI, uint64_t &Size, uint64_t Address, raw_ostream &OS, raw_ostream &CS, uint32_t Insn, DecodeStatus Result) argument 449 uint32_t Insn = local 1311 DecodeCopMemInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 1461 DecodeAddrMode2IdxInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 1610 DecodeAddrMode3Instruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 1801 DecodeRFEInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 1830 DecodeQADDInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 1853 DecodeMemMultipleWritebackInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 1944 DecodeCPSInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 1991 DecodeT2CPSInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 2033 DecodeT2MOVTWInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 2057 DecodeArmMOVTWInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 2084 DecodeSMLAInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 2112 DecodeTSTInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 2133 DecodeSETPANInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 2206 DecodeT2BInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 2233 DecodeBranchImmInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 2276 DecodeVLDInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 2550 DecodeVLDST1Instruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 2563 DecodeVLDST2Instruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 2578 DecodeVLDST3Instruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 2591 DecodeVLDST4Instruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 2601 DecodeVSTInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 2872 DecodeVLD1DupInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 2919 DecodeVLD2DupInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 2967 DecodeVLD3DupInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 3002 DecodeVLD4DupInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 3055 DecodeNEONModImmInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 3100 DecodeVSHLMaxInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 3143 DecodeTBLInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 3179 DecodeThumbAddSpecialReg(MCInst &Inst, uint16_t Insn, uint64_t Address, const void *Decoder) argument 3302 DecodeT2LoadShift(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 3384 DecodeT2LoadImm8(MCInst &Inst, unsigned Insn, uint64_t Address, const void* Decoder) argument 3468 DecodeT2LoadImm12(MCInst &Inst, unsigned Insn, uint64_t Address, const void* Decoder) argument 3548 DecodeT2LoadT(MCInst &Inst, unsigned Insn, uint64_t Address, const void* Decoder) argument 3587 DecodeT2LoadLabel(MCInst &Inst, unsigned Insn, uint64_t Address, const void* Decoder) argument 3743 DecodeT2LdStPre(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 3830 DecodeThumbAddSPImm(MCInst &Inst, uint16_t Insn, uint64_t Address, const void *Decoder) argument 3841 DecodeThumbAddSPReg(MCInst &Inst, uint16_t Insn, uint64_t Address, const void *Decoder) argument 3866 DecodeThumbCPS(MCInst &Inst, uint16_t Insn, uint64_t Address, const void *Decoder) argument 3877 DecodePostIdxReg(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 3930 DecodeThumbTableBranch(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 3946 DecodeThumb2BCCInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 4155 DecodeDoubleRegLoad(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 4176 DecodeDoubleRegStore(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 4201 DecodeLDRPreImm(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 4226 DecodeLDRPreReg(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 4254 DecodeSTRPreImm(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 4279 DecodeSTRPreReg(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 4304 DecodeVLD1LN(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 4371 DecodeVST1LN(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 4437 DecodeVLD2LN(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 4504 DecodeVST2LN(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 4568 DecodeVLD3LN(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 4638 DecodeVST3LN(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 4702 DecodeVLD4LN(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 4783 DecodeVST4LN(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 4855 DecodeVMOVSRR(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 4881 DecodeVMOVRRS(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 4907 DecodeIT(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 4927 DecodeT2LDRDPreInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 4964 DecodeT2STRDPreInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 4998 DecodeT2Adr(MCInst &Inst, uint32_t Insn, uint64_t Address, const void *Decoder) argument 5024 DecodeSwap(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 5051 DecodeVCVTD(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 5110 DecodeVCVTQ(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument [all...] |
/freebsd-11.0-release/contrib/llvm/lib/Target/Mips/Disassembler/ |
H A D | MipsDisassembler.cpp | 98 unsigned Insn, 132 unsigned Insn, 197 unsigned Insn, 242 unsigned Insn, 247 unsigned Insn, 252 unsigned Insn, 257 unsigned Insn, 262 unsigned Insn, 267 unsigned Insn, 272 unsigned Insn, 808 readInstruction16(ArrayRef<uint8_t> Bytes, uint64_t Address, uint64_t &Size, uint32_t &Insn, bool IsBigEndian) argument 828 readInstruction32(ArrayRef<uint8_t> Bytes, uint64_t Address, uint64_t &Size, uint32_t &Insn, bool IsBigEndian, bool IsMicroMips) argument 867 uint32_t Insn; local 1135 DecodeMem(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 1157 DecodeMemEVA(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 1178 DecodeLoadByte9(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 1196 DecodeLoadByte15(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 1214 DecodeCacheOp(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 1231 DecodeCacheOpMM(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 1248 DecodePrefeOpMM(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 1265 DecodeCacheeOp_CacheOpR6(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 1282 DecodeStoreEvaOpMM(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 1300 DecodeSyncI(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 1315 DecodeSynciR6(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 1330 DecodeMSA128Mem(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 1376 DecodeMemMMImm4(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 1434 DecodeMemMMSPImm5Lsl2(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 1450 DecodeMemMMGPImm7Lsl2(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 1466 DecodeMemMMReglistImm4Lsl2(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 1491 DecodeMemMMImm9(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 1512 DecodeMemMMImm12(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 1547 DecodeMemMMImm16(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 1565 DecodeFMem(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 1583 DecodeFMem2(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 1601 DecodeFMem3(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 1619 DecodeFMemCop2R6(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 1636 DecodeSpecial3LlSc(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 1811 DecodeJumpTarget(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 1878 DecodeJumpTargetMM(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 1935 DecodeSimm16(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 1952 DecodeInsSize(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 1963 DecodeSimm19Lsl2(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 1969 DecodeSimm18Lsl3(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 1975 DecodeSimm9SP(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 1989 DecodeANDI16Imm(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument [all...] |
/freebsd-11.0-release/contrib/llvm/utils/TableGen/ |
H A D | PseudoLoweringEmitter.cpp | 56 CodeGenInstruction &Insn, 74 addDagOperandMapping(Record *Rec, DagInit *Dag, CodeGenInstruction &Insn, argument 93 if (DI->getDef() != Insn.Operands[BaseIdx + i].Rec) 97 Insn.Operands[BaseIdx + i].Rec->getName() + "'"); 101 for (unsigned I = 0, E = Insn.Operands[i].MINumOperands; I != E; ++I) 103 OpsAdded += Insn.Operands[i].MINumOperands; 112 addDagOperandMapping(Rec, SubDag, Insn, OperandMap, BaseIdx + i); 140 CodeGenInstruction Insn(Operator); 142 if (Insn.isCodeGenOnly || Insn [all...] |
H A D | FixedLenDecoderEmitter.cpp | 367 void insnWithID(insn_t &Insn, unsigned Opcode) const { argument 380 Insn.push_back(BIT_UNSET); 382 Insn.push_back(bitFromBits(Bits, i)); 396 bool fieldFromInsn(uint64_t &Field, insn_t &Insn, unsigned StartBit, 427 const insn_t &Insn) const; 507 insn_t Insn; local 510 Owner->insnWithID(Insn, Owner->Opcodes[i]); 514 bool ok = Owner->fieldFromInsn(Field, Insn, StartBit, NumBits); 924 bool FilterChooser::fieldFromInsn(uint64_t &Field, insn_t &Insn, 929 if (Insn[StartBi [all...] |
/freebsd-11.0-release/contrib/llvm/lib/ExecutionEngine/RuntimeDyld/ |
H A D | RuntimeDyldELF.cpp | 509 uint32_t Insn = readBytesUnaligned(TargetPtr, 4); local 519 Insn &= 0xfc000000; 520 Insn |= (Value & 0x0fffffff) >> 2; 521 writeBytesUnaligned(Insn, TargetPtr, 4); 525 Insn &= 0xffff0000; 526 Insn |= ((Value + 0x8000) >> 16) & 0xffff; 527 writeBytesUnaligned(Insn, TargetPtr, 4); 530 Insn &= 0xffff0000; 531 Insn |= Value & 0xffff; 532 writeBytesUnaligned(Insn, TargetPt 733 uint32_t Insn = readBytesUnaligned(TargetPtr, 4); local [all...] |
/freebsd-11.0-release/contrib/llvm/lib/ExecutionEngine/RuntimeDyld/Targets/ |
H A D | RuntimeDyldMachOARM.h | 144 uint32_t Insn = readBytesUnaligned(LocalAddress, 4); variable 145 Insn = (Insn & 0xfff0f000) | ((Value & 0xf000) << 4) | (Value & 0x0fff); 146 writeBytesUnaligned(Insn, LocalAddress, 4);
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/freebsd-11.0-release/contrib/llvm/lib/Target/Sparc/Disassembler/ |
H A D | SparcDisassembler.cpp | 271 uint64_t &Size, uint32_t &Insn, 279 Insn = IsLittleEndian 293 uint32_t Insn; local 296 readInstruction32(Bytes, Address, Size, Insn, isLittleEndian); 302 decodeInstruction(DecoderTableSparc32, Instr, Insn, Address, this, STI); 270 readInstruction32(ArrayRef<uint8_t> Bytes, uint64_t Address, uint64_t &Size, uint32_t &Insn, bool IsLittleEndian) argument
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/freebsd-11.0-release/contrib/llvm/lib/Target/AArch64/Disassembler/ |
H A D | AArch64Disassembler.cpp | 144 static DecodeStatus DecodeFMOVLaneInstruction(llvm::MCInst &Inst, unsigned Insn, 223 uint32_t Insn = local 227 return decodeInstruction(DecoderTable32, MI, Insn, Address, this, STI); 647 static DecodeStatus DecodeFMOVLaneInstruction(llvm::MCInst &Inst, unsigned Insn, argument 652 unsigned Rd = fieldFromInstruction(Insn, 0, 5); 653 unsigned Rn = fieldFromInstruction(Insn, 5, 5); 654 unsigned IsToVec = fieldFromInstruction(Insn, 16, 1);
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/freebsd-11.0-release/contrib/llvm/lib/CodeGen/ |
H A D | CodeGenPrepare.cpp | 420 Instruction *Insn = dyn_cast<Instruction>(UPN->getIncomingValue(I)); local 421 if (Insn && Insn->getParent() == BB && 422 Insn->getParent() != UPN->getIncomingBlock(I)) 5269 Instruction *Insn = &*BI++; local 5270 DbgValueInst *DVI = dyn_cast<DbgValueInst>(Insn); 5277 PrevNonDbgInst = Insn;
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