Lines Matching refs:Insn
98 unsigned Insn,
132 unsigned Insn,
197 unsigned Insn,
242 unsigned Insn,
247 unsigned Insn,
252 unsigned Insn,
257 unsigned Insn,
262 unsigned Insn,
267 unsigned Insn,
272 unsigned Insn,
277 unsigned Insn,
282 unsigned Insn,
287 unsigned Insn,
292 unsigned Insn,
297 unsigned Insn,
301 static DecodeStatus DecodeMSA128Mem(MCInst &Inst, unsigned Insn,
305 unsigned Insn,
310 unsigned Insn,
315 unsigned Insn,
320 unsigned Insn,
325 unsigned Insn,
330 unsigned Insn,
335 unsigned Insn,
339 static DecodeStatus DecodeFMem(MCInst &Inst, unsigned Insn,
343 static DecodeStatus DecodeFMem2(MCInst &Inst, unsigned Insn,
347 static DecodeStatus DecodeFMem3(MCInst &Inst, unsigned Insn,
351 static DecodeStatus DecodeFMemCop2R6(MCInst &Inst, unsigned Insn,
356 unsigned Insn,
386 unsigned Insn,
395 unsigned Insn,
399 static DecodeStatus DecodeSimm19Lsl2(MCInst &Inst, unsigned Insn,
402 static DecodeStatus DecodeSimm18Lsl3(MCInst &Inst, unsigned Insn,
405 static DecodeStatus DecodeSimm9SP(MCInst &Inst, unsigned Insn,
408 static DecodeStatus DecodeANDI16Imm(MCInst &Inst, unsigned Insn,
411 static DecodeStatus DecodeUImm5lsl2(MCInst &Inst, unsigned Insn,
414 static DecodeStatus DecodeSimm23Lsl2(MCInst &Inst, unsigned Insn,
453 static DecodeStatus DecodeRegListOperand(MCInst &Inst, unsigned Insn,
457 static DecodeStatus DecodeRegListOperand16(MCInst &Inst, unsigned Insn,
461 static DecodeStatus DecodeMovePRegPair(MCInst &Inst, unsigned Insn,
809 uint64_t &Size, uint32_t &Insn,
818 Insn = (Bytes[0] << 8) | Bytes[1];
820 Insn = (Bytes[1] << 8) | Bytes[0];
829 uint64_t &Size, uint32_t &Insn,
847 Insn =
851 Insn = (Bytes[2] << 0) | (Bytes[3] << 8) | (Bytes[0] << 16) |
854 Insn = (Bytes[0] << 0) | (Bytes[1] << 8) | (Bytes[2] << 16) |
867 uint32_t Insn;
871 Result = readInstruction16(Bytes, Address, Size, Insn, IsBigEndian);
879 Result = decodeInstruction(DecoderTableMicroMipsR616, Instr, Insn,
890 Result = decodeInstruction(DecoderTableMicroMips16, Instr, Insn, Address,
897 Result = readInstruction32(Bytes, Address, Size, Insn, IsBigEndian, true);
904 Result = decodeInstruction(DecoderTableMicroMipsR632, Instr, Insn, Address,
914 Result = decodeInstruction(DecoderTableMicroMips32, Instr, Insn, Address,
926 Result = readInstruction32(Bytes, Address, Size, Insn, IsBigEndian, false);
935 decodeInstruction(DecoderTableCOP3_32, Instr, Insn, Address, this, STI);
944 Result = decodeInstruction(DecoderTableMips32r6_64r6_GP6432, Instr, Insn,
954 Result = decodeInstruction(DecoderTableMips32r6_64r632, Instr, Insn,
964 Result = decodeInstruction(DecoderTableCnMips32, Instr, Insn,
974 Result = decodeInstruction(DecoderTableMips6432, Instr, Insn,
985 decodeInstruction(DecoderTableMips32, Instr, Insn, Address, this, STI);
1136 unsigned Insn,
1139 int Offset = SignExtend32<16>(Insn & 0xffff);
1140 unsigned Reg = fieldFromInstruction(Insn, 16, 5);
1141 unsigned Base = fieldFromInstruction(Insn, 21, 5);
1158 unsigned Insn,
1161 int Offset = SignExtend32<9>(Insn >> 7);
1162 unsigned Reg = fieldFromInstruction(Insn, 16, 5);
1163 unsigned Base = fieldFromInstruction(Insn, 21, 5);
1179 unsigned Insn,
1182 int Offset = SignExtend32<9>(Insn & 0x1ff);
1183 unsigned Base = fieldFromInstruction(Insn, 16, 5);
1184 unsigned Reg = fieldFromInstruction(Insn, 21, 5);
1197 unsigned Insn,
1200 int Offset = SignExtend32<16>(Insn & 0xffff);
1201 unsigned Base = fieldFromInstruction(Insn, 16, 5);
1202 unsigned Reg = fieldFromInstruction(Insn, 21, 5);
1215 unsigned Insn,
1218 int Offset = SignExtend32<16>(Insn & 0xffff);
1219 unsigned Hint = fieldFromInstruction(Insn, 16, 5);
1220 unsigned Base = fieldFromInstruction(Insn, 21, 5);
1232 unsigned Insn,
1235 int Offset = SignExtend32<12>(Insn & 0xfff);
1236 unsigned Base = fieldFromInstruction(Insn, 16, 5);
1237 unsigned Hint = fieldFromInstruction(Insn, 21, 5);
1249 unsigned Insn,
1252 int Offset = SignExtend32<9>(Insn & 0x1ff);
1253 unsigned Base = fieldFromInstruction(Insn, 16, 5);
1254 unsigned Hint = fieldFromInstruction(Insn, 21, 5);
1266 unsigned Insn,
1269 int Offset = SignExtend32<9>(Insn >> 7);
1270 unsigned Hint = fieldFromInstruction(Insn, 16, 5);
1271 unsigned Base = fieldFromInstruction(Insn, 21, 5);
1283 unsigned Insn,
1286 int Offset = SignExtend32<9>(Insn & 0x1ff);
1287 unsigned Reg = fieldFromInstruction(Insn, 21, 5);
1288 unsigned Base = fieldFromInstruction(Insn, 16, 5);
1301 unsigned Insn,
1304 int Offset = SignExtend32<16>(Insn & 0xffff);
1305 unsigned Base = fieldFromInstruction(Insn, 21, 5);
1316 unsigned Insn,
1319 int Immediate = SignExtend32<16>(Insn & 0xffff);
1320 unsigned Base = fieldFromInstruction(Insn, 16, 5);
1330 static DecodeStatus DecodeMSA128Mem(MCInst &Inst, unsigned Insn,
1332 int Offset = SignExtend32<10>(fieldFromInstruction(Insn, 16, 10));
1333 unsigned Reg = fieldFromInstruction(Insn, 6, 5);
1334 unsigned Base = fieldFromInstruction(Insn, 11, 5);
1377 unsigned Insn,
1380 unsigned Offset = Insn & 0xf;
1381 unsigned Reg = fieldFromInstruction(Insn, 7, 3);
1382 unsigned Base = fieldFromInstruction(Insn, 4, 3);
1435 unsigned Insn,
1438 unsigned Offset = Insn & 0x1F;
1439 unsigned Reg = fieldFromInstruction(Insn, 5, 5);
1451 unsigned Insn,
1454 unsigned Offset = Insn & 0x7F;
1455 unsigned Reg = fieldFromInstruction(Insn, 7, 3);
1467 unsigned Insn,
1474 Offset = fieldFromInstruction(Insn, 4, 4);
1477 Offset = SignExtend32<4>(Insn & 0xf);
1481 if (DecodeRegListOperand16(Inst, Insn, Address, Decoder)
1492 unsigned Insn,
1495 int Offset = SignExtend32<9>(Insn & 0x1ff);
1496 unsigned Reg = fieldFromInstruction(Insn, 21, 5);
1497 unsigned Base = fieldFromInstruction(Insn, 16, 5);
1513 unsigned Insn,
1516 int Offset = SignExtend32<12>(Insn & 0x0fff);
1517 unsigned Reg = fieldFromInstruction(Insn, 21, 5);
1518 unsigned Base = fieldFromInstruction(Insn, 16, 5);
1526 if (DecodeRegListOperand(Inst, Insn, Address, Decoder)
1548 unsigned Insn,
1551 int Offset = SignExtend32<16>(Insn & 0xffff);
1552 unsigned Reg = fieldFromInstruction(Insn, 21, 5);
1553 unsigned Base = fieldFromInstruction(Insn, 16, 5);
1566 unsigned Insn,
1569 int Offset = SignExtend32<16>(Insn & 0xffff);
1570 unsigned Reg = fieldFromInstruction(Insn, 16, 5);
1571 unsigned Base = fieldFromInstruction(Insn, 21, 5);
1584 unsigned Insn,
1587 int Offset = SignExtend32<16>(Insn & 0xffff);
1588 unsigned Reg = fieldFromInstruction(Insn, 16, 5);
1589 unsigned Base = fieldFromInstruction(Insn, 21, 5);
1602 unsigned Insn,
1605 int Offset = SignExtend32<16>(Insn & 0xffff);
1606 unsigned Reg = fieldFromInstruction(Insn, 16, 5);
1607 unsigned Base = fieldFromInstruction(Insn, 21, 5);
1620 unsigned Insn,
1623 int Offset = SignExtend32<11>(Insn & 0x07ff);
1624 unsigned Reg = fieldFromInstruction(Insn, 16, 5);
1625 unsigned Base = fieldFromInstruction(Insn, 11, 5);
1637 unsigned Insn,
1640 int64_t Offset = SignExtend64<9>((Insn >> 7) & 0x1ff);
1641 unsigned Rt = fieldFromInstruction(Insn, 16, 5);
1642 unsigned Base = fieldFromInstruction(Insn, 21, 5);
1812 unsigned Insn,
1816 unsigned JumpOffset = fieldFromInstruction(Insn, 0, 26) << 2;
1879 unsigned Insn,
1882 unsigned JumpOffset = fieldFromInstruction(Insn, 0, 26) << 1;
1936 unsigned Insn,
1939 Inst.addOperand(MCOperand::createImm(SignExtend32<16>(Insn)));
1953 unsigned Insn,
1958 int Size = (int) Insn - Pos + 1;
1963 static DecodeStatus DecodeSimm19Lsl2(MCInst &Inst, unsigned Insn,
1965 Inst.addOperand(MCOperand::createImm(SignExtend32<19>(Insn) * 4));
1969 static DecodeStatus DecodeSimm18Lsl3(MCInst &Inst, unsigned Insn,
1971 Inst.addOperand(MCOperand::createImm(SignExtend32<18>(Insn) * 8));
1975 static DecodeStatus DecodeSimm9SP(MCInst &Inst, unsigned Insn,
1978 switch (Insn) {
1983 default: DecodedValue = SignExtend32<9>(Insn); break;
1989 static DecodeStatus DecodeANDI16Imm(MCInst &Inst, unsigned Insn,
1991 // Insn must be >= 0, since it is unsigned that condition is always true.
1992 assert(Insn < 16);
1995 Inst.addOperand(MCOperand::createImm(DecodedValues[Insn]));
1999 static DecodeStatus DecodeUImm5lsl2(MCInst &Inst, unsigned Insn,
2001 Inst.addOperand(MCOperand::createImm(Insn << 2));
2006 unsigned Insn,
2013 unsigned RegLst = fieldFromInstruction(Insn, 21, 5);
2034 static DecodeStatus DecodeRegListOperand16(MCInst &Inst, unsigned Insn,
2041 RegLst = fieldFromInstruction(Insn, 4, 2);
2045 RegLst = fieldFromInstruction(Insn, 8, 2);
2058 static DecodeStatus DecodeMovePRegPair(MCInst &Inst, unsigned Insn,
2061 unsigned RegPair = fieldFromInstruction(Insn, 7, 3);
2103 static DecodeStatus DecodeSimm23Lsl2(MCInst &Inst, unsigned Insn,
2105 Inst.addOperand(MCOperand::createImm(SignExtend32<25>(Insn << 2)));