Searched refs:GET_H_SR (Results 1 - 25 of 27) sorted by relevance
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt/router/gdb/sim/cris/ |
H A D | crisv10f.c | 85 GET_H_SR (H_SR_PRE_V32_IBR) + vec * 4, 4) == 0) 89 GET_H_SR (H_SR_PRE_V32_IBR) + vec * 4,
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H A D | crisv32f.c | 614 GET_H_SR (H_SR_EBP) + vec * 4, 4) == 0) 618 GET_H_SR (H_SR_EBP) + vec * 4,
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H A D | cpuv10.c | 131 return GET_H_SR (regno);
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H A D | cpuv32.c | 115 return GET_H_SR (regno);
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H A D | semcrisv32f-switch.c | 3110 tmp_newval = GET_H_SR (FLD (f_operand2)); 4003 QI opval = GET_H_SR (FLD (f_operand2)); 4025 QI opval = GET_H_SR (FLD (f_operand2)); 4056 QI opval = GET_H_SR (FLD (f_operand2)); 4078 QI opval = GET_H_SR (FLD (f_operand2)); 4109 SI opval = GET_H_SR (FLD (f_operand2)); 4131 SI opval = GET_H_SR (FLD (f_operand2)); 4162 SI opval = GET_H_SR (FLD (f_operand2)); 4184 SI opval = GET_H_SR (FLD (f_operand2)); 4215 SI opval = GET_H_SR (FL [all...] |
H A D | semcrisv10f-switch.c | 3183 tmp_newval = GET_H_SR (FLD (f_operand2)); 3338 tmp_retaddr = GET_H_SR (FLD (f_operand2)); 3922 HI opval = GET_H_SR (FLD (f_operand2)); 3944 HI opval = GET_H_SR (FLD (f_operand2)); 3975 SI opval = GET_H_SR (FLD (f_operand2)); 3997 SI opval = GET_H_SR (FLD (f_operand2)); 4028 SI opval = GET_H_SR (FLD (f_operand2)); 4050 SI opval = GET_H_SR (FLD (f_operand2)); 4081 SI opval = GET_H_SR (FLD (f_operand2)); 4103 SI opval = GET_H_SR (FL [all...] |
H A D | cpuv10.h | 146 #define GET_H_SR(index) GET_H_SR_V10 (index) macro
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H A D | cpuv32.h | 243 #define GET_H_SR(index) GET_H_SR_V32 (index) macro
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src/router/gdb/sim/cris/ |
H A D | crisv10f.c | 85 GET_H_SR (H_SR_PRE_V32_IBR) + vec * 4, 4) == 0) 89 GET_H_SR (H_SR_PRE_V32_IBR) + vec * 4,
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H A D | crisv32f.c | 614 GET_H_SR (H_SR_EBP) + vec * 4, 4) == 0) 618 GET_H_SR (H_SR_EBP) + vec * 4,
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H A D | cpuv10.c | 131 return GET_H_SR (regno);
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H A D | cpuv32.c | 115 return GET_H_SR (regno);
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H A D | semcrisv32f-switch.c | 3110 tmp_newval = GET_H_SR (FLD (f_operand2)); 4003 QI opval = GET_H_SR (FLD (f_operand2)); 4025 QI opval = GET_H_SR (FLD (f_operand2)); 4056 QI opval = GET_H_SR (FLD (f_operand2)); 4078 QI opval = GET_H_SR (FLD (f_operand2)); 4109 SI opval = GET_H_SR (FLD (f_operand2)); 4131 SI opval = GET_H_SR (FLD (f_operand2)); 4162 SI opval = GET_H_SR (FLD (f_operand2)); 4184 SI opval = GET_H_SR (FLD (f_operand2)); 4215 SI opval = GET_H_SR (FL [all...] |
H A D | semcrisv10f-switch.c | 3183 tmp_newval = GET_H_SR (FLD (f_operand2)); 3338 tmp_retaddr = GET_H_SR (FLD (f_operand2)); 3922 HI opval = GET_H_SR (FLD (f_operand2)); 3944 HI opval = GET_H_SR (FLD (f_operand2)); 3975 SI opval = GET_H_SR (FLD (f_operand2)); 3997 SI opval = GET_H_SR (FLD (f_operand2)); 4028 SI opval = GET_H_SR (FLD (f_operand2)); 4050 SI opval = GET_H_SR (FLD (f_operand2)); 4081 SI opval = GET_H_SR (FLD (f_operand2)); 4103 SI opval = GET_H_SR (FL [all...] |
H A D | cpuv10.h | 146 #define GET_H_SR(index) GET_H_SR_V10 (index) macro
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/router/gdb/sim/cris/ |
H A D | crisv10f.c | 85 GET_H_SR (H_SR_PRE_V32_IBR) + vec * 4, 4) == 0) 89 GET_H_SR (H_SR_PRE_V32_IBR) + vec * 4,
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H A D | crisv32f.c | 614 GET_H_SR (H_SR_EBP) + vec * 4, 4) == 0) 618 GET_H_SR (H_SR_EBP) + vec * 4,
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H A D | cpuv10.c | 131 return GET_H_SR (regno);
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H A D | cpuv32.c | 115 return GET_H_SR (regno);
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H A D | semcrisv32f-switch.c | 3110 tmp_newval = GET_H_SR (FLD (f_operand2)); 4003 QI opval = GET_H_SR (FLD (f_operand2)); 4025 QI opval = GET_H_SR (FLD (f_operand2)); 4056 QI opval = GET_H_SR (FLD (f_operand2)); 4078 QI opval = GET_H_SR (FLD (f_operand2)); 4109 SI opval = GET_H_SR (FLD (f_operand2)); 4131 SI opval = GET_H_SR (FLD (f_operand2)); 4162 SI opval = GET_H_SR (FLD (f_operand2)); 4184 SI opval = GET_H_SR (FLD (f_operand2)); 4215 SI opval = GET_H_SR (FL [all...] |
H A D | semcrisv10f-switch.c | 3183 tmp_newval = GET_H_SR (FLD (f_operand2)); 3338 tmp_retaddr = GET_H_SR (FLD (f_operand2)); 3922 HI opval = GET_H_SR (FLD (f_operand2)); 3944 HI opval = GET_H_SR (FLD (f_operand2)); 3975 SI opval = GET_H_SR (FLD (f_operand2)); 3997 SI opval = GET_H_SR (FLD (f_operand2)); 4028 SI opval = GET_H_SR (FLD (f_operand2)); 4050 SI opval = GET_H_SR (FLD (f_operand2)); 4081 SI opval = GET_H_SR (FLD (f_operand2)); 4103 SI opval = GET_H_SR (FL [all...] |
H A D | cpuv10.h | 146 #define GET_H_SR(index) GET_H_SR_V10 (index) macro
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt/router/gdb/sim/sh64/ |
H A D | cpu.h | 72 #define GET_H_SR() CPU (h_sr) macro
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src/router/gdb/sim/sh64/ |
H A D | cpu.h | 72 #define GET_H_SR() CPU (h_sr) macro
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/router/gdb/sim/sh64/ |
H A D | cpu.h | 72 #define GET_H_SR() CPU (h_sr) macro
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