1/* Simulator instruction semantics for crisv10f. 2 3THIS FILE IS MACHINE GENERATED WITH CGEN. 4 5Copyright 1996-2005 Free Software Foundation, Inc. 6 7This file is part of the GNU simulators. 8 9This program is free software; you can redistribute it and/or modify 10it under the terms of the GNU General Public License as published by 11the Free Software Foundation; either version 3 of the License, or 12(at your option) any later version. 13 14This program is distributed in the hope that it will be useful, 15but WITHOUT ANY WARRANTY; without even the implied warranty of 16MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17GNU General Public License for more details. 18 19You should have received a copy of the GNU General Public License 20along with this program. If not, see <http://www.gnu.org/licenses/>. 21 22*/ 23 24#ifdef DEFINE_LABELS 25 26 /* The labels have the case they have because the enum of insn types 27 is all uppercase and in the non-stdc case the insn symbol is built 28 into the enum name. */ 29 30 static struct { 31 int index; 32 void *label; 33 } labels[] = { 34 { CRISV10F_INSN_X_INVALID, && case_sem_INSN_X_INVALID }, 35 { CRISV10F_INSN_X_AFTER, && case_sem_INSN_X_AFTER }, 36 { CRISV10F_INSN_X_BEFORE, && case_sem_INSN_X_BEFORE }, 37 { CRISV10F_INSN_X_CTI_CHAIN, && case_sem_INSN_X_CTI_CHAIN }, 38 { CRISV10F_INSN_X_CHAIN, && case_sem_INSN_X_CHAIN }, 39 { CRISV10F_INSN_X_BEGIN, && case_sem_INSN_X_BEGIN }, 40 { CRISV10F_INSN_NOP, && case_sem_INSN_NOP }, 41 { CRISV10F_INSN_MOVE_B_R, && case_sem_INSN_MOVE_B_R }, 42 { CRISV10F_INSN_MOVE_W_R, && case_sem_INSN_MOVE_W_R }, 43 { CRISV10F_INSN_MOVE_D_R, && case_sem_INSN_MOVE_D_R }, 44 { CRISV10F_INSN_MOVEPCR, && case_sem_INSN_MOVEPCR }, 45 { CRISV10F_INSN_MOVEQ, && case_sem_INSN_MOVEQ }, 46 { CRISV10F_INSN_MOVS_B_R, && case_sem_INSN_MOVS_B_R }, 47 { CRISV10F_INSN_MOVS_W_R, && case_sem_INSN_MOVS_W_R }, 48 { CRISV10F_INSN_MOVU_B_R, && case_sem_INSN_MOVU_B_R }, 49 { CRISV10F_INSN_MOVU_W_R, && case_sem_INSN_MOVU_W_R }, 50 { CRISV10F_INSN_MOVECBR, && case_sem_INSN_MOVECBR }, 51 { CRISV10F_INSN_MOVECWR, && case_sem_INSN_MOVECWR }, 52 { CRISV10F_INSN_MOVECDR, && case_sem_INSN_MOVECDR }, 53 { CRISV10F_INSN_MOVSCBR, && case_sem_INSN_MOVSCBR }, 54 { CRISV10F_INSN_MOVSCWR, && case_sem_INSN_MOVSCWR }, 55 { CRISV10F_INSN_MOVUCBR, && case_sem_INSN_MOVUCBR }, 56 { CRISV10F_INSN_MOVUCWR, && case_sem_INSN_MOVUCWR }, 57 { CRISV10F_INSN_ADDQ, && case_sem_INSN_ADDQ }, 58 { CRISV10F_INSN_SUBQ, && case_sem_INSN_SUBQ }, 59 { CRISV10F_INSN_CMP_R_B_R, && case_sem_INSN_CMP_R_B_R }, 60 { CRISV10F_INSN_CMP_R_W_R, && case_sem_INSN_CMP_R_W_R }, 61 { CRISV10F_INSN_CMP_R_D_R, && case_sem_INSN_CMP_R_D_R }, 62 { CRISV10F_INSN_CMP_M_B_M, && case_sem_INSN_CMP_M_B_M }, 63 { CRISV10F_INSN_CMP_M_W_M, && case_sem_INSN_CMP_M_W_M }, 64 { CRISV10F_INSN_CMP_M_D_M, && case_sem_INSN_CMP_M_D_M }, 65 { CRISV10F_INSN_CMPCBR, && case_sem_INSN_CMPCBR }, 66 { CRISV10F_INSN_CMPCWR, && case_sem_INSN_CMPCWR }, 67 { CRISV10F_INSN_CMPCDR, && case_sem_INSN_CMPCDR }, 68 { CRISV10F_INSN_CMPQ, && case_sem_INSN_CMPQ }, 69 { CRISV10F_INSN_CMPS_M_B_M, && case_sem_INSN_CMPS_M_B_M }, 70 { CRISV10F_INSN_CMPS_M_W_M, && case_sem_INSN_CMPS_M_W_M }, 71 { CRISV10F_INSN_CMPSCBR, && case_sem_INSN_CMPSCBR }, 72 { CRISV10F_INSN_CMPSCWR, && case_sem_INSN_CMPSCWR }, 73 { CRISV10F_INSN_CMPU_M_B_M, && case_sem_INSN_CMPU_M_B_M }, 74 { CRISV10F_INSN_CMPU_M_W_M, && case_sem_INSN_CMPU_M_W_M }, 75 { CRISV10F_INSN_CMPUCBR, && case_sem_INSN_CMPUCBR }, 76 { CRISV10F_INSN_CMPUCWR, && case_sem_INSN_CMPUCWR }, 77 { CRISV10F_INSN_MOVE_M_B_M, && case_sem_INSN_MOVE_M_B_M }, 78 { CRISV10F_INSN_MOVE_M_W_M, && case_sem_INSN_MOVE_M_W_M }, 79 { CRISV10F_INSN_MOVE_M_D_M, && case_sem_INSN_MOVE_M_D_M }, 80 { CRISV10F_INSN_MOVS_M_B_M, && case_sem_INSN_MOVS_M_B_M }, 81 { CRISV10F_INSN_MOVS_M_W_M, && case_sem_INSN_MOVS_M_W_M }, 82 { CRISV10F_INSN_MOVU_M_B_M, && case_sem_INSN_MOVU_M_B_M }, 83 { CRISV10F_INSN_MOVU_M_W_M, && case_sem_INSN_MOVU_M_W_M }, 84 { CRISV10F_INSN_MOVE_R_SPRV10, && case_sem_INSN_MOVE_R_SPRV10 }, 85 { CRISV10F_INSN_MOVE_SPR_RV10, && case_sem_INSN_MOVE_SPR_RV10 }, 86 { CRISV10F_INSN_RET_TYPE, && case_sem_INSN_RET_TYPE }, 87 { CRISV10F_INSN_MOVE_M_SPRV10, && case_sem_INSN_MOVE_M_SPRV10 }, 88 { CRISV10F_INSN_MOVE_C_SPRV10_P5, && case_sem_INSN_MOVE_C_SPRV10_P5 }, 89 { CRISV10F_INSN_MOVE_C_SPRV10_P9, && case_sem_INSN_MOVE_C_SPRV10_P9 }, 90 { CRISV10F_INSN_MOVE_C_SPRV10_P10, && case_sem_INSN_MOVE_C_SPRV10_P10 }, 91 { CRISV10F_INSN_MOVE_C_SPRV10_P11, && case_sem_INSN_MOVE_C_SPRV10_P11 }, 92 { CRISV10F_INSN_MOVE_C_SPRV10_P12, && case_sem_INSN_MOVE_C_SPRV10_P12 }, 93 { CRISV10F_INSN_MOVE_C_SPRV10_P13, && case_sem_INSN_MOVE_C_SPRV10_P13 }, 94 { CRISV10F_INSN_MOVE_C_SPRV10_P7, && case_sem_INSN_MOVE_C_SPRV10_P7 }, 95 { CRISV10F_INSN_MOVE_C_SPRV10_P14, && case_sem_INSN_MOVE_C_SPRV10_P14 }, 96 { CRISV10F_INSN_MOVE_C_SPRV10_P15, && case_sem_INSN_MOVE_C_SPRV10_P15 }, 97 { CRISV10F_INSN_MOVE_SPR_MV10, && case_sem_INSN_MOVE_SPR_MV10 }, 98 { CRISV10F_INSN_SBFS, && case_sem_INSN_SBFS }, 99 { CRISV10F_INSN_MOVEM_R_M, && case_sem_INSN_MOVEM_R_M }, 100 { CRISV10F_INSN_MOVEM_M_R, && case_sem_INSN_MOVEM_M_R }, 101 { CRISV10F_INSN_MOVEM_M_PC, && case_sem_INSN_MOVEM_M_PC }, 102 { CRISV10F_INSN_ADD_B_R, && case_sem_INSN_ADD_B_R }, 103 { CRISV10F_INSN_ADD_W_R, && case_sem_INSN_ADD_W_R }, 104 { CRISV10F_INSN_ADD_D_R, && case_sem_INSN_ADD_D_R }, 105 { CRISV10F_INSN_ADD_M_B_M, && case_sem_INSN_ADD_M_B_M }, 106 { CRISV10F_INSN_ADD_M_W_M, && case_sem_INSN_ADD_M_W_M }, 107 { CRISV10F_INSN_ADD_M_D_M, && case_sem_INSN_ADD_M_D_M }, 108 { CRISV10F_INSN_ADDCBR, && case_sem_INSN_ADDCBR }, 109 { CRISV10F_INSN_ADDCWR, && case_sem_INSN_ADDCWR }, 110 { CRISV10F_INSN_ADDCDR, && case_sem_INSN_ADDCDR }, 111 { CRISV10F_INSN_ADDCPC, && case_sem_INSN_ADDCPC }, 112 { CRISV10F_INSN_ADDS_B_R, && case_sem_INSN_ADDS_B_R }, 113 { CRISV10F_INSN_ADDS_W_R, && case_sem_INSN_ADDS_W_R }, 114 { CRISV10F_INSN_ADDS_M_B_M, && case_sem_INSN_ADDS_M_B_M }, 115 { CRISV10F_INSN_ADDS_M_W_M, && case_sem_INSN_ADDS_M_W_M }, 116 { CRISV10F_INSN_ADDSCBR, && case_sem_INSN_ADDSCBR }, 117 { CRISV10F_INSN_ADDSCWR, && case_sem_INSN_ADDSCWR }, 118 { CRISV10F_INSN_ADDSPCPC, && case_sem_INSN_ADDSPCPC }, 119 { CRISV10F_INSN_ADDU_B_R, && case_sem_INSN_ADDU_B_R }, 120 { CRISV10F_INSN_ADDU_W_R, && case_sem_INSN_ADDU_W_R }, 121 { CRISV10F_INSN_ADDU_M_B_M, && case_sem_INSN_ADDU_M_B_M }, 122 { CRISV10F_INSN_ADDU_M_W_M, && case_sem_INSN_ADDU_M_W_M }, 123 { CRISV10F_INSN_ADDUCBR, && case_sem_INSN_ADDUCBR }, 124 { CRISV10F_INSN_ADDUCWR, && case_sem_INSN_ADDUCWR }, 125 { CRISV10F_INSN_SUB_B_R, && case_sem_INSN_SUB_B_R }, 126 { CRISV10F_INSN_SUB_W_R, && case_sem_INSN_SUB_W_R }, 127 { CRISV10F_INSN_SUB_D_R, && case_sem_INSN_SUB_D_R }, 128 { CRISV10F_INSN_SUB_M_B_M, && case_sem_INSN_SUB_M_B_M }, 129 { CRISV10F_INSN_SUB_M_W_M, && case_sem_INSN_SUB_M_W_M }, 130 { CRISV10F_INSN_SUB_M_D_M, && case_sem_INSN_SUB_M_D_M }, 131 { CRISV10F_INSN_SUBCBR, && case_sem_INSN_SUBCBR }, 132 { CRISV10F_INSN_SUBCWR, && case_sem_INSN_SUBCWR }, 133 { CRISV10F_INSN_SUBCDR, && case_sem_INSN_SUBCDR }, 134 { CRISV10F_INSN_SUBS_B_R, && case_sem_INSN_SUBS_B_R }, 135 { CRISV10F_INSN_SUBS_W_R, && case_sem_INSN_SUBS_W_R }, 136 { CRISV10F_INSN_SUBS_M_B_M, && case_sem_INSN_SUBS_M_B_M }, 137 { CRISV10F_INSN_SUBS_M_W_M, && case_sem_INSN_SUBS_M_W_M }, 138 { CRISV10F_INSN_SUBSCBR, && case_sem_INSN_SUBSCBR }, 139 { CRISV10F_INSN_SUBSCWR, && case_sem_INSN_SUBSCWR }, 140 { CRISV10F_INSN_SUBU_B_R, && case_sem_INSN_SUBU_B_R }, 141 { CRISV10F_INSN_SUBU_W_R, && case_sem_INSN_SUBU_W_R }, 142 { CRISV10F_INSN_SUBU_M_B_M, && case_sem_INSN_SUBU_M_B_M }, 143 { CRISV10F_INSN_SUBU_M_W_M, && case_sem_INSN_SUBU_M_W_M }, 144 { CRISV10F_INSN_SUBUCBR, && case_sem_INSN_SUBUCBR }, 145 { CRISV10F_INSN_SUBUCWR, && case_sem_INSN_SUBUCWR }, 146 { CRISV10F_INSN_ADDI_B_R, && case_sem_INSN_ADDI_B_R }, 147 { CRISV10F_INSN_ADDI_W_R, && case_sem_INSN_ADDI_W_R }, 148 { CRISV10F_INSN_ADDI_D_R, && case_sem_INSN_ADDI_D_R }, 149 { CRISV10F_INSN_NEG_B_R, && case_sem_INSN_NEG_B_R }, 150 { CRISV10F_INSN_NEG_W_R, && case_sem_INSN_NEG_W_R }, 151 { CRISV10F_INSN_NEG_D_R, && case_sem_INSN_NEG_D_R }, 152 { CRISV10F_INSN_TEST_M_B_M, && case_sem_INSN_TEST_M_B_M }, 153 { CRISV10F_INSN_TEST_M_W_M, && case_sem_INSN_TEST_M_W_M }, 154 { CRISV10F_INSN_TEST_M_D_M, && case_sem_INSN_TEST_M_D_M }, 155 { CRISV10F_INSN_MOVE_R_M_B_M, && case_sem_INSN_MOVE_R_M_B_M }, 156 { CRISV10F_INSN_MOVE_R_M_W_M, && case_sem_INSN_MOVE_R_M_W_M }, 157 { CRISV10F_INSN_MOVE_R_M_D_M, && case_sem_INSN_MOVE_R_M_D_M }, 158 { CRISV10F_INSN_MULS_B, && case_sem_INSN_MULS_B }, 159 { CRISV10F_INSN_MULS_W, && case_sem_INSN_MULS_W }, 160 { CRISV10F_INSN_MULS_D, && case_sem_INSN_MULS_D }, 161 { CRISV10F_INSN_MULU_B, && case_sem_INSN_MULU_B }, 162 { CRISV10F_INSN_MULU_W, && case_sem_INSN_MULU_W }, 163 { CRISV10F_INSN_MULU_D, && case_sem_INSN_MULU_D }, 164 { CRISV10F_INSN_MSTEP, && case_sem_INSN_MSTEP }, 165 { CRISV10F_INSN_DSTEP, && case_sem_INSN_DSTEP }, 166 { CRISV10F_INSN_ABS, && case_sem_INSN_ABS }, 167 { CRISV10F_INSN_AND_B_R, && case_sem_INSN_AND_B_R }, 168 { CRISV10F_INSN_AND_W_R, && case_sem_INSN_AND_W_R }, 169 { CRISV10F_INSN_AND_D_R, && case_sem_INSN_AND_D_R }, 170 { CRISV10F_INSN_AND_M_B_M, && case_sem_INSN_AND_M_B_M }, 171 { CRISV10F_INSN_AND_M_W_M, && case_sem_INSN_AND_M_W_M }, 172 { CRISV10F_INSN_AND_M_D_M, && case_sem_INSN_AND_M_D_M }, 173 { CRISV10F_INSN_ANDCBR, && case_sem_INSN_ANDCBR }, 174 { CRISV10F_INSN_ANDCWR, && case_sem_INSN_ANDCWR }, 175 { CRISV10F_INSN_ANDCDR, && case_sem_INSN_ANDCDR }, 176 { CRISV10F_INSN_ANDQ, && case_sem_INSN_ANDQ }, 177 { CRISV10F_INSN_ORR_B_R, && case_sem_INSN_ORR_B_R }, 178 { CRISV10F_INSN_ORR_W_R, && case_sem_INSN_ORR_W_R }, 179 { CRISV10F_INSN_ORR_D_R, && case_sem_INSN_ORR_D_R }, 180 { CRISV10F_INSN_OR_M_B_M, && case_sem_INSN_OR_M_B_M }, 181 { CRISV10F_INSN_OR_M_W_M, && case_sem_INSN_OR_M_W_M }, 182 { CRISV10F_INSN_OR_M_D_M, && case_sem_INSN_OR_M_D_M }, 183 { CRISV10F_INSN_ORCBR, && case_sem_INSN_ORCBR }, 184 { CRISV10F_INSN_ORCWR, && case_sem_INSN_ORCWR }, 185 { CRISV10F_INSN_ORCDR, && case_sem_INSN_ORCDR }, 186 { CRISV10F_INSN_ORQ, && case_sem_INSN_ORQ }, 187 { CRISV10F_INSN_XOR, && case_sem_INSN_XOR }, 188 { CRISV10F_INSN_SWAP, && case_sem_INSN_SWAP }, 189 { CRISV10F_INSN_ASRR_B_R, && case_sem_INSN_ASRR_B_R }, 190 { CRISV10F_INSN_ASRR_W_R, && case_sem_INSN_ASRR_W_R }, 191 { CRISV10F_INSN_ASRR_D_R, && case_sem_INSN_ASRR_D_R }, 192 { CRISV10F_INSN_ASRQ, && case_sem_INSN_ASRQ }, 193 { CRISV10F_INSN_LSRR_B_R, && case_sem_INSN_LSRR_B_R }, 194 { CRISV10F_INSN_LSRR_W_R, && case_sem_INSN_LSRR_W_R }, 195 { CRISV10F_INSN_LSRR_D_R, && case_sem_INSN_LSRR_D_R }, 196 { CRISV10F_INSN_LSRQ, && case_sem_INSN_LSRQ }, 197 { CRISV10F_INSN_LSLR_B_R, && case_sem_INSN_LSLR_B_R }, 198 { CRISV10F_INSN_LSLR_W_R, && case_sem_INSN_LSLR_W_R }, 199 { CRISV10F_INSN_LSLR_D_R, && case_sem_INSN_LSLR_D_R }, 200 { CRISV10F_INSN_LSLQ, && case_sem_INSN_LSLQ }, 201 { CRISV10F_INSN_BTST, && case_sem_INSN_BTST }, 202 { CRISV10F_INSN_BTSTQ, && case_sem_INSN_BTSTQ }, 203 { CRISV10F_INSN_SETF, && case_sem_INSN_SETF }, 204 { CRISV10F_INSN_CLEARF, && case_sem_INSN_CLEARF }, 205 { CRISV10F_INSN_BCC_B, && case_sem_INSN_BCC_B }, 206 { CRISV10F_INSN_BA_B, && case_sem_INSN_BA_B }, 207 { CRISV10F_INSN_BCC_W, && case_sem_INSN_BCC_W }, 208 { CRISV10F_INSN_BA_W, && case_sem_INSN_BA_W }, 209 { CRISV10F_INSN_JUMP_R, && case_sem_INSN_JUMP_R }, 210 { CRISV10F_INSN_JUMP_M, && case_sem_INSN_JUMP_M }, 211 { CRISV10F_INSN_JUMP_C, && case_sem_INSN_JUMP_C }, 212 { CRISV10F_INSN_BREAK, && case_sem_INSN_BREAK }, 213 { CRISV10F_INSN_BOUND_R_B_R, && case_sem_INSN_BOUND_R_B_R }, 214 { CRISV10F_INSN_BOUND_R_W_R, && case_sem_INSN_BOUND_R_W_R }, 215 { CRISV10F_INSN_BOUND_R_D_R, && case_sem_INSN_BOUND_R_D_R }, 216 { CRISV10F_INSN_BOUND_M_B_M, && case_sem_INSN_BOUND_M_B_M }, 217 { CRISV10F_INSN_BOUND_M_W_M, && case_sem_INSN_BOUND_M_W_M }, 218 { CRISV10F_INSN_BOUND_M_D_M, && case_sem_INSN_BOUND_M_D_M }, 219 { CRISV10F_INSN_BOUND_CB, && case_sem_INSN_BOUND_CB }, 220 { CRISV10F_INSN_BOUND_CW, && case_sem_INSN_BOUND_CW }, 221 { CRISV10F_INSN_BOUND_CD, && case_sem_INSN_BOUND_CD }, 222 { CRISV10F_INSN_SCC, && case_sem_INSN_SCC }, 223 { CRISV10F_INSN_LZ, && case_sem_INSN_LZ }, 224 { CRISV10F_INSN_ADDOQ, && case_sem_INSN_ADDOQ }, 225 { CRISV10F_INSN_BDAPQPC, && case_sem_INSN_BDAPQPC }, 226 { CRISV10F_INSN_BDAP_32_PC, && case_sem_INSN_BDAP_32_PC }, 227 { CRISV10F_INSN_MOVE_M_PCPLUS_P0, && case_sem_INSN_MOVE_M_PCPLUS_P0 }, 228 { CRISV10F_INSN_MOVE_M_SPPLUS_P8, && case_sem_INSN_MOVE_M_SPPLUS_P8 }, 229 { CRISV10F_INSN_ADDO_M_B_M, && case_sem_INSN_ADDO_M_B_M }, 230 { CRISV10F_INSN_ADDO_M_W_M, && case_sem_INSN_ADDO_M_W_M }, 231 { CRISV10F_INSN_ADDO_M_D_M, && case_sem_INSN_ADDO_M_D_M }, 232 { CRISV10F_INSN_ADDO_CB, && case_sem_INSN_ADDO_CB }, 233 { CRISV10F_INSN_ADDO_CW, && case_sem_INSN_ADDO_CW }, 234 { CRISV10F_INSN_ADDO_CD, && case_sem_INSN_ADDO_CD }, 235 { CRISV10F_INSN_DIP_M, && case_sem_INSN_DIP_M }, 236 { CRISV10F_INSN_DIP_C, && case_sem_INSN_DIP_C }, 237 { CRISV10F_INSN_ADDI_ACR_B_R, && case_sem_INSN_ADDI_ACR_B_R }, 238 { CRISV10F_INSN_ADDI_ACR_W_R, && case_sem_INSN_ADDI_ACR_W_R }, 239 { CRISV10F_INSN_ADDI_ACR_D_R, && case_sem_INSN_ADDI_ACR_D_R }, 240 { CRISV10F_INSN_BIAP_PC_B_R, && case_sem_INSN_BIAP_PC_B_R }, 241 { CRISV10F_INSN_BIAP_PC_W_R, && case_sem_INSN_BIAP_PC_W_R }, 242 { CRISV10F_INSN_BIAP_PC_D_R, && case_sem_INSN_BIAP_PC_D_R }, 243 { 0, 0 } 244 }; 245 int i; 246 247 for (i = 0; labels[i].label != 0; ++i) 248 { 249#if FAST_P 250 CPU_IDESC (current_cpu) [labels[i].index].sem_fast_lab = labels[i].label; 251#else 252 CPU_IDESC (current_cpu) [labels[i].index].sem_full_lab = labels[i].label; 253#endif 254 } 255 256#undef DEFINE_LABELS 257#endif /* DEFINE_LABELS */ 258 259#ifdef DEFINE_SWITCH 260 261/* If hyper-fast [well not unnecessarily slow] execution is selected, turn 262 off frills like tracing and profiling. */ 263/* FIXME: A better way would be to have TRACE_RESULT check for something 264 that can cause it to be optimized out. Another way would be to emit 265 special handlers into the instruction "stream". */ 266 267#if FAST_P 268#undef TRACE_RESULT 269#define TRACE_RESULT(cpu, abuf, name, type, val) 270#endif 271 272#undef GET_ATTR 273#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE) 274#define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_##attr) 275#else 276#define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_/**/attr) 277#endif 278 279{ 280 281#if WITH_SCACHE_PBB 282 283/* Branch to next handler without going around main loop. */ 284#define NEXT(vpc) goto * SEM_ARGBUF (vpc) -> semantic.sem_case 285SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) 286 287#else /* ! WITH_SCACHE_PBB */ 288 289#define NEXT(vpc) BREAK (sem) 290#ifdef __GNUC__ 291#if FAST_P 292 SWITCH (sem, SEM_ARGBUF (sc) -> idesc->sem_fast_lab) 293#else 294 SWITCH (sem, SEM_ARGBUF (sc) -> idesc->sem_full_lab) 295#endif 296#else 297 SWITCH (sem, SEM_ARGBUF (sc) -> idesc->num) 298#endif 299 300#endif /* ! WITH_SCACHE_PBB */ 301 302 { 303 304 CASE (sem, INSN_X_INVALID) : /* --invalid-- */ 305{ 306 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 307 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 308#define FLD(f) abuf->fields.fmt_empty.f 309 int UNUSED written = 0; 310 IADDR UNUSED pc = abuf->addr; 311 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 312 313 { 314 /* Update the recorded pc in the cpu state struct. 315 Only necessary for WITH_SCACHE case, but to avoid the 316 conditional compilation .... */ 317 SET_H_PC (pc); 318 /* Virtual insns have zero size. Overwrite vpc with address of next insn 319 using the default-insn-bitsize spec. When executing insns in parallel 320 we may want to queue the fault and continue execution. */ 321 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 322 vpc = sim_engine_invalid_insn (current_cpu, pc, vpc); 323 } 324 325#undef FLD 326} 327 NEXT (vpc); 328 329 CASE (sem, INSN_X_AFTER) : /* --after-- */ 330{ 331 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 332 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 333#define FLD(f) abuf->fields.fmt_empty.f 334 int UNUSED written = 0; 335 IADDR UNUSED pc = abuf->addr; 336 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 337 338 { 339#if WITH_SCACHE_PBB_CRISV10F 340 crisv10f_pbb_after (current_cpu, sem_arg); 341#endif 342 } 343 344#undef FLD 345} 346 NEXT (vpc); 347 348 CASE (sem, INSN_X_BEFORE) : /* --before-- */ 349{ 350 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 351 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 352#define FLD(f) abuf->fields.fmt_empty.f 353 int UNUSED written = 0; 354 IADDR UNUSED pc = abuf->addr; 355 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 356 357 { 358#if WITH_SCACHE_PBB_CRISV10F 359 crisv10f_pbb_before (current_cpu, sem_arg); 360#endif 361 } 362 363#undef FLD 364} 365 NEXT (vpc); 366 367 CASE (sem, INSN_X_CTI_CHAIN) : /* --cti-chain-- */ 368{ 369 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 370 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 371#define FLD(f) abuf->fields.fmt_empty.f 372 int UNUSED written = 0; 373 IADDR UNUSED pc = abuf->addr; 374 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 375 376 { 377#if WITH_SCACHE_PBB_CRISV10F 378#ifdef DEFINE_SWITCH 379 vpc = crisv10f_pbb_cti_chain (current_cpu, sem_arg, 380 pbb_br_type, pbb_br_npc); 381 BREAK (sem); 382#else 383 /* FIXME: Allow provision of explicit ifmt spec in insn spec. */ 384 vpc = crisv10f_pbb_cti_chain (current_cpu, sem_arg, 385 CPU_PBB_BR_TYPE (current_cpu), 386 CPU_PBB_BR_NPC (current_cpu)); 387#endif 388#endif 389 } 390 391#undef FLD 392} 393 NEXT (vpc); 394 395 CASE (sem, INSN_X_CHAIN) : /* --chain-- */ 396{ 397 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 398 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 399#define FLD(f) abuf->fields.fmt_empty.f 400 int UNUSED written = 0; 401 IADDR UNUSED pc = abuf->addr; 402 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 403 404 { 405#if WITH_SCACHE_PBB_CRISV10F 406 vpc = crisv10f_pbb_chain (current_cpu, sem_arg); 407#ifdef DEFINE_SWITCH 408 BREAK (sem); 409#endif 410#endif 411 } 412 413#undef FLD 414} 415 NEXT (vpc); 416 417 CASE (sem, INSN_X_BEGIN) : /* --begin-- */ 418{ 419 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 420 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 421#define FLD(f) abuf->fields.fmt_empty.f 422 int UNUSED written = 0; 423 IADDR UNUSED pc = abuf->addr; 424 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 425 426 { 427#if WITH_SCACHE_PBB_CRISV10F 428#if defined DEFINE_SWITCH || defined FAST_P 429 /* In the switch case FAST_P is a constant, allowing several optimizations 430 in any called inline functions. */ 431 vpc = crisv10f_pbb_begin (current_cpu, FAST_P); 432#else 433#if 0 /* cgen engine can't handle dynamic fast/full switching yet. */ 434 vpc = crisv10f_pbb_begin (current_cpu, STATE_RUN_FAST_P (CPU_STATE (current_cpu))); 435#else 436 vpc = crisv10f_pbb_begin (current_cpu, 0); 437#endif 438#endif 439#endif 440 } 441 442#undef FLD 443} 444 NEXT (vpc); 445 446 CASE (sem, INSN_NOP) : /* nop */ 447{ 448 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 449 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 450#define FLD(f) abuf->fields.fmt_empty.f 451 int UNUSED written = 0; 452 IADDR UNUSED pc = abuf->addr; 453 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 454 455{ 456 { 457 BI opval = 0; 458 CPU (h_xbit) = opval; 459 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 460 } 461 { 462 BI opval = 0; 463 SET_H_INSN_PREFIXED_P (opval); 464 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 465 } 466} 467 468#undef FLD 469} 470 NEXT (vpc); 471 472 CASE (sem, INSN_MOVE_B_R) : /* move.b move.m ${Rs},${Rd} */ 473{ 474 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 475 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 476#define FLD(f) abuf->fields.sfmt_add_b_r.f 477 int UNUSED written = 0; 478 IADDR UNUSED pc = abuf->addr; 479 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 480 481{ 482 QI tmp_newval; 483 tmp_newval = GET_H_GR (FLD (f_operand1)); 484{ 485 SI tmp_oldregval; 486 tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2)); 487 { 488 SI opval = ORSI (ANDSI (tmp_newval, 255), ANDSI (tmp_oldregval, 0xffffff00)); 489 SET_H_GR (FLD (f_operand2), opval); 490 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 491 } 492} 493{ 494 { 495 BI opval = LTQI (tmp_newval, 0); 496 CPU (h_nbit) = opval; 497 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 498 } 499 { 500 BI opval = ANDIF (EQQI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 501 CPU (h_zbit) = opval; 502 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 503 } 504SET_H_CBIT_MOVE (0); 505SET_H_VBIT_MOVE (0); 506{ 507 { 508 BI opval = 0; 509 CPU (h_xbit) = opval; 510 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 511 } 512 { 513 BI opval = 0; 514 SET_H_INSN_PREFIXED_P (opval); 515 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 516 } 517} 518} 519} 520 521#undef FLD 522} 523 NEXT (vpc); 524 525 CASE (sem, INSN_MOVE_W_R) : /* move.w move.m ${Rs},${Rd} */ 526{ 527 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 528 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 529#define FLD(f) abuf->fields.sfmt_add_b_r.f 530 int UNUSED written = 0; 531 IADDR UNUSED pc = abuf->addr; 532 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 533 534{ 535 HI tmp_newval; 536 tmp_newval = GET_H_GR (FLD (f_operand1)); 537{ 538 SI tmp_oldregval; 539 tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2)); 540 { 541 SI opval = ORSI (ANDSI (tmp_newval, 65535), ANDSI (tmp_oldregval, 0xffff0000)); 542 SET_H_GR (FLD (f_operand2), opval); 543 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 544 } 545} 546{ 547 { 548 BI opval = LTHI (tmp_newval, 0); 549 CPU (h_nbit) = opval; 550 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 551 } 552 { 553 BI opval = ANDIF (EQHI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 554 CPU (h_zbit) = opval; 555 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 556 } 557SET_H_CBIT_MOVE (0); 558SET_H_VBIT_MOVE (0); 559{ 560 { 561 BI opval = 0; 562 CPU (h_xbit) = opval; 563 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 564 } 565 { 566 BI opval = 0; 567 SET_H_INSN_PREFIXED_P (opval); 568 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 569 } 570} 571} 572} 573 574#undef FLD 575} 576 NEXT (vpc); 577 578 CASE (sem, INSN_MOVE_D_R) : /* move.d move.m ${Rs},${Rd} */ 579{ 580 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 581 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 582#define FLD(f) abuf->fields.sfmt_add_b_r.f 583 int UNUSED written = 0; 584 IADDR UNUSED pc = abuf->addr; 585 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 586 587{ 588 SI tmp_newval; 589 tmp_newval = GET_H_GR (FLD (f_operand1)); 590 { 591 SI opval = tmp_newval; 592 SET_H_GR (FLD (f_operand2), opval); 593 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 594 } 595{ 596 { 597 BI opval = LTSI (tmp_newval, 0); 598 CPU (h_nbit) = opval; 599 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 600 } 601 { 602 BI opval = ANDIF (EQSI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 603 CPU (h_zbit) = opval; 604 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 605 } 606SET_H_CBIT_MOVE (0); 607SET_H_VBIT_MOVE (0); 608{ 609 { 610 BI opval = 0; 611 CPU (h_xbit) = opval; 612 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 613 } 614 { 615 BI opval = 0; 616 SET_H_INSN_PREFIXED_P (opval); 617 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 618 } 619} 620} 621} 622 623#undef FLD 624} 625 NEXT (vpc); 626 627 CASE (sem, INSN_MOVEPCR) : /* move.d PC,${Rd} */ 628{ 629 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 630 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 631#define FLD(f) abuf->fields.sfmt_moveq.f 632 int UNUSED written = 0; 633 IADDR UNUSED pc = abuf->addr; 634 SEM_BRANCH_INIT 635 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 636 637{ 638 SI tmp_pcval; 639 tmp_pcval = ADDSI (pc, 2); 640 { 641 SI opval = tmp_pcval; 642 SET_H_GR (FLD (f_operand2), opval); 643 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 644 } 645{ 646 { 647 BI opval = LTSI (tmp_pcval, 0); 648 CPU (h_nbit) = opval; 649 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 650 } 651 { 652 BI opval = ANDIF (EQSI (tmp_pcval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 653 CPU (h_zbit) = opval; 654 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 655 } 656SET_H_CBIT_MOVE (0); 657SET_H_VBIT_MOVE (0); 658{ 659 { 660 BI opval = 0; 661 CPU (h_xbit) = opval; 662 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 663 } 664 { 665 BI opval = 0; 666 SET_H_INSN_PREFIXED_P (opval); 667 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 668 } 669} 670} 671} 672 673 SEM_BRANCH_FINI (vpc); 674#undef FLD 675} 676 NEXT (vpc); 677 678 CASE (sem, INSN_MOVEQ) : /* moveq $i,$Rd */ 679{ 680 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 681 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 682#define FLD(f) abuf->fields.sfmt_moveq.f 683 int UNUSED written = 0; 684 IADDR UNUSED pc = abuf->addr; 685 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 686 687{ 688 SI tmp_newval; 689 tmp_newval = FLD (f_s6); 690 { 691 SI opval = tmp_newval; 692 SET_H_GR (FLD (f_operand2), opval); 693 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 694 } 695{ 696SET_H_NBIT_MOVE (LTSI (tmp_newval, 0)); 697SET_H_ZBIT_MOVE (ANDIF (EQSI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)))); 698SET_H_CBIT_MOVE (0); 699SET_H_VBIT_MOVE (0); 700{ 701 { 702 BI opval = 0; 703 CPU (h_xbit) = opval; 704 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 705 } 706 { 707 BI opval = 0; 708 SET_H_INSN_PREFIXED_P (opval); 709 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 710 } 711} 712} 713} 714 715#undef FLD 716} 717 NEXT (vpc); 718 719 CASE (sem, INSN_MOVS_B_R) : /* movs.b movs.m ${Rs},${Rd} */ 720{ 721 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 722 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 723#define FLD(f) abuf->fields.sfmt_muls_b.f 724 int UNUSED written = 0; 725 IADDR UNUSED pc = abuf->addr; 726 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 727 728{ 729 QI tmp_newval; 730 tmp_newval = GET_H_GR (FLD (f_operand1)); 731 { 732 SI opval = EXTQISI (tmp_newval); 733 SET_H_GR (FLD (f_operand2), opval); 734 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 735 } 736{ 737 { 738 BI opval = LTSI (tmp_newval, 0); 739 CPU (h_nbit) = opval; 740 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 741 } 742 { 743 BI opval = ANDIF (EQSI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 744 CPU (h_zbit) = opval; 745 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 746 } 747SET_H_CBIT_MOVE (0); 748SET_H_VBIT_MOVE (0); 749{ 750 { 751 BI opval = 0; 752 CPU (h_xbit) = opval; 753 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 754 } 755 { 756 BI opval = 0; 757 SET_H_INSN_PREFIXED_P (opval); 758 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 759 } 760} 761} 762} 763 764#undef FLD 765} 766 NEXT (vpc); 767 768 CASE (sem, INSN_MOVS_W_R) : /* movs.w movs.m ${Rs},${Rd} */ 769{ 770 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 771 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 772#define FLD(f) abuf->fields.sfmt_muls_b.f 773 int UNUSED written = 0; 774 IADDR UNUSED pc = abuf->addr; 775 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 776 777{ 778 HI tmp_newval; 779 tmp_newval = GET_H_GR (FLD (f_operand1)); 780 { 781 SI opval = EXTHISI (tmp_newval); 782 SET_H_GR (FLD (f_operand2), opval); 783 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 784 } 785{ 786 { 787 BI opval = LTSI (tmp_newval, 0); 788 CPU (h_nbit) = opval; 789 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 790 } 791 { 792 BI opval = ANDIF (EQSI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 793 CPU (h_zbit) = opval; 794 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 795 } 796SET_H_CBIT_MOVE (0); 797SET_H_VBIT_MOVE (0); 798{ 799 { 800 BI opval = 0; 801 CPU (h_xbit) = opval; 802 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 803 } 804 { 805 BI opval = 0; 806 SET_H_INSN_PREFIXED_P (opval); 807 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 808 } 809} 810} 811} 812 813#undef FLD 814} 815 NEXT (vpc); 816 817 CASE (sem, INSN_MOVU_B_R) : /* movu.b movu.m ${Rs},${Rd} */ 818{ 819 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 820 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 821#define FLD(f) abuf->fields.sfmt_muls_b.f 822 int UNUSED written = 0; 823 IADDR UNUSED pc = abuf->addr; 824 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 825 826{ 827 QI tmp_newval; 828 tmp_newval = GET_H_GR (FLD (f_operand1)); 829 { 830 SI opval = ZEXTQISI (tmp_newval); 831 SET_H_GR (FLD (f_operand2), opval); 832 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 833 } 834{ 835 { 836 BI opval = LTSI (tmp_newval, 0); 837 CPU (h_nbit) = opval; 838 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 839 } 840 { 841 BI opval = ANDIF (EQSI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 842 CPU (h_zbit) = opval; 843 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 844 } 845SET_H_CBIT_MOVE (0); 846SET_H_VBIT_MOVE (0); 847{ 848 { 849 BI opval = 0; 850 CPU (h_xbit) = opval; 851 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 852 } 853 { 854 BI opval = 0; 855 SET_H_INSN_PREFIXED_P (opval); 856 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 857 } 858} 859} 860} 861 862#undef FLD 863} 864 NEXT (vpc); 865 866 CASE (sem, INSN_MOVU_W_R) : /* movu.w movu.m ${Rs},${Rd} */ 867{ 868 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 869 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 870#define FLD(f) abuf->fields.sfmt_muls_b.f 871 int UNUSED written = 0; 872 IADDR UNUSED pc = abuf->addr; 873 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 874 875{ 876 HI tmp_newval; 877 tmp_newval = GET_H_GR (FLD (f_operand1)); 878 { 879 SI opval = ZEXTHISI (tmp_newval); 880 SET_H_GR (FLD (f_operand2), opval); 881 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 882 } 883{ 884 { 885 BI opval = LTSI (tmp_newval, 0); 886 CPU (h_nbit) = opval; 887 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 888 } 889 { 890 BI opval = ANDIF (EQSI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 891 CPU (h_zbit) = opval; 892 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 893 } 894SET_H_CBIT_MOVE (0); 895SET_H_VBIT_MOVE (0); 896{ 897 { 898 BI opval = 0; 899 CPU (h_xbit) = opval; 900 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 901 } 902 { 903 BI opval = 0; 904 SET_H_INSN_PREFIXED_P (opval); 905 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 906 } 907} 908} 909} 910 911#undef FLD 912} 913 NEXT (vpc); 914 915 CASE (sem, INSN_MOVECBR) : /* move.b ${sconst8},${Rd} */ 916{ 917 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 918 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 919#define FLD(f) abuf->fields.sfmt_addcbr.f 920 int UNUSED written = 0; 921 IADDR UNUSED pc = abuf->addr; 922 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 923 924{ 925 QI tmp_newval; 926 tmp_newval = FLD (f_indir_pc__byte); 927{ 928 SI tmp_oldregval; 929 tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2)); 930 { 931 SI opval = ORSI (ANDSI (tmp_newval, 255), ANDSI (tmp_oldregval, 0xffffff00)); 932 SET_H_GR (FLD (f_operand2), opval); 933 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 934 } 935} 936{ 937 { 938 BI opval = LTQI (tmp_newval, 0); 939 CPU (h_nbit) = opval; 940 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 941 } 942 { 943 BI opval = ANDIF (EQQI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 944 CPU (h_zbit) = opval; 945 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 946 } 947SET_H_CBIT_MOVE (0); 948SET_H_VBIT_MOVE (0); 949{ 950 { 951 BI opval = 0; 952 CPU (h_xbit) = opval; 953 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 954 } 955 { 956 BI opval = 0; 957 SET_H_INSN_PREFIXED_P (opval); 958 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 959 } 960} 961} 962} 963 964#undef FLD 965} 966 NEXT (vpc); 967 968 CASE (sem, INSN_MOVECWR) : /* move.w ${sconst16},${Rd} */ 969{ 970 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 971 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 972#define FLD(f) abuf->fields.sfmt_addcwr.f 973 int UNUSED written = 0; 974 IADDR UNUSED pc = abuf->addr; 975 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 976 977{ 978 HI tmp_newval; 979 tmp_newval = FLD (f_indir_pc__word); 980{ 981 SI tmp_oldregval; 982 tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2)); 983 { 984 SI opval = ORSI (ANDSI (tmp_newval, 65535), ANDSI (tmp_oldregval, 0xffff0000)); 985 SET_H_GR (FLD (f_operand2), opval); 986 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 987 } 988} 989{ 990 { 991 BI opval = LTHI (tmp_newval, 0); 992 CPU (h_nbit) = opval; 993 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 994 } 995 { 996 BI opval = ANDIF (EQHI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 997 CPU (h_zbit) = opval; 998 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 999 } 1000SET_H_CBIT_MOVE (0); 1001SET_H_VBIT_MOVE (0); 1002{ 1003 { 1004 BI opval = 0; 1005 CPU (h_xbit) = opval; 1006 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 1007 } 1008 { 1009 BI opval = 0; 1010 SET_H_INSN_PREFIXED_P (opval); 1011 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 1012 } 1013} 1014} 1015} 1016 1017#undef FLD 1018} 1019 NEXT (vpc); 1020 1021 CASE (sem, INSN_MOVECDR) : /* move.d ${const32},${Rd} */ 1022{ 1023 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1024 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1025#define FLD(f) abuf->fields.sfmt_bound_cd.f 1026 int UNUSED written = 0; 1027 IADDR UNUSED pc = abuf->addr; 1028 vpc = SEM_NEXT_VPC (sem_arg, pc, 6); 1029 1030{ 1031 SI tmp_newval; 1032 tmp_newval = FLD (f_indir_pc__dword); 1033 { 1034 SI opval = tmp_newval; 1035 SET_H_GR (FLD (f_operand2), opval); 1036 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1037 } 1038{ 1039 { 1040 BI opval = LTSI (tmp_newval, 0); 1041 CPU (h_nbit) = opval; 1042 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 1043 } 1044 { 1045 BI opval = ANDIF (EQSI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 1046 CPU (h_zbit) = opval; 1047 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 1048 } 1049SET_H_CBIT_MOVE (0); 1050SET_H_VBIT_MOVE (0); 1051{ 1052 { 1053 BI opval = 0; 1054 CPU (h_xbit) = opval; 1055 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 1056 } 1057 { 1058 BI opval = 0; 1059 SET_H_INSN_PREFIXED_P (opval); 1060 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 1061 } 1062} 1063} 1064} 1065 1066#undef FLD 1067} 1068 NEXT (vpc); 1069 1070 CASE (sem, INSN_MOVSCBR) : /* movs.b ${sconst8},${Rd} */ 1071{ 1072 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1073 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1074#define FLD(f) abuf->fields.sfmt_bound_cb.f 1075 int UNUSED written = 0; 1076 IADDR UNUSED pc = abuf->addr; 1077 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 1078 1079{ 1080 SI tmp_newval; 1081 tmp_newval = EXTQISI (TRUNCSIQI (FLD (f_indir_pc__byte))); 1082 { 1083 SI opval = tmp_newval; 1084 SET_H_GR (FLD (f_operand2), opval); 1085 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1086 } 1087{ 1088 { 1089 BI opval = LTSI (tmp_newval, 0); 1090 CPU (h_nbit) = opval; 1091 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 1092 } 1093 { 1094 BI opval = ANDIF (EQSI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 1095 CPU (h_zbit) = opval; 1096 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 1097 } 1098SET_H_CBIT_MOVE (0); 1099SET_H_VBIT_MOVE (0); 1100{ 1101 { 1102 BI opval = 0; 1103 CPU (h_xbit) = opval; 1104 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 1105 } 1106 { 1107 BI opval = 0; 1108 SET_H_INSN_PREFIXED_P (opval); 1109 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 1110 } 1111} 1112} 1113} 1114 1115#undef FLD 1116} 1117 NEXT (vpc); 1118 1119 CASE (sem, INSN_MOVSCWR) : /* movs.w ${sconst16},${Rd} */ 1120{ 1121 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1122 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1123#define FLD(f) abuf->fields.sfmt_bound_cw.f 1124 int UNUSED written = 0; 1125 IADDR UNUSED pc = abuf->addr; 1126 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 1127 1128{ 1129 SI tmp_newval; 1130 tmp_newval = EXTHISI (TRUNCSIHI (FLD (f_indir_pc__word))); 1131 { 1132 SI opval = tmp_newval; 1133 SET_H_GR (FLD (f_operand2), opval); 1134 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1135 } 1136{ 1137 { 1138 BI opval = LTSI (tmp_newval, 0); 1139 CPU (h_nbit) = opval; 1140 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 1141 } 1142 { 1143 BI opval = ANDIF (EQSI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 1144 CPU (h_zbit) = opval; 1145 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 1146 } 1147SET_H_CBIT_MOVE (0); 1148SET_H_VBIT_MOVE (0); 1149{ 1150 { 1151 BI opval = 0; 1152 CPU (h_xbit) = opval; 1153 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 1154 } 1155 { 1156 BI opval = 0; 1157 SET_H_INSN_PREFIXED_P (opval); 1158 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 1159 } 1160} 1161} 1162} 1163 1164#undef FLD 1165} 1166 NEXT (vpc); 1167 1168 CASE (sem, INSN_MOVUCBR) : /* movu.b ${uconst8},${Rd} */ 1169{ 1170 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1171 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1172#define FLD(f) abuf->fields.sfmt_bound_cb.f 1173 int UNUSED written = 0; 1174 IADDR UNUSED pc = abuf->addr; 1175 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 1176 1177{ 1178 SI tmp_newval; 1179 tmp_newval = ZEXTQISI (TRUNCSIQI (FLD (f_indir_pc__byte))); 1180 { 1181 SI opval = tmp_newval; 1182 SET_H_GR (FLD (f_operand2), opval); 1183 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1184 } 1185{ 1186 { 1187 BI opval = LTSI (tmp_newval, 0); 1188 CPU (h_nbit) = opval; 1189 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 1190 } 1191 { 1192 BI opval = ANDIF (EQSI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 1193 CPU (h_zbit) = opval; 1194 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 1195 } 1196SET_H_CBIT_MOVE (0); 1197SET_H_VBIT_MOVE (0); 1198{ 1199 { 1200 BI opval = 0; 1201 CPU (h_xbit) = opval; 1202 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 1203 } 1204 { 1205 BI opval = 0; 1206 SET_H_INSN_PREFIXED_P (opval); 1207 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 1208 } 1209} 1210} 1211} 1212 1213#undef FLD 1214} 1215 NEXT (vpc); 1216 1217 CASE (sem, INSN_MOVUCWR) : /* movu.w ${uconst16},${Rd} */ 1218{ 1219 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1220 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1221#define FLD(f) abuf->fields.sfmt_bound_cw.f 1222 int UNUSED written = 0; 1223 IADDR UNUSED pc = abuf->addr; 1224 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 1225 1226{ 1227 SI tmp_newval; 1228 tmp_newval = ZEXTHISI (TRUNCSIHI (FLD (f_indir_pc__word))); 1229 { 1230 SI opval = tmp_newval; 1231 SET_H_GR (FLD (f_operand2), opval); 1232 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1233 } 1234{ 1235 { 1236 BI opval = LTSI (tmp_newval, 0); 1237 CPU (h_nbit) = opval; 1238 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 1239 } 1240 { 1241 BI opval = ANDIF (EQSI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 1242 CPU (h_zbit) = opval; 1243 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 1244 } 1245SET_H_CBIT_MOVE (0); 1246SET_H_VBIT_MOVE (0); 1247{ 1248 { 1249 BI opval = 0; 1250 CPU (h_xbit) = opval; 1251 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 1252 } 1253 { 1254 BI opval = 0; 1255 SET_H_INSN_PREFIXED_P (opval); 1256 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 1257 } 1258} 1259} 1260} 1261 1262#undef FLD 1263} 1264 NEXT (vpc); 1265 1266 CASE (sem, INSN_ADDQ) : /* addq $j,$Rd */ 1267{ 1268 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1269 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1270#define FLD(f) abuf->fields.sfmt_addq.f 1271 int UNUSED written = 0; 1272 IADDR UNUSED pc = abuf->addr; 1273 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1274 1275{ 1276 SI tmp_tmpopd; 1277 SI tmp_tmpops; 1278 BI tmp_carry; 1279 SI tmp_newval; 1280 tmp_tmpops = FLD (f_u6); 1281 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 1282 tmp_carry = CPU (h_cbit); 1283 tmp_newval = ADDCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 1284 { 1285 SI opval = tmp_newval; 1286 SET_H_GR (FLD (f_operand2), opval); 1287 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1288 } 1289{ 1290 { 1291 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), ORIF (ANDIF (LTSI (tmp_tmpopd, 0), GESI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_newval, 0)))); 1292 CPU (h_cbit) = opval; 1293 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 1294 } 1295 { 1296 BI opval = LTSI (tmp_newval, 0); 1297 CPU (h_nbit) = opval; 1298 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 1299 } 1300 { 1301 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 1302 CPU (h_zbit) = opval; 1303 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 1304 } 1305 { 1306 BI opval = ORIF (ANDIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (GESI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 1307 CPU (h_vbit) = opval; 1308 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 1309 } 1310{ 1311 { 1312 BI opval = 0; 1313 CPU (h_xbit) = opval; 1314 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 1315 } 1316 { 1317 BI opval = 0; 1318 SET_H_INSN_PREFIXED_P (opval); 1319 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 1320 } 1321} 1322} 1323} 1324 1325#undef FLD 1326} 1327 NEXT (vpc); 1328 1329 CASE (sem, INSN_SUBQ) : /* subq $j,$Rd */ 1330{ 1331 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1332 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1333#define FLD(f) abuf->fields.sfmt_addq.f 1334 int UNUSED written = 0; 1335 IADDR UNUSED pc = abuf->addr; 1336 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1337 1338{ 1339 SI tmp_tmpopd; 1340 SI tmp_tmpops; 1341 BI tmp_carry; 1342 SI tmp_newval; 1343 tmp_tmpops = FLD (f_u6); 1344 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 1345 tmp_carry = CPU (h_cbit); 1346 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 1347 { 1348 SI opval = tmp_newval; 1349 SET_H_GR (FLD (f_operand2), opval); 1350 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1351 } 1352{ 1353 { 1354 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0)))); 1355 CPU (h_cbit) = opval; 1356 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 1357 } 1358 { 1359 BI opval = LTSI (tmp_newval, 0); 1360 CPU (h_nbit) = opval; 1361 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 1362 } 1363 { 1364 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 1365 CPU (h_zbit) = opval; 1366 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 1367 } 1368 { 1369 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 1370 CPU (h_vbit) = opval; 1371 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 1372 } 1373{ 1374 { 1375 BI opval = 0; 1376 CPU (h_xbit) = opval; 1377 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 1378 } 1379 { 1380 BI opval = 0; 1381 SET_H_INSN_PREFIXED_P (opval); 1382 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 1383 } 1384} 1385} 1386} 1387 1388#undef FLD 1389} 1390 NEXT (vpc); 1391 1392 CASE (sem, INSN_CMP_R_B_R) : /* cmp-r.b $Rs,$Rd */ 1393{ 1394 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1395 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1396#define FLD(f) abuf->fields.sfmt_add_b_r.f 1397 int UNUSED written = 0; 1398 IADDR UNUSED pc = abuf->addr; 1399 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1400 1401{ 1402 QI tmp_tmpopd; 1403 QI tmp_tmpops; 1404 BI tmp_carry; 1405 QI tmp_newval; 1406 tmp_tmpops = GET_H_GR (FLD (f_operand1)); 1407 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 1408 tmp_carry = CPU (h_cbit); 1409 tmp_newval = SUBCQI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 1410((void) 0); /*nop*/ 1411{ 1412 { 1413 BI opval = ORIF (ANDIF (LTQI (tmp_tmpops, 0), GEQI (tmp_tmpopd, 0)), ORIF (ANDIF (GEQI (tmp_tmpopd, 0), LTQI (tmp_newval, 0)), ANDIF (LTQI (tmp_tmpops, 0), LTQI (tmp_newval, 0)))); 1414 CPU (h_cbit) = opval; 1415 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 1416 } 1417 { 1418 BI opval = LTQI (tmp_newval, 0); 1419 CPU (h_nbit) = opval; 1420 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 1421 } 1422 { 1423 BI opval = ANDIF (EQQI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 1424 CPU (h_zbit) = opval; 1425 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 1426 } 1427 { 1428 BI opval = ORIF (ANDIF (ANDIF (GEQI (tmp_tmpops, 0), LTQI (tmp_tmpopd, 0)), GEQI (tmp_newval, 0)), ANDIF (ANDIF (LTQI (tmp_tmpops, 0), GEQI (tmp_tmpopd, 0)), LTQI (tmp_newval, 0))); 1429 CPU (h_vbit) = opval; 1430 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 1431 } 1432{ 1433 { 1434 BI opval = 0; 1435 CPU (h_xbit) = opval; 1436 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 1437 } 1438 { 1439 BI opval = 0; 1440 SET_H_INSN_PREFIXED_P (opval); 1441 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 1442 } 1443} 1444} 1445} 1446 1447#undef FLD 1448} 1449 NEXT (vpc); 1450 1451 CASE (sem, INSN_CMP_R_W_R) : /* cmp-r.w $Rs,$Rd */ 1452{ 1453 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1454 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1455#define FLD(f) abuf->fields.sfmt_add_b_r.f 1456 int UNUSED written = 0; 1457 IADDR UNUSED pc = abuf->addr; 1458 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1459 1460{ 1461 HI tmp_tmpopd; 1462 HI tmp_tmpops; 1463 BI tmp_carry; 1464 HI tmp_newval; 1465 tmp_tmpops = GET_H_GR (FLD (f_operand1)); 1466 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 1467 tmp_carry = CPU (h_cbit); 1468 tmp_newval = SUBCHI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 1469((void) 0); /*nop*/ 1470{ 1471 { 1472 BI opval = ORIF (ANDIF (LTHI (tmp_tmpops, 0), GEHI (tmp_tmpopd, 0)), ORIF (ANDIF (GEHI (tmp_tmpopd, 0), LTHI (tmp_newval, 0)), ANDIF (LTHI (tmp_tmpops, 0), LTHI (tmp_newval, 0)))); 1473 CPU (h_cbit) = opval; 1474 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 1475 } 1476 { 1477 BI opval = LTHI (tmp_newval, 0); 1478 CPU (h_nbit) = opval; 1479 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 1480 } 1481 { 1482 BI opval = ANDIF (EQHI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 1483 CPU (h_zbit) = opval; 1484 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 1485 } 1486 { 1487 BI opval = ORIF (ANDIF (ANDIF (GEHI (tmp_tmpops, 0), LTHI (tmp_tmpopd, 0)), GEHI (tmp_newval, 0)), ANDIF (ANDIF (LTHI (tmp_tmpops, 0), GEHI (tmp_tmpopd, 0)), LTHI (tmp_newval, 0))); 1488 CPU (h_vbit) = opval; 1489 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 1490 } 1491{ 1492 { 1493 BI opval = 0; 1494 CPU (h_xbit) = opval; 1495 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 1496 } 1497 { 1498 BI opval = 0; 1499 SET_H_INSN_PREFIXED_P (opval); 1500 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 1501 } 1502} 1503} 1504} 1505 1506#undef FLD 1507} 1508 NEXT (vpc); 1509 1510 CASE (sem, INSN_CMP_R_D_R) : /* cmp-r.d $Rs,$Rd */ 1511{ 1512 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1513 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1514#define FLD(f) abuf->fields.sfmt_add_b_r.f 1515 int UNUSED written = 0; 1516 IADDR UNUSED pc = abuf->addr; 1517 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1518 1519{ 1520 SI tmp_tmpopd; 1521 SI tmp_tmpops; 1522 BI tmp_carry; 1523 SI tmp_newval; 1524 tmp_tmpops = GET_H_GR (FLD (f_operand1)); 1525 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 1526 tmp_carry = CPU (h_cbit); 1527 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 1528((void) 0); /*nop*/ 1529{ 1530 { 1531 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0)))); 1532 CPU (h_cbit) = opval; 1533 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 1534 } 1535 { 1536 BI opval = LTSI (tmp_newval, 0); 1537 CPU (h_nbit) = opval; 1538 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 1539 } 1540 { 1541 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 1542 CPU (h_zbit) = opval; 1543 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 1544 } 1545 { 1546 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 1547 CPU (h_vbit) = opval; 1548 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 1549 } 1550{ 1551 { 1552 BI opval = 0; 1553 CPU (h_xbit) = opval; 1554 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 1555 } 1556 { 1557 BI opval = 0; 1558 SET_H_INSN_PREFIXED_P (opval); 1559 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 1560 } 1561} 1562} 1563} 1564 1565#undef FLD 1566} 1567 NEXT (vpc); 1568 1569 CASE (sem, INSN_CMP_M_B_M) : /* cmp-m.b [${Rs}${inc}],${Rd} */ 1570{ 1571 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1572 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1573#define FLD(f) abuf->fields.sfmt_bound_m_b_m.f 1574 int UNUSED written = 0; 1575 IADDR UNUSED pc = abuf->addr; 1576 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1577 1578{ 1579 QI tmp_tmpopd; 1580 QI tmp_tmpops; 1581 BI tmp_carry; 1582 QI tmp_newval; 1583 tmp_tmpops = ({ SI tmp_addr; 1584 QI tmp_tmp_mem; 1585 BI tmp_postinc; 1586 tmp_postinc = FLD (f_memmode); 1587; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32))); 1588; tmp_tmp_mem = GETMEMQI (current_cpu, pc, tmp_addr); 1589; if (NEBI (tmp_postinc, 0)) { 1590{ 1591if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 1592 tmp_addr = ADDSI (tmp_addr, 1); 1593} 1594 { 1595 SI opval = tmp_addr; 1596 SET_H_GR (FLD (f_operand1), opval); 1597 written |= (1 << 9); 1598 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1599 } 1600} 1601} 1602; tmp_tmp_mem; }); 1603 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 1604 tmp_carry = CPU (h_cbit); 1605 tmp_newval = SUBCQI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 1606((void) 0); /*nop*/ 1607{ 1608 { 1609 BI opval = ORIF (ANDIF (LTQI (tmp_tmpops, 0), GEQI (tmp_tmpopd, 0)), ORIF (ANDIF (GEQI (tmp_tmpopd, 0), LTQI (tmp_newval, 0)), ANDIF (LTQI (tmp_tmpops, 0), LTQI (tmp_newval, 0)))); 1610 CPU (h_cbit) = opval; 1611 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 1612 } 1613 { 1614 BI opval = LTQI (tmp_newval, 0); 1615 CPU (h_nbit) = opval; 1616 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 1617 } 1618 { 1619 BI opval = ANDIF (EQQI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 1620 CPU (h_zbit) = opval; 1621 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 1622 } 1623 { 1624 BI opval = ORIF (ANDIF (ANDIF (GEQI (tmp_tmpops, 0), LTQI (tmp_tmpopd, 0)), GEQI (tmp_newval, 0)), ANDIF (ANDIF (LTQI (tmp_tmpops, 0), GEQI (tmp_tmpopd, 0)), LTQI (tmp_newval, 0))); 1625 CPU (h_vbit) = opval; 1626 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 1627 } 1628{ 1629 { 1630 BI opval = 0; 1631 CPU (h_xbit) = opval; 1632 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 1633 } 1634 { 1635 BI opval = 0; 1636 SET_H_INSN_PREFIXED_P (opval); 1637 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 1638 } 1639} 1640} 1641} 1642 1643 abuf->written = written; 1644#undef FLD 1645} 1646 NEXT (vpc); 1647 1648 CASE (sem, INSN_CMP_M_W_M) : /* cmp-m.w [${Rs}${inc}],${Rd} */ 1649{ 1650 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1651 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1652#define FLD(f) abuf->fields.sfmt_bound_m_b_m.f 1653 int UNUSED written = 0; 1654 IADDR UNUSED pc = abuf->addr; 1655 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1656 1657{ 1658 HI tmp_tmpopd; 1659 HI tmp_tmpops; 1660 BI tmp_carry; 1661 HI tmp_newval; 1662 tmp_tmpops = ({ SI tmp_addr; 1663 HI tmp_tmp_mem; 1664 BI tmp_postinc; 1665 tmp_postinc = FLD (f_memmode); 1666; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32))); 1667; tmp_tmp_mem = GETMEMHI (current_cpu, pc, tmp_addr); 1668; if (NEBI (tmp_postinc, 0)) { 1669{ 1670if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 1671 tmp_addr = ADDSI (tmp_addr, 2); 1672} 1673 { 1674 SI opval = tmp_addr; 1675 SET_H_GR (FLD (f_operand1), opval); 1676 written |= (1 << 9); 1677 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1678 } 1679} 1680} 1681; tmp_tmp_mem; }); 1682 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 1683 tmp_carry = CPU (h_cbit); 1684 tmp_newval = SUBCHI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 1685((void) 0); /*nop*/ 1686{ 1687 { 1688 BI opval = ORIF (ANDIF (LTHI (tmp_tmpops, 0), GEHI (tmp_tmpopd, 0)), ORIF (ANDIF (GEHI (tmp_tmpopd, 0), LTHI (tmp_newval, 0)), ANDIF (LTHI (tmp_tmpops, 0), LTHI (tmp_newval, 0)))); 1689 CPU (h_cbit) = opval; 1690 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 1691 } 1692 { 1693 BI opval = LTHI (tmp_newval, 0); 1694 CPU (h_nbit) = opval; 1695 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 1696 } 1697 { 1698 BI opval = ANDIF (EQHI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 1699 CPU (h_zbit) = opval; 1700 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 1701 } 1702 { 1703 BI opval = ORIF (ANDIF (ANDIF (GEHI (tmp_tmpops, 0), LTHI (tmp_tmpopd, 0)), GEHI (tmp_newval, 0)), ANDIF (ANDIF (LTHI (tmp_tmpops, 0), GEHI (tmp_tmpopd, 0)), LTHI (tmp_newval, 0))); 1704 CPU (h_vbit) = opval; 1705 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 1706 } 1707{ 1708 { 1709 BI opval = 0; 1710 CPU (h_xbit) = opval; 1711 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 1712 } 1713 { 1714 BI opval = 0; 1715 SET_H_INSN_PREFIXED_P (opval); 1716 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 1717 } 1718} 1719} 1720} 1721 1722 abuf->written = written; 1723#undef FLD 1724} 1725 NEXT (vpc); 1726 1727 CASE (sem, INSN_CMP_M_D_M) : /* cmp-m.d [${Rs}${inc}],${Rd} */ 1728{ 1729 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1730 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1731#define FLD(f) abuf->fields.sfmt_bound_m_b_m.f 1732 int UNUSED written = 0; 1733 IADDR UNUSED pc = abuf->addr; 1734 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1735 1736{ 1737 SI tmp_tmpopd; 1738 SI tmp_tmpops; 1739 BI tmp_carry; 1740 SI tmp_newval; 1741 tmp_tmpops = ({ SI tmp_addr; 1742 SI tmp_tmp_mem; 1743 BI tmp_postinc; 1744 tmp_postinc = FLD (f_memmode); 1745; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32))); 1746; tmp_tmp_mem = GETMEMSI (current_cpu, pc, tmp_addr); 1747; if (NEBI (tmp_postinc, 0)) { 1748{ 1749if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 1750 tmp_addr = ADDSI (tmp_addr, 4); 1751} 1752 { 1753 SI opval = tmp_addr; 1754 SET_H_GR (FLD (f_operand1), opval); 1755 written |= (1 << 9); 1756 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1757 } 1758} 1759} 1760; tmp_tmp_mem; }); 1761 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 1762 tmp_carry = CPU (h_cbit); 1763 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 1764((void) 0); /*nop*/ 1765{ 1766 { 1767 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0)))); 1768 CPU (h_cbit) = opval; 1769 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 1770 } 1771 { 1772 BI opval = LTSI (tmp_newval, 0); 1773 CPU (h_nbit) = opval; 1774 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 1775 } 1776 { 1777 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 1778 CPU (h_zbit) = opval; 1779 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 1780 } 1781 { 1782 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 1783 CPU (h_vbit) = opval; 1784 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 1785 } 1786{ 1787 { 1788 BI opval = 0; 1789 CPU (h_xbit) = opval; 1790 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 1791 } 1792 { 1793 BI opval = 0; 1794 SET_H_INSN_PREFIXED_P (opval); 1795 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 1796 } 1797} 1798} 1799} 1800 1801 abuf->written = written; 1802#undef FLD 1803} 1804 NEXT (vpc); 1805 1806 CASE (sem, INSN_CMPCBR) : /* cmp.b $sconst8,$Rd */ 1807{ 1808 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1809 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1810#define FLD(f) abuf->fields.sfmt_bound_cb.f 1811 int UNUSED written = 0; 1812 IADDR UNUSED pc = abuf->addr; 1813 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 1814 1815{ 1816 QI tmp_tmpopd; 1817 QI tmp_tmpops; 1818 BI tmp_carry; 1819 QI tmp_newval; 1820 tmp_tmpops = TRUNCSIQI (FLD (f_indir_pc__byte)); 1821 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 1822 tmp_carry = CPU (h_cbit); 1823 tmp_newval = SUBCQI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 1824((void) 0); /*nop*/ 1825{ 1826 { 1827 BI opval = ORIF (ANDIF (LTQI (tmp_tmpops, 0), GEQI (tmp_tmpopd, 0)), ORIF (ANDIF (GEQI (tmp_tmpopd, 0), LTQI (tmp_newval, 0)), ANDIF (LTQI (tmp_tmpops, 0), LTQI (tmp_newval, 0)))); 1828 CPU (h_cbit) = opval; 1829 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 1830 } 1831 { 1832 BI opval = LTQI (tmp_newval, 0); 1833 CPU (h_nbit) = opval; 1834 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 1835 } 1836 { 1837 BI opval = ANDIF (EQQI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 1838 CPU (h_zbit) = opval; 1839 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 1840 } 1841 { 1842 BI opval = ORIF (ANDIF (ANDIF (GEQI (tmp_tmpops, 0), LTQI (tmp_tmpopd, 0)), GEQI (tmp_newval, 0)), ANDIF (ANDIF (LTQI (tmp_tmpops, 0), GEQI (tmp_tmpopd, 0)), LTQI (tmp_newval, 0))); 1843 CPU (h_vbit) = opval; 1844 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 1845 } 1846{ 1847 { 1848 BI opval = 0; 1849 CPU (h_xbit) = opval; 1850 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 1851 } 1852 { 1853 BI opval = 0; 1854 SET_H_INSN_PREFIXED_P (opval); 1855 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 1856 } 1857} 1858} 1859} 1860 1861#undef FLD 1862} 1863 NEXT (vpc); 1864 1865 CASE (sem, INSN_CMPCWR) : /* cmp.w $sconst16,$Rd */ 1866{ 1867 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1868 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1869#define FLD(f) abuf->fields.sfmt_bound_cw.f 1870 int UNUSED written = 0; 1871 IADDR UNUSED pc = abuf->addr; 1872 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 1873 1874{ 1875 HI tmp_tmpopd; 1876 HI tmp_tmpops; 1877 BI tmp_carry; 1878 HI tmp_newval; 1879 tmp_tmpops = TRUNCSIHI (FLD (f_indir_pc__word)); 1880 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 1881 tmp_carry = CPU (h_cbit); 1882 tmp_newval = SUBCHI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 1883((void) 0); /*nop*/ 1884{ 1885 { 1886 BI opval = ORIF (ANDIF (LTHI (tmp_tmpops, 0), GEHI (tmp_tmpopd, 0)), ORIF (ANDIF (GEHI (tmp_tmpopd, 0), LTHI (tmp_newval, 0)), ANDIF (LTHI (tmp_tmpops, 0), LTHI (tmp_newval, 0)))); 1887 CPU (h_cbit) = opval; 1888 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 1889 } 1890 { 1891 BI opval = LTHI (tmp_newval, 0); 1892 CPU (h_nbit) = opval; 1893 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 1894 } 1895 { 1896 BI opval = ANDIF (EQHI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 1897 CPU (h_zbit) = opval; 1898 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 1899 } 1900 { 1901 BI opval = ORIF (ANDIF (ANDIF (GEHI (tmp_tmpops, 0), LTHI (tmp_tmpopd, 0)), GEHI (tmp_newval, 0)), ANDIF (ANDIF (LTHI (tmp_tmpops, 0), GEHI (tmp_tmpopd, 0)), LTHI (tmp_newval, 0))); 1902 CPU (h_vbit) = opval; 1903 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 1904 } 1905{ 1906 { 1907 BI opval = 0; 1908 CPU (h_xbit) = opval; 1909 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 1910 } 1911 { 1912 BI opval = 0; 1913 SET_H_INSN_PREFIXED_P (opval); 1914 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 1915 } 1916} 1917} 1918} 1919 1920#undef FLD 1921} 1922 NEXT (vpc); 1923 1924 CASE (sem, INSN_CMPCDR) : /* cmp.d $const32,$Rd */ 1925{ 1926 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1927 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1928#define FLD(f) abuf->fields.sfmt_bound_cd.f 1929 int UNUSED written = 0; 1930 IADDR UNUSED pc = abuf->addr; 1931 vpc = SEM_NEXT_VPC (sem_arg, pc, 6); 1932 1933{ 1934 SI tmp_tmpopd; 1935 SI tmp_tmpops; 1936 BI tmp_carry; 1937 SI tmp_newval; 1938 tmp_tmpops = FLD (f_indir_pc__dword); 1939 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 1940 tmp_carry = CPU (h_cbit); 1941 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 1942((void) 0); /*nop*/ 1943{ 1944 { 1945 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0)))); 1946 CPU (h_cbit) = opval; 1947 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 1948 } 1949 { 1950 BI opval = LTSI (tmp_newval, 0); 1951 CPU (h_nbit) = opval; 1952 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 1953 } 1954 { 1955 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 1956 CPU (h_zbit) = opval; 1957 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 1958 } 1959 { 1960 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 1961 CPU (h_vbit) = opval; 1962 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 1963 } 1964{ 1965 { 1966 BI opval = 0; 1967 CPU (h_xbit) = opval; 1968 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 1969 } 1970 { 1971 BI opval = 0; 1972 SET_H_INSN_PREFIXED_P (opval); 1973 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 1974 } 1975} 1976} 1977} 1978 1979#undef FLD 1980} 1981 NEXT (vpc); 1982 1983 CASE (sem, INSN_CMPQ) : /* cmpq $i,$Rd */ 1984{ 1985 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1986 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1987#define FLD(f) abuf->fields.sfmt_andq.f 1988 int UNUSED written = 0; 1989 IADDR UNUSED pc = abuf->addr; 1990 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1991 1992{ 1993 SI tmp_tmpopd; 1994 SI tmp_tmpops; 1995 BI tmp_carry; 1996 SI tmp_newval; 1997 tmp_tmpops = FLD (f_s6); 1998 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 1999 tmp_carry = CPU (h_cbit); 2000 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 2001((void) 0); /*nop*/ 2002{ 2003 { 2004 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0)))); 2005 CPU (h_cbit) = opval; 2006 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 2007 } 2008 { 2009 BI opval = LTSI (tmp_newval, 0); 2010 CPU (h_nbit) = opval; 2011 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 2012 } 2013 { 2014 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 2015 CPU (h_zbit) = opval; 2016 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 2017 } 2018 { 2019 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 2020 CPU (h_vbit) = opval; 2021 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 2022 } 2023{ 2024 { 2025 BI opval = 0; 2026 CPU (h_xbit) = opval; 2027 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 2028 } 2029 { 2030 BI opval = 0; 2031 SET_H_INSN_PREFIXED_P (opval); 2032 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 2033 } 2034} 2035} 2036} 2037 2038#undef FLD 2039} 2040 NEXT (vpc); 2041 2042 CASE (sem, INSN_CMPS_M_B_M) : /* cmps-m.b [${Rs}${inc}],$Rd */ 2043{ 2044 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2045 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2046#define FLD(f) abuf->fields.sfmt_bound_m_b_m.f 2047 int UNUSED written = 0; 2048 IADDR UNUSED pc = abuf->addr; 2049 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2050 2051{ 2052 SI tmp_tmpopd; 2053 SI tmp_tmpops; 2054 BI tmp_carry; 2055 SI tmp_newval; 2056 tmp_tmpops = EXTQISI (({ SI tmp_addr; 2057 QI tmp_tmp_mem; 2058 BI tmp_postinc; 2059 tmp_postinc = FLD (f_memmode); 2060; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32))); 2061; tmp_tmp_mem = GETMEMQI (current_cpu, pc, tmp_addr); 2062; if (NEBI (tmp_postinc, 0)) { 2063{ 2064if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 2065 tmp_addr = ADDSI (tmp_addr, 1); 2066} 2067 { 2068 SI opval = tmp_addr; 2069 SET_H_GR (FLD (f_operand1), opval); 2070 written |= (1 << 9); 2071 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2072 } 2073} 2074} 2075; tmp_tmp_mem; })); 2076 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 2077 tmp_carry = CPU (h_cbit); 2078 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 2079((void) 0); /*nop*/ 2080{ 2081 { 2082 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0)))); 2083 CPU (h_cbit) = opval; 2084 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 2085 } 2086 { 2087 BI opval = LTSI (tmp_newval, 0); 2088 CPU (h_nbit) = opval; 2089 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 2090 } 2091 { 2092 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 2093 CPU (h_zbit) = opval; 2094 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 2095 } 2096 { 2097 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 2098 CPU (h_vbit) = opval; 2099 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 2100 } 2101{ 2102 { 2103 BI opval = 0; 2104 CPU (h_xbit) = opval; 2105 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 2106 } 2107 { 2108 BI opval = 0; 2109 SET_H_INSN_PREFIXED_P (opval); 2110 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 2111 } 2112} 2113} 2114} 2115 2116 abuf->written = written; 2117#undef FLD 2118} 2119 NEXT (vpc); 2120 2121 CASE (sem, INSN_CMPS_M_W_M) : /* cmps-m.w [${Rs}${inc}],$Rd */ 2122{ 2123 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2124 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2125#define FLD(f) abuf->fields.sfmt_bound_m_b_m.f 2126 int UNUSED written = 0; 2127 IADDR UNUSED pc = abuf->addr; 2128 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2129 2130{ 2131 SI tmp_tmpopd; 2132 SI tmp_tmpops; 2133 BI tmp_carry; 2134 SI tmp_newval; 2135 tmp_tmpops = EXTHISI (({ SI tmp_addr; 2136 HI tmp_tmp_mem; 2137 BI tmp_postinc; 2138 tmp_postinc = FLD (f_memmode); 2139; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32))); 2140; tmp_tmp_mem = GETMEMHI (current_cpu, pc, tmp_addr); 2141; if (NEBI (tmp_postinc, 0)) { 2142{ 2143if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 2144 tmp_addr = ADDSI (tmp_addr, 2); 2145} 2146 { 2147 SI opval = tmp_addr; 2148 SET_H_GR (FLD (f_operand1), opval); 2149 written |= (1 << 9); 2150 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2151 } 2152} 2153} 2154; tmp_tmp_mem; })); 2155 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 2156 tmp_carry = CPU (h_cbit); 2157 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 2158((void) 0); /*nop*/ 2159{ 2160 { 2161 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0)))); 2162 CPU (h_cbit) = opval; 2163 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 2164 } 2165 { 2166 BI opval = LTSI (tmp_newval, 0); 2167 CPU (h_nbit) = opval; 2168 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 2169 } 2170 { 2171 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 2172 CPU (h_zbit) = opval; 2173 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 2174 } 2175 { 2176 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 2177 CPU (h_vbit) = opval; 2178 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 2179 } 2180{ 2181 { 2182 BI opval = 0; 2183 CPU (h_xbit) = opval; 2184 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 2185 } 2186 { 2187 BI opval = 0; 2188 SET_H_INSN_PREFIXED_P (opval); 2189 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 2190 } 2191} 2192} 2193} 2194 2195 abuf->written = written; 2196#undef FLD 2197} 2198 NEXT (vpc); 2199 2200 CASE (sem, INSN_CMPSCBR) : /* [${Rs}${inc}],$Rd */ 2201{ 2202 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2203 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2204#define FLD(f) abuf->fields.sfmt_bound_cb.f 2205 int UNUSED written = 0; 2206 IADDR UNUSED pc = abuf->addr; 2207 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 2208 2209{ 2210 SI tmp_tmpopd; 2211 SI tmp_tmpops; 2212 BI tmp_carry; 2213 SI tmp_newval; 2214 tmp_tmpops = EXTQISI (TRUNCSIQI (FLD (f_indir_pc__byte))); 2215 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 2216 tmp_carry = CPU (h_cbit); 2217 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 2218((void) 0); /*nop*/ 2219{ 2220 { 2221 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0)))); 2222 CPU (h_cbit) = opval; 2223 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 2224 } 2225 { 2226 BI opval = LTSI (tmp_newval, 0); 2227 CPU (h_nbit) = opval; 2228 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 2229 } 2230 { 2231 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 2232 CPU (h_zbit) = opval; 2233 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 2234 } 2235 { 2236 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 2237 CPU (h_vbit) = opval; 2238 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 2239 } 2240{ 2241 { 2242 BI opval = 0; 2243 CPU (h_xbit) = opval; 2244 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 2245 } 2246 { 2247 BI opval = 0; 2248 SET_H_INSN_PREFIXED_P (opval); 2249 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 2250 } 2251} 2252} 2253} 2254 2255#undef FLD 2256} 2257 NEXT (vpc); 2258 2259 CASE (sem, INSN_CMPSCWR) : /* [${Rs}${inc}],$Rd */ 2260{ 2261 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2262 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2263#define FLD(f) abuf->fields.sfmt_bound_cw.f 2264 int UNUSED written = 0; 2265 IADDR UNUSED pc = abuf->addr; 2266 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 2267 2268{ 2269 SI tmp_tmpopd; 2270 SI tmp_tmpops; 2271 BI tmp_carry; 2272 SI tmp_newval; 2273 tmp_tmpops = EXTHISI (TRUNCSIHI (FLD (f_indir_pc__word))); 2274 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 2275 tmp_carry = CPU (h_cbit); 2276 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 2277((void) 0); /*nop*/ 2278{ 2279 { 2280 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0)))); 2281 CPU (h_cbit) = opval; 2282 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 2283 } 2284 { 2285 BI opval = LTSI (tmp_newval, 0); 2286 CPU (h_nbit) = opval; 2287 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 2288 } 2289 { 2290 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 2291 CPU (h_zbit) = opval; 2292 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 2293 } 2294 { 2295 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 2296 CPU (h_vbit) = opval; 2297 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 2298 } 2299{ 2300 { 2301 BI opval = 0; 2302 CPU (h_xbit) = opval; 2303 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 2304 } 2305 { 2306 BI opval = 0; 2307 SET_H_INSN_PREFIXED_P (opval); 2308 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 2309 } 2310} 2311} 2312} 2313 2314#undef FLD 2315} 2316 NEXT (vpc); 2317 2318 CASE (sem, INSN_CMPU_M_B_M) : /* cmpu-m.b [${Rs}${inc}],$Rd */ 2319{ 2320 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2321 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2322#define FLD(f) abuf->fields.sfmt_bound_m_b_m.f 2323 int UNUSED written = 0; 2324 IADDR UNUSED pc = abuf->addr; 2325 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2326 2327{ 2328 SI tmp_tmpopd; 2329 SI tmp_tmpops; 2330 BI tmp_carry; 2331 SI tmp_newval; 2332 tmp_tmpops = ZEXTQISI (({ SI tmp_addr; 2333 QI tmp_tmp_mem; 2334 BI tmp_postinc; 2335 tmp_postinc = FLD (f_memmode); 2336; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32))); 2337; tmp_tmp_mem = GETMEMQI (current_cpu, pc, tmp_addr); 2338; if (NEBI (tmp_postinc, 0)) { 2339{ 2340if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 2341 tmp_addr = ADDSI (tmp_addr, 1); 2342} 2343 { 2344 SI opval = tmp_addr; 2345 SET_H_GR (FLD (f_operand1), opval); 2346 written |= (1 << 9); 2347 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2348 } 2349} 2350} 2351; tmp_tmp_mem; })); 2352 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 2353 tmp_carry = CPU (h_cbit); 2354 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 2355((void) 0); /*nop*/ 2356{ 2357 { 2358 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0)))); 2359 CPU (h_cbit) = opval; 2360 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 2361 } 2362 { 2363 BI opval = LTSI (tmp_newval, 0); 2364 CPU (h_nbit) = opval; 2365 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 2366 } 2367 { 2368 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 2369 CPU (h_zbit) = opval; 2370 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 2371 } 2372 { 2373 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 2374 CPU (h_vbit) = opval; 2375 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 2376 } 2377{ 2378 { 2379 BI opval = 0; 2380 CPU (h_xbit) = opval; 2381 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 2382 } 2383 { 2384 BI opval = 0; 2385 SET_H_INSN_PREFIXED_P (opval); 2386 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 2387 } 2388} 2389} 2390} 2391 2392 abuf->written = written; 2393#undef FLD 2394} 2395 NEXT (vpc); 2396 2397 CASE (sem, INSN_CMPU_M_W_M) : /* cmpu-m.w [${Rs}${inc}],$Rd */ 2398{ 2399 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2400 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2401#define FLD(f) abuf->fields.sfmt_bound_m_b_m.f 2402 int UNUSED written = 0; 2403 IADDR UNUSED pc = abuf->addr; 2404 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2405 2406{ 2407 SI tmp_tmpopd; 2408 SI tmp_tmpops; 2409 BI tmp_carry; 2410 SI tmp_newval; 2411 tmp_tmpops = ZEXTHISI (({ SI tmp_addr; 2412 HI tmp_tmp_mem; 2413 BI tmp_postinc; 2414 tmp_postinc = FLD (f_memmode); 2415; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32))); 2416; tmp_tmp_mem = GETMEMHI (current_cpu, pc, tmp_addr); 2417; if (NEBI (tmp_postinc, 0)) { 2418{ 2419if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 2420 tmp_addr = ADDSI (tmp_addr, 2); 2421} 2422 { 2423 SI opval = tmp_addr; 2424 SET_H_GR (FLD (f_operand1), opval); 2425 written |= (1 << 9); 2426 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2427 } 2428} 2429} 2430; tmp_tmp_mem; })); 2431 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 2432 tmp_carry = CPU (h_cbit); 2433 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 2434((void) 0); /*nop*/ 2435{ 2436 { 2437 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0)))); 2438 CPU (h_cbit) = opval; 2439 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 2440 } 2441 { 2442 BI opval = LTSI (tmp_newval, 0); 2443 CPU (h_nbit) = opval; 2444 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 2445 } 2446 { 2447 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 2448 CPU (h_zbit) = opval; 2449 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 2450 } 2451 { 2452 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 2453 CPU (h_vbit) = opval; 2454 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 2455 } 2456{ 2457 { 2458 BI opval = 0; 2459 CPU (h_xbit) = opval; 2460 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 2461 } 2462 { 2463 BI opval = 0; 2464 SET_H_INSN_PREFIXED_P (opval); 2465 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 2466 } 2467} 2468} 2469} 2470 2471 abuf->written = written; 2472#undef FLD 2473} 2474 NEXT (vpc); 2475 2476 CASE (sem, INSN_CMPUCBR) : /* [${Rs}${inc}],$Rd */ 2477{ 2478 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2479 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2480#define FLD(f) abuf->fields.sfmt_bound_cb.f 2481 int UNUSED written = 0; 2482 IADDR UNUSED pc = abuf->addr; 2483 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 2484 2485{ 2486 SI tmp_tmpopd; 2487 SI tmp_tmpops; 2488 BI tmp_carry; 2489 SI tmp_newval; 2490 tmp_tmpops = ZEXTQISI (TRUNCSIQI (FLD (f_indir_pc__byte))); 2491 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 2492 tmp_carry = CPU (h_cbit); 2493 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 2494((void) 0); /*nop*/ 2495{ 2496 { 2497 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0)))); 2498 CPU (h_cbit) = opval; 2499 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 2500 } 2501 { 2502 BI opval = LTSI (tmp_newval, 0); 2503 CPU (h_nbit) = opval; 2504 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 2505 } 2506 { 2507 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 2508 CPU (h_zbit) = opval; 2509 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 2510 } 2511 { 2512 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 2513 CPU (h_vbit) = opval; 2514 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 2515 } 2516{ 2517 { 2518 BI opval = 0; 2519 CPU (h_xbit) = opval; 2520 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 2521 } 2522 { 2523 BI opval = 0; 2524 SET_H_INSN_PREFIXED_P (opval); 2525 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 2526 } 2527} 2528} 2529} 2530 2531#undef FLD 2532} 2533 NEXT (vpc); 2534 2535 CASE (sem, INSN_CMPUCWR) : /* [${Rs}${inc}],$Rd */ 2536{ 2537 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2538 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2539#define FLD(f) abuf->fields.sfmt_bound_cw.f 2540 int UNUSED written = 0; 2541 IADDR UNUSED pc = abuf->addr; 2542 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 2543 2544{ 2545 SI tmp_tmpopd; 2546 SI tmp_tmpops; 2547 BI tmp_carry; 2548 SI tmp_newval; 2549 tmp_tmpops = ZEXTHISI (TRUNCSIHI (FLD (f_indir_pc__word))); 2550 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 2551 tmp_carry = CPU (h_cbit); 2552 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 2553((void) 0); /*nop*/ 2554{ 2555 { 2556 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0)))); 2557 CPU (h_cbit) = opval; 2558 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 2559 } 2560 { 2561 BI opval = LTSI (tmp_newval, 0); 2562 CPU (h_nbit) = opval; 2563 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 2564 } 2565 { 2566 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 2567 CPU (h_zbit) = opval; 2568 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 2569 } 2570 { 2571 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 2572 CPU (h_vbit) = opval; 2573 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 2574 } 2575{ 2576 { 2577 BI opval = 0; 2578 CPU (h_xbit) = opval; 2579 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 2580 } 2581 { 2582 BI opval = 0; 2583 SET_H_INSN_PREFIXED_P (opval); 2584 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 2585 } 2586} 2587} 2588} 2589 2590#undef FLD 2591} 2592 NEXT (vpc); 2593 2594 CASE (sem, INSN_MOVE_M_B_M) : /* move-m.b [${Rs}${inc}],${Rd} */ 2595{ 2596 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2597 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2598#define FLD(f) abuf->fields.sfmt_add_m_b_m.f 2599 int UNUSED written = 0; 2600 IADDR UNUSED pc = abuf->addr; 2601 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2602 2603{ 2604 SI tmp_tmp; 2605 tmp_tmp = ({ SI tmp_addr; 2606 QI tmp_tmp_mem; 2607 BI tmp_postinc; 2608 tmp_postinc = FLD (f_memmode); 2609; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32))); 2610; tmp_tmp_mem = GETMEMQI (current_cpu, pc, tmp_addr); 2611; if (NEBI (tmp_postinc, 0)) { 2612{ 2613if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 2614 tmp_addr = ADDSI (tmp_addr, 1); 2615} 2616 { 2617 SI opval = tmp_addr; 2618 SET_H_GR (FLD (f_operand1), opval); 2619 written |= (1 << 10); 2620 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2621 } 2622} 2623} 2624; tmp_tmp_mem; }); 2625{ 2626 SI tmp_oldregval; 2627 tmp_oldregval = GET_H_RAW_GR_PC (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2)))); 2628 { 2629 SI opval = ORSI (ANDSI (tmp_tmp, 255), ANDSI (tmp_oldregval, 0xffffff00)); 2630 SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval); 2631 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2632 } 2633} 2634{ 2635 { 2636 BI opval = LTQI (tmp_tmp, 0); 2637 CPU (h_nbit) = opval; 2638 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 2639 } 2640 { 2641 BI opval = ANDIF (EQQI (tmp_tmp, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 2642 CPU (h_zbit) = opval; 2643 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 2644 } 2645SET_H_CBIT_MOVE (0); 2646SET_H_VBIT_MOVE (0); 2647{ 2648 { 2649 BI opval = 0; 2650 CPU (h_xbit) = opval; 2651 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 2652 } 2653 { 2654 BI opval = 0; 2655 SET_H_INSN_PREFIXED_P (opval); 2656 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 2657 } 2658} 2659} 2660} 2661 2662 abuf->written = written; 2663#undef FLD 2664} 2665 NEXT (vpc); 2666 2667 CASE (sem, INSN_MOVE_M_W_M) : /* move-m.w [${Rs}${inc}],${Rd} */ 2668{ 2669 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2670 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2671#define FLD(f) abuf->fields.sfmt_add_m_b_m.f 2672 int UNUSED written = 0; 2673 IADDR UNUSED pc = abuf->addr; 2674 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2675 2676{ 2677 SI tmp_tmp; 2678 tmp_tmp = ({ SI tmp_addr; 2679 HI tmp_tmp_mem; 2680 BI tmp_postinc; 2681 tmp_postinc = FLD (f_memmode); 2682; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32))); 2683; tmp_tmp_mem = GETMEMHI (current_cpu, pc, tmp_addr); 2684; if (NEBI (tmp_postinc, 0)) { 2685{ 2686if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 2687 tmp_addr = ADDSI (tmp_addr, 2); 2688} 2689 { 2690 SI opval = tmp_addr; 2691 SET_H_GR (FLD (f_operand1), opval); 2692 written |= (1 << 10); 2693 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2694 } 2695} 2696} 2697; tmp_tmp_mem; }); 2698{ 2699 SI tmp_oldregval; 2700 tmp_oldregval = GET_H_RAW_GR_PC (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2)))); 2701 { 2702 SI opval = ORSI (ANDSI (tmp_tmp, 65535), ANDSI (tmp_oldregval, 0xffff0000)); 2703 SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval); 2704 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2705 } 2706} 2707{ 2708 { 2709 BI opval = LTHI (tmp_tmp, 0); 2710 CPU (h_nbit) = opval; 2711 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 2712 } 2713 { 2714 BI opval = ANDIF (EQHI (tmp_tmp, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 2715 CPU (h_zbit) = opval; 2716 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 2717 } 2718SET_H_CBIT_MOVE (0); 2719SET_H_VBIT_MOVE (0); 2720{ 2721 { 2722 BI opval = 0; 2723 CPU (h_xbit) = opval; 2724 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 2725 } 2726 { 2727 BI opval = 0; 2728 SET_H_INSN_PREFIXED_P (opval); 2729 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 2730 } 2731} 2732} 2733} 2734 2735 abuf->written = written; 2736#undef FLD 2737} 2738 NEXT (vpc); 2739 2740 CASE (sem, INSN_MOVE_M_D_M) : /* move-m.d [${Rs}${inc}],${Rd} */ 2741{ 2742 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2743 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2744#define FLD(f) abuf->fields.sfmt_add_m_b_m.f 2745 int UNUSED written = 0; 2746 IADDR UNUSED pc = abuf->addr; 2747 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2748 2749{ 2750 SI tmp_tmp; 2751 tmp_tmp = ({ SI tmp_addr; 2752 SI tmp_tmp_mem; 2753 BI tmp_postinc; 2754 tmp_postinc = FLD (f_memmode); 2755; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32))); 2756; tmp_tmp_mem = GETMEMSI (current_cpu, pc, tmp_addr); 2757; if (NEBI (tmp_postinc, 0)) { 2758{ 2759if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 2760 tmp_addr = ADDSI (tmp_addr, 4); 2761} 2762 { 2763 SI opval = tmp_addr; 2764 SET_H_GR (FLD (f_operand1), opval); 2765 written |= (1 << 9); 2766 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2767 } 2768} 2769} 2770; tmp_tmp_mem; }); 2771 { 2772 SI opval = tmp_tmp; 2773 SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval); 2774 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2775 } 2776{ 2777 { 2778 BI opval = LTSI (tmp_tmp, 0); 2779 CPU (h_nbit) = opval; 2780 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 2781 } 2782 { 2783 BI opval = ANDIF (EQSI (tmp_tmp, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 2784 CPU (h_zbit) = opval; 2785 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 2786 } 2787SET_H_CBIT_MOVE (0); 2788SET_H_VBIT_MOVE (0); 2789{ 2790 { 2791 BI opval = 0; 2792 CPU (h_xbit) = opval; 2793 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 2794 } 2795 { 2796 BI opval = 0; 2797 SET_H_INSN_PREFIXED_P (opval); 2798 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 2799 } 2800} 2801} 2802} 2803 2804 abuf->written = written; 2805#undef FLD 2806} 2807 NEXT (vpc); 2808 2809 CASE (sem, INSN_MOVS_M_B_M) : /* movs-m.b [${Rs}${inc}],${Rd} */ 2810{ 2811 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2812 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2813#define FLD(f) abuf->fields.sfmt_bound_m_b_m.f 2814 int UNUSED written = 0; 2815 IADDR UNUSED pc = abuf->addr; 2816 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2817 2818{ 2819 SI tmp_tmp; 2820 tmp_tmp = EXTQISI (({ SI tmp_addr; 2821 QI tmp_tmp_mem; 2822 BI tmp_postinc; 2823 tmp_postinc = FLD (f_memmode); 2824; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32))); 2825; tmp_tmp_mem = GETMEMQI (current_cpu, pc, tmp_addr); 2826; if (NEBI (tmp_postinc, 0)) { 2827{ 2828if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 2829 tmp_addr = ADDSI (tmp_addr, 1); 2830} 2831 { 2832 SI opval = tmp_addr; 2833 SET_H_GR (FLD (f_operand1), opval); 2834 written |= (1 << 8); 2835 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2836 } 2837} 2838} 2839; tmp_tmp_mem; })); 2840if (ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) { 2841 { 2842 SI opval = tmp_tmp; 2843 SET_H_GR (FLD (f_operand1), opval); 2844 written |= (1 << 8); 2845 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2846 } 2847} else { 2848 { 2849 SI opval = tmp_tmp; 2850 SET_H_GR (FLD (f_operand2), opval); 2851 written |= (1 << 7); 2852 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2853 } 2854} 2855{ 2856 { 2857 BI opval = LTSI (tmp_tmp, 0); 2858 CPU (h_nbit) = opval; 2859 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 2860 } 2861 { 2862 BI opval = ANDIF (EQSI (tmp_tmp, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 2863 CPU (h_zbit) = opval; 2864 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 2865 } 2866SET_H_CBIT_MOVE (0); 2867SET_H_VBIT_MOVE (0); 2868{ 2869 { 2870 BI opval = 0; 2871 CPU (h_xbit) = opval; 2872 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 2873 } 2874 { 2875 BI opval = 0; 2876 SET_H_INSN_PREFIXED_P (opval); 2877 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 2878 } 2879} 2880} 2881} 2882 2883 abuf->written = written; 2884#undef FLD 2885} 2886 NEXT (vpc); 2887 2888 CASE (sem, INSN_MOVS_M_W_M) : /* movs-m.w [${Rs}${inc}],${Rd} */ 2889{ 2890 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2891 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2892#define FLD(f) abuf->fields.sfmt_bound_m_b_m.f 2893 int UNUSED written = 0; 2894 IADDR UNUSED pc = abuf->addr; 2895 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2896 2897{ 2898 SI tmp_tmp; 2899 tmp_tmp = EXTHISI (({ SI tmp_addr; 2900 HI tmp_tmp_mem; 2901 BI tmp_postinc; 2902 tmp_postinc = FLD (f_memmode); 2903; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32))); 2904; tmp_tmp_mem = GETMEMHI (current_cpu, pc, tmp_addr); 2905; if (NEBI (tmp_postinc, 0)) { 2906{ 2907if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 2908 tmp_addr = ADDSI (tmp_addr, 2); 2909} 2910 { 2911 SI opval = tmp_addr; 2912 SET_H_GR (FLD (f_operand1), opval); 2913 written |= (1 << 8); 2914 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2915 } 2916} 2917} 2918; tmp_tmp_mem; })); 2919if (ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) { 2920 { 2921 SI opval = tmp_tmp; 2922 SET_H_GR (FLD (f_operand1), opval); 2923 written |= (1 << 8); 2924 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2925 } 2926} else { 2927 { 2928 SI opval = tmp_tmp; 2929 SET_H_GR (FLD (f_operand2), opval); 2930 written |= (1 << 7); 2931 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2932 } 2933} 2934{ 2935 { 2936 BI opval = LTSI (tmp_tmp, 0); 2937 CPU (h_nbit) = opval; 2938 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 2939 } 2940 { 2941 BI opval = ANDIF (EQSI (tmp_tmp, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 2942 CPU (h_zbit) = opval; 2943 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 2944 } 2945SET_H_CBIT_MOVE (0); 2946SET_H_VBIT_MOVE (0); 2947{ 2948 { 2949 BI opval = 0; 2950 CPU (h_xbit) = opval; 2951 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 2952 } 2953 { 2954 BI opval = 0; 2955 SET_H_INSN_PREFIXED_P (opval); 2956 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 2957 } 2958} 2959} 2960} 2961 2962 abuf->written = written; 2963#undef FLD 2964} 2965 NEXT (vpc); 2966 2967 CASE (sem, INSN_MOVU_M_B_M) : /* movu-m.b [${Rs}${inc}],${Rd} */ 2968{ 2969 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2970 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2971#define FLD(f) abuf->fields.sfmt_bound_m_b_m.f 2972 int UNUSED written = 0; 2973 IADDR UNUSED pc = abuf->addr; 2974 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2975 2976{ 2977 SI tmp_tmp; 2978 tmp_tmp = ZEXTQISI (({ SI tmp_addr; 2979 QI tmp_tmp_mem; 2980 BI tmp_postinc; 2981 tmp_postinc = FLD (f_memmode); 2982; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32))); 2983; tmp_tmp_mem = GETMEMQI (current_cpu, pc, tmp_addr); 2984; if (NEBI (tmp_postinc, 0)) { 2985{ 2986if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 2987 tmp_addr = ADDSI (tmp_addr, 1); 2988} 2989 { 2990 SI opval = tmp_addr; 2991 SET_H_GR (FLD (f_operand1), opval); 2992 written |= (1 << 8); 2993 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2994 } 2995} 2996} 2997; tmp_tmp_mem; })); 2998if (ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) { 2999 { 3000 SI opval = tmp_tmp; 3001 SET_H_GR (FLD (f_operand1), opval); 3002 written |= (1 << 8); 3003 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3004 } 3005} else { 3006 { 3007 SI opval = tmp_tmp; 3008 SET_H_GR (FLD (f_operand2), opval); 3009 written |= (1 << 7); 3010 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3011 } 3012} 3013{ 3014 { 3015 BI opval = LTSI (tmp_tmp, 0); 3016 CPU (h_nbit) = opval; 3017 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 3018 } 3019 { 3020 BI opval = ANDIF (EQSI (tmp_tmp, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 3021 CPU (h_zbit) = opval; 3022 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 3023 } 3024SET_H_CBIT_MOVE (0); 3025SET_H_VBIT_MOVE (0); 3026{ 3027 { 3028 BI opval = 0; 3029 CPU (h_xbit) = opval; 3030 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 3031 } 3032 { 3033 BI opval = 0; 3034 SET_H_INSN_PREFIXED_P (opval); 3035 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 3036 } 3037} 3038} 3039} 3040 3041 abuf->written = written; 3042#undef FLD 3043} 3044 NEXT (vpc); 3045 3046 CASE (sem, INSN_MOVU_M_W_M) : /* movu-m.w [${Rs}${inc}],${Rd} */ 3047{ 3048 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3049 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3050#define FLD(f) abuf->fields.sfmt_bound_m_b_m.f 3051 int UNUSED written = 0; 3052 IADDR UNUSED pc = abuf->addr; 3053 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3054 3055{ 3056 SI tmp_tmp; 3057 tmp_tmp = ZEXTHISI (({ SI tmp_addr; 3058 HI tmp_tmp_mem; 3059 BI tmp_postinc; 3060 tmp_postinc = FLD (f_memmode); 3061; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32))); 3062; tmp_tmp_mem = GETMEMHI (current_cpu, pc, tmp_addr); 3063; if (NEBI (tmp_postinc, 0)) { 3064{ 3065if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 3066 tmp_addr = ADDSI (tmp_addr, 2); 3067} 3068 { 3069 SI opval = tmp_addr; 3070 SET_H_GR (FLD (f_operand1), opval); 3071 written |= (1 << 8); 3072 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3073 } 3074} 3075} 3076; tmp_tmp_mem; })); 3077if (ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) { 3078 { 3079 SI opval = tmp_tmp; 3080 SET_H_GR (FLD (f_operand1), opval); 3081 written |= (1 << 8); 3082 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3083 } 3084} else { 3085 { 3086 SI opval = tmp_tmp; 3087 SET_H_GR (FLD (f_operand2), opval); 3088 written |= (1 << 7); 3089 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3090 } 3091} 3092{ 3093 { 3094 BI opval = LTSI (tmp_tmp, 0); 3095 CPU (h_nbit) = opval; 3096 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 3097 } 3098 { 3099 BI opval = ANDIF (EQSI (tmp_tmp, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 3100 CPU (h_zbit) = opval; 3101 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 3102 } 3103SET_H_CBIT_MOVE (0); 3104SET_H_VBIT_MOVE (0); 3105{ 3106 { 3107 BI opval = 0; 3108 CPU (h_xbit) = opval; 3109 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 3110 } 3111 { 3112 BI opval = 0; 3113 SET_H_INSN_PREFIXED_P (opval); 3114 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 3115 } 3116} 3117} 3118} 3119 3120 abuf->written = written; 3121#undef FLD 3122} 3123 NEXT (vpc); 3124 3125 CASE (sem, INSN_MOVE_R_SPRV10) : /* move ${Rs},${Pd} */ 3126{ 3127 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3128 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3129#define FLD(f) abuf->fields.sfmt_move_m_sprv10.f 3130 int UNUSED written = 0; 3131 IADDR UNUSED pc = abuf->addr; 3132 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3133 3134{ 3135 SI tmp_tmp; 3136 SI tmp_rno; 3137 tmp_tmp = GET_H_GR (FLD (f_operand1)); 3138 tmp_rno = FLD (f_operand2); 3139if (ORIF (ORIF (EQSI (tmp_rno, 0), EQSI (tmp_rno, 1)), ORIF (EQSI (tmp_rno, 4), EQSI (tmp_rno, 8)))) { 3140cgen_rtx_error (current_cpu, "move-r-spr: trying to set a read-only special register"); 3141} 3142 else { 3143 { 3144 SI opval = tmp_tmp; 3145 SET_H_SR (FLD (f_operand2), opval); 3146 written |= (1 << 2); 3147 TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval); 3148 } 3149} 3150{ 3151 { 3152 BI opval = 0; 3153 CPU (h_xbit) = opval; 3154 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 3155 } 3156 { 3157 BI opval = 0; 3158 SET_H_INSN_PREFIXED_P (opval); 3159 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 3160 } 3161} 3162} 3163 3164 abuf->written = written; 3165#undef FLD 3166} 3167 NEXT (vpc); 3168 3169 CASE (sem, INSN_MOVE_SPR_RV10) : /* move ${Ps},${Rd-sfield} */ 3170{ 3171 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3172 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3173#define FLD(f) abuf->fields.sfmt_move_spr_rv10.f 3174 int UNUSED written = 0; 3175 IADDR UNUSED pc = abuf->addr; 3176 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3177 3178{ 3179 SI tmp_grno; 3180 SI tmp_prno; 3181 SI tmp_newval; 3182 tmp_prno = FLD (f_operand2); 3183 tmp_newval = GET_H_SR (FLD (f_operand2)); 3184if (EQSI (tmp_prno, 5)) { 3185{ 3186 SI tmp_oldregval; 3187 tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand1)); 3188 { 3189 SI opval = ORSI (ANDSI (tmp_newval, 65535), ANDSI (tmp_oldregval, 0xffff0000)); 3190 SET_H_GR (FLD (f_operand1), opval); 3191 written |= (1 << 4); 3192 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3193 } 3194} 3195} 3196 else if (EQSI (tmp_prno, 9)) { 3197 { 3198 SI opval = tmp_newval; 3199 SET_H_GR (FLD (f_operand1), opval); 3200 written |= (1 << 4); 3201 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3202 } 3203} 3204 else if (EQSI (tmp_prno, 10)) { 3205 { 3206 SI opval = tmp_newval; 3207 SET_H_GR (FLD (f_operand1), opval); 3208 written |= (1 << 4); 3209 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3210 } 3211} 3212 else if (EQSI (tmp_prno, 11)) { 3213 { 3214 SI opval = tmp_newval; 3215 SET_H_GR (FLD (f_operand1), opval); 3216 written |= (1 << 4); 3217 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3218 } 3219} 3220 else if (EQSI (tmp_prno, 12)) { 3221 { 3222 SI opval = tmp_newval; 3223 SET_H_GR (FLD (f_operand1), opval); 3224 written |= (1 << 4); 3225 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3226 } 3227} 3228 else if (EQSI (tmp_prno, 13)) { 3229 { 3230 SI opval = tmp_newval; 3231 SET_H_GR (FLD (f_operand1), opval); 3232 written |= (1 << 4); 3233 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3234 } 3235} 3236 else if (EQSI (tmp_prno, 0)) { 3237{ 3238 SI tmp_oldregval; 3239 tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand1)); 3240 { 3241 SI opval = ORSI (ANDSI (tmp_newval, 255), ANDSI (tmp_oldregval, 0xffffff00)); 3242 SET_H_GR (FLD (f_operand1), opval); 3243 written |= (1 << 4); 3244 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3245 } 3246} 3247} 3248 else if (EQSI (tmp_prno, 1)) { 3249{ 3250 SI tmp_oldregval; 3251 tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand1)); 3252 { 3253 SI opval = ORSI (ANDSI (tmp_newval, 255), ANDSI (tmp_oldregval, 0xffffff00)); 3254 SET_H_GR (FLD (f_operand1), opval); 3255 written |= (1 << 4); 3256 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3257 } 3258} 3259} 3260 else if (EQSI (tmp_prno, 4)) { 3261{ 3262 SI tmp_oldregval; 3263 tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand1)); 3264 { 3265 SI opval = ORSI (ANDSI (tmp_newval, 65535), ANDSI (tmp_oldregval, 0xffff0000)); 3266 SET_H_GR (FLD (f_operand1), opval); 3267 written |= (1 << 4); 3268 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3269 } 3270} 3271} 3272 else if (EQSI (tmp_prno, 8)) { 3273 { 3274 SI opval = tmp_newval; 3275 SET_H_GR (FLD (f_operand1), opval); 3276 written |= (1 << 4); 3277 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3278 } 3279} 3280 else if (EQSI (tmp_prno, 7)) { 3281 { 3282 SI opval = tmp_newval; 3283 SET_H_GR (FLD (f_operand1), opval); 3284 written |= (1 << 4); 3285 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3286 } 3287} 3288 else if (EQSI (tmp_prno, 14)) { 3289 { 3290 SI opval = tmp_newval; 3291 SET_H_GR (FLD (f_operand1), opval); 3292 written |= (1 << 4); 3293 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3294 } 3295} 3296 else if (EQSI (tmp_prno, 15)) { 3297 { 3298 SI opval = tmp_newval; 3299 SET_H_GR (FLD (f_operand1), opval); 3300 written |= (1 << 4); 3301 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3302 } 3303} 3304 else { 3305cgen_rtx_error (current_cpu, "move-spr-r from unimplemented register"); 3306} 3307{ 3308 { 3309 BI opval = 0; 3310 CPU (h_xbit) = opval; 3311 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 3312 } 3313 { 3314 BI opval = 0; 3315 SET_H_INSN_PREFIXED_P (opval); 3316 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 3317 } 3318} 3319} 3320 3321 abuf->written = written; 3322#undef FLD 3323} 3324 NEXT (vpc); 3325 3326 CASE (sem, INSN_RET_TYPE) : /* ret/reti/retb */ 3327{ 3328 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3329 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3330#define FLD(f) abuf->fields.sfmt_move_spr_rv10.f 3331 int UNUSED written = 0; 3332 IADDR UNUSED pc = abuf->addr; 3333 SEM_BRANCH_INIT 3334 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3335 3336{ 3337 SI tmp_retaddr; 3338 tmp_retaddr = GET_H_SR (FLD (f_operand2)); 3339{ 3340 { 3341 BI opval = 0; 3342 CPU (h_xbit) = opval; 3343 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 3344 } 3345 { 3346 BI opval = 0; 3347 SET_H_INSN_PREFIXED_P (opval); 3348 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 3349 } 3350} 3351{ 3352 { 3353 USI opval = tmp_retaddr; 3354 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); 3355 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 3356 } 3357} 3358} 3359 3360 SEM_BRANCH_FINI (vpc); 3361#undef FLD 3362} 3363 NEXT (vpc); 3364 3365 CASE (sem, INSN_MOVE_M_SPRV10) : /* move [${Rs}${inc}],${Pd} */ 3366{ 3367 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3368 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3369#define FLD(f) abuf->fields.sfmt_move_m_sprv10.f 3370 int UNUSED written = 0; 3371 IADDR UNUSED pc = abuf->addr; 3372 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3373 3374{ 3375 SI tmp_rno; 3376 SI tmp_newval; 3377 tmp_rno = FLD (f_operand2); 3378if (EQSI (tmp_rno, 5)) { 3379 tmp_newval = EXTHISI (({ SI tmp_addr; 3380 HI tmp_tmp_mem; 3381 BI tmp_postinc; 3382 tmp_postinc = FLD (f_memmode); 3383; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32))); 3384; tmp_tmp_mem = GETMEMHI (current_cpu, pc, tmp_addr); 3385; if (NEBI (tmp_postinc, 0)) { 3386{ 3387if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 3388 tmp_addr = ADDSI (tmp_addr, 2); 3389} 3390 { 3391 SI opval = tmp_addr; 3392 SET_H_GR (FLD (f_operand1), opval); 3393 written |= (1 << 8); 3394 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3395 } 3396} 3397} 3398; tmp_tmp_mem; })); 3399} 3400 else if (EQSI (tmp_rno, 9)) { 3401 tmp_newval = ({ SI tmp_addr; 3402 SI tmp_tmp_mem; 3403 BI tmp_postinc; 3404 tmp_postinc = FLD (f_memmode); 3405; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32))); 3406; tmp_tmp_mem = GETMEMSI (current_cpu, pc, tmp_addr); 3407; if (NEBI (tmp_postinc, 0)) { 3408{ 3409if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 3410 tmp_addr = ADDSI (tmp_addr, 4); 3411} 3412 { 3413 SI opval = tmp_addr; 3414 SET_H_GR (FLD (f_operand1), opval); 3415 written |= (1 << 8); 3416 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3417 } 3418} 3419} 3420; tmp_tmp_mem; }); 3421} 3422 else if (EQSI (tmp_rno, 10)) { 3423 tmp_newval = ({ SI tmp_addr; 3424 SI tmp_tmp_mem; 3425 BI tmp_postinc; 3426 tmp_postinc = FLD (f_memmode); 3427; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32))); 3428; tmp_tmp_mem = GETMEMSI (current_cpu, pc, tmp_addr); 3429; if (NEBI (tmp_postinc, 0)) { 3430{ 3431if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 3432 tmp_addr = ADDSI (tmp_addr, 4); 3433} 3434 { 3435 SI opval = tmp_addr; 3436 SET_H_GR (FLD (f_operand1), opval); 3437 written |= (1 << 8); 3438 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3439 } 3440} 3441} 3442; tmp_tmp_mem; }); 3443} 3444 else if (EQSI (tmp_rno, 11)) { 3445 tmp_newval = ({ SI tmp_addr; 3446 SI tmp_tmp_mem; 3447 BI tmp_postinc; 3448 tmp_postinc = FLD (f_memmode); 3449; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32))); 3450; tmp_tmp_mem = GETMEMSI (current_cpu, pc, tmp_addr); 3451; if (NEBI (tmp_postinc, 0)) { 3452{ 3453if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 3454 tmp_addr = ADDSI (tmp_addr, 4); 3455} 3456 { 3457 SI opval = tmp_addr; 3458 SET_H_GR (FLD (f_operand1), opval); 3459 written |= (1 << 8); 3460 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3461 } 3462} 3463} 3464; tmp_tmp_mem; }); 3465} 3466 else if (EQSI (tmp_rno, 12)) { 3467 tmp_newval = ({ SI tmp_addr; 3468 SI tmp_tmp_mem; 3469 BI tmp_postinc; 3470 tmp_postinc = FLD (f_memmode); 3471; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32))); 3472; tmp_tmp_mem = GETMEMSI (current_cpu, pc, tmp_addr); 3473; if (NEBI (tmp_postinc, 0)) { 3474{ 3475if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 3476 tmp_addr = ADDSI (tmp_addr, 4); 3477} 3478 { 3479 SI opval = tmp_addr; 3480 SET_H_GR (FLD (f_operand1), opval); 3481 written |= (1 << 8); 3482 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3483 } 3484} 3485} 3486; tmp_tmp_mem; }); 3487} 3488 else if (EQSI (tmp_rno, 13)) { 3489 tmp_newval = ({ SI tmp_addr; 3490 SI tmp_tmp_mem; 3491 BI tmp_postinc; 3492 tmp_postinc = FLD (f_memmode); 3493; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32))); 3494; tmp_tmp_mem = GETMEMSI (current_cpu, pc, tmp_addr); 3495; if (NEBI (tmp_postinc, 0)) { 3496{ 3497if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 3498 tmp_addr = ADDSI (tmp_addr, 4); 3499} 3500 { 3501 SI opval = tmp_addr; 3502 SET_H_GR (FLD (f_operand1), opval); 3503 written |= (1 << 8); 3504 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3505 } 3506} 3507} 3508; tmp_tmp_mem; }); 3509} 3510 else if (EQSI (tmp_rno, 7)) { 3511 tmp_newval = ({ SI tmp_addr; 3512 SI tmp_tmp_mem; 3513 BI tmp_postinc; 3514 tmp_postinc = FLD (f_memmode); 3515; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32))); 3516; tmp_tmp_mem = GETMEMSI (current_cpu, pc, tmp_addr); 3517; if (NEBI (tmp_postinc, 0)) { 3518{ 3519if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 3520 tmp_addr = ADDSI (tmp_addr, 4); 3521} 3522 { 3523 SI opval = tmp_addr; 3524 SET_H_GR (FLD (f_operand1), opval); 3525 written |= (1 << 8); 3526 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3527 } 3528} 3529} 3530; tmp_tmp_mem; }); 3531} 3532 else if (EQSI (tmp_rno, 14)) { 3533 tmp_newval = ({ SI tmp_addr; 3534 SI tmp_tmp_mem; 3535 BI tmp_postinc; 3536 tmp_postinc = FLD (f_memmode); 3537; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32))); 3538; tmp_tmp_mem = GETMEMSI (current_cpu, pc, tmp_addr); 3539; if (NEBI (tmp_postinc, 0)) { 3540{ 3541if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 3542 tmp_addr = ADDSI (tmp_addr, 4); 3543} 3544 { 3545 SI opval = tmp_addr; 3546 SET_H_GR (FLD (f_operand1), opval); 3547 written |= (1 << 8); 3548 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3549 } 3550} 3551} 3552; tmp_tmp_mem; }); 3553} 3554 else if (EQSI (tmp_rno, 15)) { 3555 tmp_newval = ({ SI tmp_addr; 3556 SI tmp_tmp_mem; 3557 BI tmp_postinc; 3558 tmp_postinc = FLD (f_memmode); 3559; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32))); 3560; tmp_tmp_mem = GETMEMSI (current_cpu, pc, tmp_addr); 3561; if (NEBI (tmp_postinc, 0)) { 3562{ 3563if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 3564 tmp_addr = ADDSI (tmp_addr, 4); 3565} 3566 { 3567 SI opval = tmp_addr; 3568 SET_H_GR (FLD (f_operand1), opval); 3569 written |= (1 << 8); 3570 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3571 } 3572} 3573} 3574; tmp_tmp_mem; }); 3575} 3576 else { 3577cgen_rtx_error (current_cpu, "Trying to set unimplemented special register"); 3578} 3579 { 3580 SI opval = tmp_newval; 3581 SET_H_SR (FLD (f_operand2), opval); 3582 TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval); 3583 } 3584{ 3585 { 3586 BI opval = 0; 3587 CPU (h_xbit) = opval; 3588 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 3589 } 3590 { 3591 BI opval = 0; 3592 SET_H_INSN_PREFIXED_P (opval); 3593 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 3594 } 3595} 3596} 3597 3598 abuf->written = written; 3599#undef FLD 3600} 3601 NEXT (vpc); 3602 3603 CASE (sem, INSN_MOVE_C_SPRV10_P5) : /* move ${sconst16},${Pd} */ 3604{ 3605 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3606 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3607#define FLD(f) abuf->fields.sfmt_move_c_sprv10_p5.f 3608 int UNUSED written = 0; 3609 IADDR UNUSED pc = abuf->addr; 3610 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 3611 3612{ 3613 { 3614 SI opval = FLD (f_indir_pc__word); 3615 SET_H_SR (FLD (f_operand2), opval); 3616 TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval); 3617 } 3618{ 3619 { 3620 BI opval = 0; 3621 CPU (h_xbit) = opval; 3622 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 3623 } 3624 { 3625 BI opval = 0; 3626 SET_H_INSN_PREFIXED_P (opval); 3627 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 3628 } 3629} 3630} 3631 3632#undef FLD 3633} 3634 NEXT (vpc); 3635 3636 CASE (sem, INSN_MOVE_C_SPRV10_P9) : /* move ${const32},${Pd} */ 3637{ 3638 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3639 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3640#define FLD(f) abuf->fields.sfmt_move_c_sprv10_p9.f 3641 int UNUSED written = 0; 3642 IADDR UNUSED pc = abuf->addr; 3643 vpc = SEM_NEXT_VPC (sem_arg, pc, 6); 3644 3645{ 3646 { 3647 SI opval = FLD (f_indir_pc__dword); 3648 SET_H_SR (FLD (f_operand2), opval); 3649 TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval); 3650 } 3651{ 3652 { 3653 BI opval = 0; 3654 CPU (h_xbit) = opval; 3655 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 3656 } 3657 { 3658 BI opval = 0; 3659 SET_H_INSN_PREFIXED_P (opval); 3660 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 3661 } 3662} 3663} 3664 3665#undef FLD 3666} 3667 NEXT (vpc); 3668 3669 CASE (sem, INSN_MOVE_C_SPRV10_P10) : /* move ${const32},${Pd} */ 3670{ 3671 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3672 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3673#define FLD(f) abuf->fields.sfmt_move_c_sprv10_p9.f 3674 int UNUSED written = 0; 3675 IADDR UNUSED pc = abuf->addr; 3676 vpc = SEM_NEXT_VPC (sem_arg, pc, 6); 3677 3678{ 3679 { 3680 SI opval = FLD (f_indir_pc__dword); 3681 SET_H_SR (FLD (f_operand2), opval); 3682 TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval); 3683 } 3684{ 3685 { 3686 BI opval = 0; 3687 CPU (h_xbit) = opval; 3688 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 3689 } 3690 { 3691 BI opval = 0; 3692 SET_H_INSN_PREFIXED_P (opval); 3693 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 3694 } 3695} 3696} 3697 3698#undef FLD 3699} 3700 NEXT (vpc); 3701 3702 CASE (sem, INSN_MOVE_C_SPRV10_P11) : /* move ${const32},${Pd} */ 3703{ 3704 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3705 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3706#define FLD(f) abuf->fields.sfmt_move_c_sprv10_p9.f 3707 int UNUSED written = 0; 3708 IADDR UNUSED pc = abuf->addr; 3709 vpc = SEM_NEXT_VPC (sem_arg, pc, 6); 3710 3711{ 3712 { 3713 SI opval = FLD (f_indir_pc__dword); 3714 SET_H_SR (FLD (f_operand2), opval); 3715 TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval); 3716 } 3717{ 3718 { 3719 BI opval = 0; 3720 CPU (h_xbit) = opval; 3721 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 3722 } 3723 { 3724 BI opval = 0; 3725 SET_H_INSN_PREFIXED_P (opval); 3726 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 3727 } 3728} 3729} 3730 3731#undef FLD 3732} 3733 NEXT (vpc); 3734 3735 CASE (sem, INSN_MOVE_C_SPRV10_P12) : /* move ${const32},${Pd} */ 3736{ 3737 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3738 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3739#define FLD(f) abuf->fields.sfmt_move_c_sprv10_p9.f 3740 int UNUSED written = 0; 3741 IADDR UNUSED pc = abuf->addr; 3742 vpc = SEM_NEXT_VPC (sem_arg, pc, 6); 3743 3744{ 3745 { 3746 SI opval = FLD (f_indir_pc__dword); 3747 SET_H_SR (FLD (f_operand2), opval); 3748 TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval); 3749 } 3750{ 3751 { 3752 BI opval = 0; 3753 CPU (h_xbit) = opval; 3754 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 3755 } 3756 { 3757 BI opval = 0; 3758 SET_H_INSN_PREFIXED_P (opval); 3759 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 3760 } 3761} 3762} 3763 3764#undef FLD 3765} 3766 NEXT (vpc); 3767 3768 CASE (sem, INSN_MOVE_C_SPRV10_P13) : /* move ${const32},${Pd} */ 3769{ 3770 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3771 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3772#define FLD(f) abuf->fields.sfmt_move_c_sprv10_p9.f 3773 int UNUSED written = 0; 3774 IADDR UNUSED pc = abuf->addr; 3775 vpc = SEM_NEXT_VPC (sem_arg, pc, 6); 3776 3777{ 3778 { 3779 SI opval = FLD (f_indir_pc__dword); 3780 SET_H_SR (FLD (f_operand2), opval); 3781 TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval); 3782 } 3783{ 3784 { 3785 BI opval = 0; 3786 CPU (h_xbit) = opval; 3787 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 3788 } 3789 { 3790 BI opval = 0; 3791 SET_H_INSN_PREFIXED_P (opval); 3792 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 3793 } 3794} 3795} 3796 3797#undef FLD 3798} 3799 NEXT (vpc); 3800 3801 CASE (sem, INSN_MOVE_C_SPRV10_P7) : /* move ${const32},${Pd} */ 3802{ 3803 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3804 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3805#define FLD(f) abuf->fields.sfmt_move_c_sprv10_p9.f 3806 int UNUSED written = 0; 3807 IADDR UNUSED pc = abuf->addr; 3808 vpc = SEM_NEXT_VPC (sem_arg, pc, 6); 3809 3810{ 3811 { 3812 SI opval = FLD (f_indir_pc__dword); 3813 SET_H_SR (FLD (f_operand2), opval); 3814 TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval); 3815 } 3816{ 3817 { 3818 BI opval = 0; 3819 CPU (h_xbit) = opval; 3820 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 3821 } 3822 { 3823 BI opval = 0; 3824 SET_H_INSN_PREFIXED_P (opval); 3825 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 3826 } 3827} 3828} 3829 3830#undef FLD 3831} 3832 NEXT (vpc); 3833 3834 CASE (sem, INSN_MOVE_C_SPRV10_P14) : /* move ${const32},${Pd} */ 3835{ 3836 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3837 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3838#define FLD(f) abuf->fields.sfmt_move_c_sprv10_p9.f 3839 int UNUSED written = 0; 3840 IADDR UNUSED pc = abuf->addr; 3841 vpc = SEM_NEXT_VPC (sem_arg, pc, 6); 3842 3843{ 3844 { 3845 SI opval = FLD (f_indir_pc__dword); 3846 SET_H_SR (FLD (f_operand2), opval); 3847 TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval); 3848 } 3849{ 3850 { 3851 BI opval = 0; 3852 CPU (h_xbit) = opval; 3853 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 3854 } 3855 { 3856 BI opval = 0; 3857 SET_H_INSN_PREFIXED_P (opval); 3858 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 3859 } 3860} 3861} 3862 3863#undef FLD 3864} 3865 NEXT (vpc); 3866 3867 CASE (sem, INSN_MOVE_C_SPRV10_P15) : /* move ${const32},${Pd} */ 3868{ 3869 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3870 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3871#define FLD(f) abuf->fields.sfmt_move_c_sprv10_p9.f 3872 int UNUSED written = 0; 3873 IADDR UNUSED pc = abuf->addr; 3874 vpc = SEM_NEXT_VPC (sem_arg, pc, 6); 3875 3876{ 3877 { 3878 SI opval = FLD (f_indir_pc__dword); 3879 SET_H_SR (FLD (f_operand2), opval); 3880 TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval); 3881 } 3882{ 3883 { 3884 BI opval = 0; 3885 CPU (h_xbit) = opval; 3886 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 3887 } 3888 { 3889 BI opval = 0; 3890 SET_H_INSN_PREFIXED_P (opval); 3891 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 3892 } 3893} 3894} 3895 3896#undef FLD 3897} 3898 NEXT (vpc); 3899 3900 CASE (sem, INSN_MOVE_SPR_MV10) : /* move ${Ps},[${Rd-sfield}${inc}] */ 3901{ 3902 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3903 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3904#define FLD(f) abuf->fields.sfmt_move_spr_mv10.f 3905 int UNUSED written = 0; 3906 IADDR UNUSED pc = abuf->addr; 3907 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3908 3909{ 3910 SI tmp_rno; 3911 tmp_rno = FLD (f_operand2); 3912if (EQSI (tmp_rno, 5)) { 3913{ 3914 SI tmp_addr; 3915 BI tmp_postinc; 3916 tmp_postinc = FLD (f_memmode); 3917 tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32))); 3918if (ANDIF (GET_H_V32_NON_V32 (), NEBI (CPU (h_xbit), 0))) { 3919if (EQBI (CPU (h_pbit), 0)) { 3920{ 3921 { 3922 HI opval = GET_H_SR (FLD (f_operand2)); 3923 SETMEMHI (current_cpu, pc, tmp_addr, opval); 3924 written |= (1 << 11); 3925 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 3926 } 3927 { 3928 BI opval = CPU (h_pbit); 3929 CPU (h_cbit) = opval; 3930 written |= (1 << 10); 3931 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 3932 } 3933} 3934} else { 3935 { 3936 BI opval = 1; 3937 CPU (h_cbit) = opval; 3938 written |= (1 << 10); 3939 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 3940 } 3941} 3942} else { 3943 { 3944 HI opval = GET_H_SR (FLD (f_operand2)); 3945 SETMEMHI (current_cpu, pc, tmp_addr, opval); 3946 written |= (1 << 11); 3947 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 3948 } 3949} 3950if (NEBI (tmp_postinc, 0)) { 3951{ 3952if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 3953 tmp_addr = ADDSI (tmp_addr, 2); 3954} 3955 { 3956 SI opval = tmp_addr; 3957 SET_H_GR (FLD (f_operand1), opval); 3958 written |= (1 << 9); 3959 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3960 } 3961} 3962} 3963} 3964} 3965 else if (EQSI (tmp_rno, 9)) { 3966{ 3967 SI tmp_addr; 3968 BI tmp_postinc; 3969 tmp_postinc = FLD (f_memmode); 3970 tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32))); 3971if (ANDIF (GET_H_V32_NON_V32 (), NEBI (CPU (h_xbit), 0))) { 3972if (EQBI (CPU (h_pbit), 0)) { 3973{ 3974 { 3975 SI opval = GET_H_SR (FLD (f_operand2)); 3976 SETMEMSI (current_cpu, pc, tmp_addr, opval); 3977 written |= (1 << 13); 3978 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 3979 } 3980 { 3981 BI opval = CPU (h_pbit); 3982 CPU (h_cbit) = opval; 3983 written |= (1 << 10); 3984 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 3985 } 3986} 3987} else { 3988 { 3989 BI opval = 1; 3990 CPU (h_cbit) = opval; 3991 written |= (1 << 10); 3992 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 3993 } 3994} 3995} else { 3996 { 3997 SI opval = GET_H_SR (FLD (f_operand2)); 3998 SETMEMSI (current_cpu, pc, tmp_addr, opval); 3999 written |= (1 << 13); 4000 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 4001 } 4002} 4003if (NEBI (tmp_postinc, 0)) { 4004{ 4005if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 4006 tmp_addr = ADDSI (tmp_addr, 4); 4007} 4008 { 4009 SI opval = tmp_addr; 4010 SET_H_GR (FLD (f_operand1), opval); 4011 written |= (1 << 9); 4012 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 4013 } 4014} 4015} 4016} 4017} 4018 else if (EQSI (tmp_rno, 10)) { 4019{ 4020 SI tmp_addr; 4021 BI tmp_postinc; 4022 tmp_postinc = FLD (f_memmode); 4023 tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32))); 4024if (ANDIF (GET_H_V32_NON_V32 (), NEBI (CPU (h_xbit), 0))) { 4025if (EQBI (CPU (h_pbit), 0)) { 4026{ 4027 { 4028 SI opval = GET_H_SR (FLD (f_operand2)); 4029 SETMEMSI (current_cpu, pc, tmp_addr, opval); 4030 written |= (1 << 13); 4031 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 4032 } 4033 { 4034 BI opval = CPU (h_pbit); 4035 CPU (h_cbit) = opval; 4036 written |= (1 << 10); 4037 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 4038 } 4039} 4040} else { 4041 { 4042 BI opval = 1; 4043 CPU (h_cbit) = opval; 4044 written |= (1 << 10); 4045 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 4046 } 4047} 4048} else { 4049 { 4050 SI opval = GET_H_SR (FLD (f_operand2)); 4051 SETMEMSI (current_cpu, pc, tmp_addr, opval); 4052 written |= (1 << 13); 4053 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 4054 } 4055} 4056if (NEBI (tmp_postinc, 0)) { 4057{ 4058if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 4059 tmp_addr = ADDSI (tmp_addr, 4); 4060} 4061 { 4062 SI opval = tmp_addr; 4063 SET_H_GR (FLD (f_operand1), opval); 4064 written |= (1 << 9); 4065 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 4066 } 4067} 4068} 4069} 4070} 4071 else if (EQSI (tmp_rno, 11)) { 4072{ 4073 SI tmp_addr; 4074 BI tmp_postinc; 4075 tmp_postinc = FLD (f_memmode); 4076 tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32))); 4077if (ANDIF (GET_H_V32_NON_V32 (), NEBI (CPU (h_xbit), 0))) { 4078if (EQBI (CPU (h_pbit), 0)) { 4079{ 4080 { 4081 SI opval = GET_H_SR (FLD (f_operand2)); 4082 SETMEMSI (current_cpu, pc, tmp_addr, opval); 4083 written |= (1 << 13); 4084 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 4085 } 4086 { 4087 BI opval = CPU (h_pbit); 4088 CPU (h_cbit) = opval; 4089 written |= (1 << 10); 4090 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 4091 } 4092} 4093} else { 4094 { 4095 BI opval = 1; 4096 CPU (h_cbit) = opval; 4097 written |= (1 << 10); 4098 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 4099 } 4100} 4101} else { 4102 { 4103 SI opval = GET_H_SR (FLD (f_operand2)); 4104 SETMEMSI (current_cpu, pc, tmp_addr, opval); 4105 written |= (1 << 13); 4106 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 4107 } 4108} 4109if (NEBI (tmp_postinc, 0)) { 4110{ 4111if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 4112 tmp_addr = ADDSI (tmp_addr, 4); 4113} 4114 { 4115 SI opval = tmp_addr; 4116 SET_H_GR (FLD (f_operand1), opval); 4117 written |= (1 << 9); 4118 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 4119 } 4120} 4121} 4122} 4123} 4124 else if (EQSI (tmp_rno, 12)) { 4125{ 4126 SI tmp_addr; 4127 BI tmp_postinc; 4128 tmp_postinc = FLD (f_memmode); 4129 tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32))); 4130if (ANDIF (GET_H_V32_NON_V32 (), NEBI (CPU (h_xbit), 0))) { 4131if (EQBI (CPU (h_pbit), 0)) { 4132{ 4133 { 4134 SI opval = GET_H_SR (FLD (f_operand2)); 4135 SETMEMSI (current_cpu, pc, tmp_addr, opval); 4136 written |= (1 << 13); 4137 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 4138 } 4139 { 4140 BI opval = CPU (h_pbit); 4141 CPU (h_cbit) = opval; 4142 written |= (1 << 10); 4143 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 4144 } 4145} 4146} else { 4147 { 4148 BI opval = 1; 4149 CPU (h_cbit) = opval; 4150 written |= (1 << 10); 4151 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 4152 } 4153} 4154} else { 4155 { 4156 SI opval = GET_H_SR (FLD (f_operand2)); 4157 SETMEMSI (current_cpu, pc, tmp_addr, opval); 4158 written |= (1 << 13); 4159 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 4160 } 4161} 4162if (NEBI (tmp_postinc, 0)) { 4163{ 4164if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 4165 tmp_addr = ADDSI (tmp_addr, 4); 4166} 4167 { 4168 SI opval = tmp_addr; 4169 SET_H_GR (FLD (f_operand1), opval); 4170 written |= (1 << 9); 4171 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 4172 } 4173} 4174} 4175} 4176} 4177 else if (EQSI (tmp_rno, 13)) { 4178{ 4179 SI tmp_addr; 4180 BI tmp_postinc; 4181 tmp_postinc = FLD (f_memmode); 4182 tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32))); 4183if (ANDIF (GET_H_V32_NON_V32 (), NEBI (CPU (h_xbit), 0))) { 4184if (EQBI (CPU (h_pbit), 0)) { 4185{ 4186 { 4187 SI opval = GET_H_SR (FLD (f_operand2)); 4188 SETMEMSI (current_cpu, pc, tmp_addr, opval); 4189 written |= (1 << 13); 4190 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 4191 } 4192 { 4193 BI opval = CPU (h_pbit); 4194 CPU (h_cbit) = opval; 4195 written |= (1 << 10); 4196 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 4197 } 4198} 4199} else { 4200 { 4201 BI opval = 1; 4202 CPU (h_cbit) = opval; 4203 written |= (1 << 10); 4204 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 4205 } 4206} 4207} else { 4208 { 4209 SI opval = GET_H_SR (FLD (f_operand2)); 4210 SETMEMSI (current_cpu, pc, tmp_addr, opval); 4211 written |= (1 << 13); 4212 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 4213 } 4214} 4215if (NEBI (tmp_postinc, 0)) { 4216{ 4217if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 4218 tmp_addr = ADDSI (tmp_addr, 4); 4219} 4220 { 4221 SI opval = tmp_addr; 4222 SET_H_GR (FLD (f_operand1), opval); 4223 written |= (1 << 9); 4224 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 4225 } 4226} 4227} 4228} 4229} 4230 else if (EQSI (tmp_rno, 0)) { 4231{ 4232 SI tmp_addr; 4233 BI tmp_postinc; 4234 tmp_postinc = FLD (f_memmode); 4235 tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32))); 4236if (ANDIF (GET_H_V32_NON_V32 (), NEBI (CPU (h_xbit), 0))) { 4237if (EQBI (CPU (h_pbit), 0)) { 4238{ 4239 { 4240 QI opval = GET_H_SR (FLD (f_operand2)); 4241 SETMEMQI (current_cpu, pc, tmp_addr, opval); 4242 written |= (1 << 12); 4243 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 4244 } 4245 { 4246 BI opval = CPU (h_pbit); 4247 CPU (h_cbit) = opval; 4248 written |= (1 << 10); 4249 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 4250 } 4251} 4252} else { 4253 { 4254 BI opval = 1; 4255 CPU (h_cbit) = opval; 4256 written |= (1 << 10); 4257 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 4258 } 4259} 4260} else { 4261 { 4262 QI opval = GET_H_SR (FLD (f_operand2)); 4263 SETMEMQI (current_cpu, pc, tmp_addr, opval); 4264 written |= (1 << 12); 4265 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 4266 } 4267} 4268if (NEBI (tmp_postinc, 0)) { 4269{ 4270if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 4271 tmp_addr = ADDSI (tmp_addr, 1); 4272} 4273 { 4274 SI opval = tmp_addr; 4275 SET_H_GR (FLD (f_operand1), opval); 4276 written |= (1 << 9); 4277 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 4278 } 4279} 4280} 4281} 4282} 4283 else if (EQSI (tmp_rno, 1)) { 4284{ 4285 SI tmp_addr; 4286 BI tmp_postinc; 4287 tmp_postinc = FLD (f_memmode); 4288 tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32))); 4289if (ANDIF (GET_H_V32_NON_V32 (), NEBI (CPU (h_xbit), 0))) { 4290if (EQBI (CPU (h_pbit), 0)) { 4291{ 4292 { 4293 QI opval = GET_H_SR (FLD (f_operand2)); 4294 SETMEMQI (current_cpu, pc, tmp_addr, opval); 4295 written |= (1 << 12); 4296 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 4297 } 4298 { 4299 BI opval = CPU (h_pbit); 4300 CPU (h_cbit) = opval; 4301 written |= (1 << 10); 4302 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 4303 } 4304} 4305} else { 4306 { 4307 BI opval = 1; 4308 CPU (h_cbit) = opval; 4309 written |= (1 << 10); 4310 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 4311 } 4312} 4313} else { 4314 { 4315 QI opval = GET_H_SR (FLD (f_operand2)); 4316 SETMEMQI (current_cpu, pc, tmp_addr, opval); 4317 written |= (1 << 12); 4318 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 4319 } 4320} 4321if (NEBI (tmp_postinc, 0)) { 4322{ 4323if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 4324 tmp_addr = ADDSI (tmp_addr, 1); 4325} 4326 { 4327 SI opval = tmp_addr; 4328 SET_H_GR (FLD (f_operand1), opval); 4329 written |= (1 << 9); 4330 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 4331 } 4332} 4333} 4334} 4335} 4336 else if (EQSI (tmp_rno, 4)) { 4337{ 4338 SI tmp_addr; 4339 BI tmp_postinc; 4340 tmp_postinc = FLD (f_memmode); 4341 tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32))); 4342if (ANDIF (GET_H_V32_NON_V32 (), NEBI (CPU (h_xbit), 0))) { 4343if (EQBI (CPU (h_pbit), 0)) { 4344{ 4345 { 4346 HI opval = GET_H_SR (FLD (f_operand2)); 4347 SETMEMHI (current_cpu, pc, tmp_addr, opval); 4348 written |= (1 << 11); 4349 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 4350 } 4351 { 4352 BI opval = CPU (h_pbit); 4353 CPU (h_cbit) = opval; 4354 written |= (1 << 10); 4355 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 4356 } 4357} 4358} else { 4359 { 4360 BI opval = 1; 4361 CPU (h_cbit) = opval; 4362 written |= (1 << 10); 4363 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 4364 } 4365} 4366} else { 4367 { 4368 HI opval = GET_H_SR (FLD (f_operand2)); 4369 SETMEMHI (current_cpu, pc, tmp_addr, opval); 4370 written |= (1 << 11); 4371 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 4372 } 4373} 4374if (NEBI (tmp_postinc, 0)) { 4375{ 4376if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 4377 tmp_addr = ADDSI (tmp_addr, 2); 4378} 4379 { 4380 SI opval = tmp_addr; 4381 SET_H_GR (FLD (f_operand1), opval); 4382 written |= (1 << 9); 4383 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 4384 } 4385} 4386} 4387} 4388} 4389 else if (EQSI (tmp_rno, 8)) { 4390{ 4391 SI tmp_addr; 4392 BI tmp_postinc; 4393 tmp_postinc = FLD (f_memmode); 4394 tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32))); 4395if (ANDIF (GET_H_V32_NON_V32 (), NEBI (CPU (h_xbit), 0))) { 4396if (EQBI (CPU (h_pbit), 0)) { 4397{ 4398 { 4399 SI opval = GET_H_SR (FLD (f_operand2)); 4400 SETMEMSI (current_cpu, pc, tmp_addr, opval); 4401 written |= (1 << 13); 4402 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 4403 } 4404 { 4405 BI opval = CPU (h_pbit); 4406 CPU (h_cbit) = opval; 4407 written |= (1 << 10); 4408 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 4409 } 4410} 4411} else { 4412 { 4413 BI opval = 1; 4414 CPU (h_cbit) = opval; 4415 written |= (1 << 10); 4416 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 4417 } 4418} 4419} else { 4420 { 4421 SI opval = GET_H_SR (FLD (f_operand2)); 4422 SETMEMSI (current_cpu, pc, tmp_addr, opval); 4423 written |= (1 << 13); 4424 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 4425 } 4426} 4427if (NEBI (tmp_postinc, 0)) { 4428{ 4429if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 4430 tmp_addr = ADDSI (tmp_addr, 4); 4431} 4432 { 4433 SI opval = tmp_addr; 4434 SET_H_GR (FLD (f_operand1), opval); 4435 written |= (1 << 9); 4436 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 4437 } 4438} 4439} 4440} 4441} 4442 else if (EQSI (tmp_rno, 7)) { 4443{ 4444 SI tmp_addr; 4445 BI tmp_postinc; 4446 tmp_postinc = FLD (f_memmode); 4447 tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32))); 4448if (ANDIF (GET_H_V32_NON_V32 (), NEBI (CPU (h_xbit), 0))) { 4449if (EQBI (CPU (h_pbit), 0)) { 4450{ 4451 { 4452 SI opval = GET_H_SR (FLD (f_operand2)); 4453 SETMEMSI (current_cpu, pc, tmp_addr, opval); 4454 written |= (1 << 13); 4455 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 4456 } 4457 { 4458 BI opval = CPU (h_pbit); 4459 CPU (h_cbit) = opval; 4460 written |= (1 << 10); 4461 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 4462 } 4463} 4464} else { 4465 { 4466 BI opval = 1; 4467 CPU (h_cbit) = opval; 4468 written |= (1 << 10); 4469 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 4470 } 4471} 4472} else { 4473 { 4474 SI opval = GET_H_SR (FLD (f_operand2)); 4475 SETMEMSI (current_cpu, pc, tmp_addr, opval); 4476 written |= (1 << 13); 4477 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 4478 } 4479} 4480if (NEBI (tmp_postinc, 0)) { 4481{ 4482if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 4483 tmp_addr = ADDSI (tmp_addr, 4); 4484} 4485 { 4486 SI opval = tmp_addr; 4487 SET_H_GR (FLD (f_operand1), opval); 4488 written |= (1 << 9); 4489 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 4490 } 4491} 4492} 4493} 4494} 4495 else if (EQSI (tmp_rno, 14)) { 4496{ 4497 SI tmp_addr; 4498 BI tmp_postinc; 4499 tmp_postinc = FLD (f_memmode); 4500 tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32))); 4501if (ANDIF (GET_H_V32_NON_V32 (), NEBI (CPU (h_xbit), 0))) { 4502if (EQBI (CPU (h_pbit), 0)) { 4503{ 4504 { 4505 SI opval = GET_H_SR (FLD (f_operand2)); 4506 SETMEMSI (current_cpu, pc, tmp_addr, opval); 4507 written |= (1 << 13); 4508 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 4509 } 4510 { 4511 BI opval = CPU (h_pbit); 4512 CPU (h_cbit) = opval; 4513 written |= (1 << 10); 4514 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 4515 } 4516} 4517} else { 4518 { 4519 BI opval = 1; 4520 CPU (h_cbit) = opval; 4521 written |= (1 << 10); 4522 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 4523 } 4524} 4525} else { 4526 { 4527 SI opval = GET_H_SR (FLD (f_operand2)); 4528 SETMEMSI (current_cpu, pc, tmp_addr, opval); 4529 written |= (1 << 13); 4530 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 4531 } 4532} 4533if (NEBI (tmp_postinc, 0)) { 4534{ 4535if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 4536 tmp_addr = ADDSI (tmp_addr, 4); 4537} 4538 { 4539 SI opval = tmp_addr; 4540 SET_H_GR (FLD (f_operand1), opval); 4541 written |= (1 << 9); 4542 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 4543 } 4544} 4545} 4546} 4547} 4548 else if (EQSI (tmp_rno, 15)) { 4549{ 4550 SI tmp_addr; 4551 BI tmp_postinc; 4552 tmp_postinc = FLD (f_memmode); 4553 tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32))); 4554if (ANDIF (GET_H_V32_NON_V32 (), NEBI (CPU (h_xbit), 0))) { 4555if (EQBI (CPU (h_pbit), 0)) { 4556{ 4557 { 4558 SI opval = GET_H_SR (FLD (f_operand2)); 4559 SETMEMSI (current_cpu, pc, tmp_addr, opval); 4560 written |= (1 << 13); 4561 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 4562 } 4563 { 4564 BI opval = CPU (h_pbit); 4565 CPU (h_cbit) = opval; 4566 written |= (1 << 10); 4567 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 4568 } 4569} 4570} else { 4571 { 4572 BI opval = 1; 4573 CPU (h_cbit) = opval; 4574 written |= (1 << 10); 4575 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 4576 } 4577} 4578} else { 4579 { 4580 SI opval = GET_H_SR (FLD (f_operand2)); 4581 SETMEMSI (current_cpu, pc, tmp_addr, opval); 4582 written |= (1 << 13); 4583 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 4584 } 4585} 4586if (NEBI (tmp_postinc, 0)) { 4587{ 4588if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 4589 tmp_addr = ADDSI (tmp_addr, 4); 4590} 4591 { 4592 SI opval = tmp_addr; 4593 SET_H_GR (FLD (f_operand1), opval); 4594 written |= (1 << 9); 4595 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 4596 } 4597} 4598} 4599} 4600} 4601 else { 4602cgen_rtx_error (current_cpu, "write from unimplemented special register"); 4603} 4604{ 4605 { 4606 BI opval = 0; 4607 CPU (h_xbit) = opval; 4608 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 4609 } 4610 { 4611 BI opval = 0; 4612 SET_H_INSN_PREFIXED_P (opval); 4613 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 4614 } 4615} 4616} 4617 4618 abuf->written = written; 4619#undef FLD 4620} 4621 NEXT (vpc); 4622 4623 CASE (sem, INSN_SBFS) : /* sbfs [${Rd-sfield}${inc}] */ 4624{ 4625 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4626 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4627#define FLD(f) abuf->fields.fmt_empty.f 4628 int UNUSED written = 0; 4629 IADDR UNUSED pc = abuf->addr; 4630 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4631 4632cgen_rtx_error (current_cpu, "SBFS isn't implemented"); 4633 4634#undef FLD 4635} 4636 NEXT (vpc); 4637 4638 CASE (sem, INSN_MOVEM_R_M) : /* movem ${Rs-dfield},[${Rd-sfield}${inc}] */ 4639{ 4640 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4641 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4642#define FLD(f) abuf->fields.sfmt_movem_r_m.f 4643 int UNUSED written = 0; 4644 IADDR UNUSED pc = abuf->addr; 4645 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4646 4647{ 4648 SI tmp_addr; 4649 BI tmp_postinc; 4650 tmp_postinc = FLD (f_memmode); 4651{ 4652 SI tmp_dummy; 4653 tmp_dummy = GET_H_GR (FLD (f_operand2)); 4654} 4655 tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32))); 4656{ 4657if (GESI (FLD (f_operand2), 15)) { 4658{ 4659 SI tmp_tmp; 4660 tmp_tmp = GET_H_GR (((UINT) 15)); 4661 { 4662 SI opval = tmp_tmp; 4663 SETMEMSI (current_cpu, pc, tmp_addr, opval); 4664 written |= (1 << 23); 4665 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 4666 } 4667 tmp_addr = ADDSI (tmp_addr, 4); 4668} 4669} 4670if (GESI (FLD (f_operand2), 14)) { 4671{ 4672 SI tmp_tmp; 4673 tmp_tmp = GET_H_GR (((UINT) 14)); 4674 { 4675 SI opval = tmp_tmp; 4676 SETMEMSI (current_cpu, pc, tmp_addr, opval); 4677 written |= (1 << 23); 4678 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 4679 } 4680 tmp_addr = ADDSI (tmp_addr, 4); 4681} 4682} 4683if (GESI (FLD (f_operand2), 13)) { 4684{ 4685 SI tmp_tmp; 4686 tmp_tmp = GET_H_GR (((UINT) 13)); 4687 { 4688 SI opval = tmp_tmp; 4689 SETMEMSI (current_cpu, pc, tmp_addr, opval); 4690 written |= (1 << 23); 4691 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 4692 } 4693 tmp_addr = ADDSI (tmp_addr, 4); 4694} 4695} 4696if (GESI (FLD (f_operand2), 12)) { 4697{ 4698 SI tmp_tmp; 4699 tmp_tmp = GET_H_GR (((UINT) 12)); 4700 { 4701 SI opval = tmp_tmp; 4702 SETMEMSI (current_cpu, pc, tmp_addr, opval); 4703 written |= (1 << 23); 4704 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 4705 } 4706 tmp_addr = ADDSI (tmp_addr, 4); 4707} 4708} 4709if (GESI (FLD (f_operand2), 11)) { 4710{ 4711 SI tmp_tmp; 4712 tmp_tmp = GET_H_GR (((UINT) 11)); 4713 { 4714 SI opval = tmp_tmp; 4715 SETMEMSI (current_cpu, pc, tmp_addr, opval); 4716 written |= (1 << 23); 4717 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 4718 } 4719 tmp_addr = ADDSI (tmp_addr, 4); 4720} 4721} 4722if (GESI (FLD (f_operand2), 10)) { 4723{ 4724 SI tmp_tmp; 4725 tmp_tmp = GET_H_GR (((UINT) 10)); 4726 { 4727 SI opval = tmp_tmp; 4728 SETMEMSI (current_cpu, pc, tmp_addr, opval); 4729 written |= (1 << 23); 4730 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 4731 } 4732 tmp_addr = ADDSI (tmp_addr, 4); 4733} 4734} 4735if (GESI (FLD (f_operand2), 9)) { 4736{ 4737 SI tmp_tmp; 4738 tmp_tmp = GET_H_GR (((UINT) 9)); 4739 { 4740 SI opval = tmp_tmp; 4741 SETMEMSI (current_cpu, pc, tmp_addr, opval); 4742 written |= (1 << 23); 4743 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 4744 } 4745 tmp_addr = ADDSI (tmp_addr, 4); 4746} 4747} 4748if (GESI (FLD (f_operand2), 8)) { 4749{ 4750 SI tmp_tmp; 4751 tmp_tmp = GET_H_GR (((UINT) 8)); 4752 { 4753 SI opval = tmp_tmp; 4754 SETMEMSI (current_cpu, pc, tmp_addr, opval); 4755 written |= (1 << 23); 4756 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 4757 } 4758 tmp_addr = ADDSI (tmp_addr, 4); 4759} 4760} 4761if (GESI (FLD (f_operand2), 7)) { 4762{ 4763 SI tmp_tmp; 4764 tmp_tmp = GET_H_GR (((UINT) 7)); 4765 { 4766 SI opval = tmp_tmp; 4767 SETMEMSI (current_cpu, pc, tmp_addr, opval); 4768 written |= (1 << 23); 4769 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 4770 } 4771 tmp_addr = ADDSI (tmp_addr, 4); 4772} 4773} 4774if (GESI (FLD (f_operand2), 6)) { 4775{ 4776 SI tmp_tmp; 4777 tmp_tmp = GET_H_GR (((UINT) 6)); 4778 { 4779 SI opval = tmp_tmp; 4780 SETMEMSI (current_cpu, pc, tmp_addr, opval); 4781 written |= (1 << 23); 4782 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 4783 } 4784 tmp_addr = ADDSI (tmp_addr, 4); 4785} 4786} 4787if (GESI (FLD (f_operand2), 5)) { 4788{ 4789 SI tmp_tmp; 4790 tmp_tmp = GET_H_GR (((UINT) 5)); 4791 { 4792 SI opval = tmp_tmp; 4793 SETMEMSI (current_cpu, pc, tmp_addr, opval); 4794 written |= (1 << 23); 4795 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 4796 } 4797 tmp_addr = ADDSI (tmp_addr, 4); 4798} 4799} 4800if (GESI (FLD (f_operand2), 4)) { 4801{ 4802 SI tmp_tmp; 4803 tmp_tmp = GET_H_GR (((UINT) 4)); 4804 { 4805 SI opval = tmp_tmp; 4806 SETMEMSI (current_cpu, pc, tmp_addr, opval); 4807 written |= (1 << 23); 4808 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 4809 } 4810 tmp_addr = ADDSI (tmp_addr, 4); 4811} 4812} 4813if (GESI (FLD (f_operand2), 3)) { 4814{ 4815 SI tmp_tmp; 4816 tmp_tmp = GET_H_GR (((UINT) 3)); 4817 { 4818 SI opval = tmp_tmp; 4819 SETMEMSI (current_cpu, pc, tmp_addr, opval); 4820 written |= (1 << 23); 4821 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 4822 } 4823 tmp_addr = ADDSI (tmp_addr, 4); 4824} 4825} 4826if (GESI (FLD (f_operand2), 2)) { 4827{ 4828 SI tmp_tmp; 4829 tmp_tmp = GET_H_GR (((UINT) 2)); 4830 { 4831 SI opval = tmp_tmp; 4832 SETMEMSI (current_cpu, pc, tmp_addr, opval); 4833 written |= (1 << 23); 4834 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 4835 } 4836 tmp_addr = ADDSI (tmp_addr, 4); 4837} 4838} 4839if (GESI (FLD (f_operand2), 1)) { 4840{ 4841 SI tmp_tmp; 4842 tmp_tmp = GET_H_GR (((UINT) 1)); 4843 { 4844 SI opval = tmp_tmp; 4845 SETMEMSI (current_cpu, pc, tmp_addr, opval); 4846 written |= (1 << 23); 4847 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 4848 } 4849 tmp_addr = ADDSI (tmp_addr, 4); 4850} 4851} 4852if (GESI (FLD (f_operand2), 0)) { 4853{ 4854 SI tmp_tmp; 4855 tmp_tmp = GET_H_GR (((UINT) 0)); 4856 { 4857 SI opval = tmp_tmp; 4858 SETMEMSI (current_cpu, pc, tmp_addr, opval); 4859 written |= (1 << 23); 4860 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 4861 } 4862 tmp_addr = ADDSI (tmp_addr, 4); 4863} 4864} 4865} 4866if (NEBI (tmp_postinc, 0)) { 4867 { 4868 SI opval = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (tmp_addr) : (CPU (h_prefixreg_pre_v32))); 4869 SET_H_GR (FLD (f_operand1), opval); 4870 written |= (1 << 22); 4871 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 4872 } 4873} 4874{ 4875 { 4876 BI opval = 0; 4877 CPU (h_xbit) = opval; 4878 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 4879 } 4880 { 4881 BI opval = 0; 4882 SET_H_INSN_PREFIXED_P (opval); 4883 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 4884 } 4885} 4886} 4887 4888 abuf->written = written; 4889#undef FLD 4890} 4891 NEXT (vpc); 4892 4893 CASE (sem, INSN_MOVEM_M_R) : /* movem [${Rs}${inc}],${Rd} */ 4894{ 4895 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4896 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4897#define FLD(f) abuf->fields.sfmt_movem_m_r.f 4898 int UNUSED written = 0; 4899 IADDR UNUSED pc = abuf->addr; 4900 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4901 4902{ 4903 SI tmp_addr; 4904 BI tmp_postinc; 4905 tmp_postinc = FLD (f_memmode); 4906 tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32))); 4907{ 4908 SI tmp_dummy; 4909 tmp_dummy = GET_H_GR (FLD (f_operand2)); 4910} 4911{ 4912if (GESI (FLD (f_operand2), 14)) { 4913{ 4914 SI tmp_tmp; 4915 tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr); 4916 { 4917 SI opval = tmp_tmp; 4918 SET_H_GR (((UINT) 14), opval); 4919 written |= (1 << 14); 4920 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 4921 } 4922 tmp_addr = ADDSI (tmp_addr, 4); 4923} 4924} 4925if (GESI (FLD (f_operand2), 13)) { 4926{ 4927 SI tmp_tmp; 4928 tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr); 4929 { 4930 SI opval = tmp_tmp; 4931 SET_H_GR (((UINT) 13), opval); 4932 written |= (1 << 13); 4933 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 4934 } 4935 tmp_addr = ADDSI (tmp_addr, 4); 4936} 4937} 4938if (GESI (FLD (f_operand2), 12)) { 4939{ 4940 SI tmp_tmp; 4941 tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr); 4942 { 4943 SI opval = tmp_tmp; 4944 SET_H_GR (((UINT) 12), opval); 4945 written |= (1 << 12); 4946 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 4947 } 4948 tmp_addr = ADDSI (tmp_addr, 4); 4949} 4950} 4951if (GESI (FLD (f_operand2), 11)) { 4952{ 4953 SI tmp_tmp; 4954 tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr); 4955 { 4956 SI opval = tmp_tmp; 4957 SET_H_GR (((UINT) 11), opval); 4958 written |= (1 << 11); 4959 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 4960 } 4961 tmp_addr = ADDSI (tmp_addr, 4); 4962} 4963} 4964if (GESI (FLD (f_operand2), 10)) { 4965{ 4966 SI tmp_tmp; 4967 tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr); 4968 { 4969 SI opval = tmp_tmp; 4970 SET_H_GR (((UINT) 10), opval); 4971 written |= (1 << 10); 4972 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 4973 } 4974 tmp_addr = ADDSI (tmp_addr, 4); 4975} 4976} 4977if (GESI (FLD (f_operand2), 9)) { 4978{ 4979 SI tmp_tmp; 4980 tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr); 4981 { 4982 SI opval = tmp_tmp; 4983 SET_H_GR (((UINT) 9), opval); 4984 written |= (1 << 22); 4985 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 4986 } 4987 tmp_addr = ADDSI (tmp_addr, 4); 4988} 4989} 4990if (GESI (FLD (f_operand2), 8)) { 4991{ 4992 SI tmp_tmp; 4993 tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr); 4994 { 4995 SI opval = tmp_tmp; 4996 SET_H_GR (((UINT) 8), opval); 4997 written |= (1 << 21); 4998 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 4999 } 5000 tmp_addr = ADDSI (tmp_addr, 4); 5001} 5002} 5003if (GESI (FLD (f_operand2), 7)) { 5004{ 5005 SI tmp_tmp; 5006 tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr); 5007 { 5008 SI opval = tmp_tmp; 5009 SET_H_GR (((UINT) 7), opval); 5010 written |= (1 << 20); 5011 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5012 } 5013 tmp_addr = ADDSI (tmp_addr, 4); 5014} 5015} 5016if (GESI (FLD (f_operand2), 6)) { 5017{ 5018 SI tmp_tmp; 5019 tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr); 5020 { 5021 SI opval = tmp_tmp; 5022 SET_H_GR (((UINT) 6), opval); 5023 written |= (1 << 19); 5024 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5025 } 5026 tmp_addr = ADDSI (tmp_addr, 4); 5027} 5028} 5029if (GESI (FLD (f_operand2), 5)) { 5030{ 5031 SI tmp_tmp; 5032 tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr); 5033 { 5034 SI opval = tmp_tmp; 5035 SET_H_GR (((UINT) 5), opval); 5036 written |= (1 << 18); 5037 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5038 } 5039 tmp_addr = ADDSI (tmp_addr, 4); 5040} 5041} 5042if (GESI (FLD (f_operand2), 4)) { 5043{ 5044 SI tmp_tmp; 5045 tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr); 5046 { 5047 SI opval = tmp_tmp; 5048 SET_H_GR (((UINT) 4), opval); 5049 written |= (1 << 17); 5050 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5051 } 5052 tmp_addr = ADDSI (tmp_addr, 4); 5053} 5054} 5055if (GESI (FLD (f_operand2), 3)) { 5056{ 5057 SI tmp_tmp; 5058 tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr); 5059 { 5060 SI opval = tmp_tmp; 5061 SET_H_GR (((UINT) 3), opval); 5062 written |= (1 << 16); 5063 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5064 } 5065 tmp_addr = ADDSI (tmp_addr, 4); 5066} 5067} 5068if (GESI (FLD (f_operand2), 2)) { 5069{ 5070 SI tmp_tmp; 5071 tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr); 5072 { 5073 SI opval = tmp_tmp; 5074 SET_H_GR (((UINT) 2), opval); 5075 written |= (1 << 15); 5076 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5077 } 5078 tmp_addr = ADDSI (tmp_addr, 4); 5079} 5080} 5081if (GESI (FLD (f_operand2), 1)) { 5082{ 5083 SI tmp_tmp; 5084 tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr); 5085 { 5086 SI opval = tmp_tmp; 5087 SET_H_GR (((UINT) 1), opval); 5088 written |= (1 << 9); 5089 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5090 } 5091 tmp_addr = ADDSI (tmp_addr, 4); 5092} 5093} 5094if (GESI (FLD (f_operand2), 0)) { 5095{ 5096 SI tmp_tmp; 5097 tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr); 5098 { 5099 SI opval = tmp_tmp; 5100 SET_H_GR (((UINT) 0), opval); 5101 written |= (1 << 8); 5102 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5103 } 5104 tmp_addr = ADDSI (tmp_addr, 4); 5105} 5106} 5107} 5108if (NEBI (tmp_postinc, 0)) { 5109 { 5110 SI opval = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (tmp_addr) : (CPU (h_prefixreg_pre_v32))); 5111 SET_H_GR (FLD (f_operand1), opval); 5112 written |= (1 << 7); 5113 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5114 } 5115} 5116{ 5117 { 5118 BI opval = 0; 5119 CPU (h_xbit) = opval; 5120 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 5121 } 5122 { 5123 BI opval = 0; 5124 SET_H_INSN_PREFIXED_P (opval); 5125 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 5126 } 5127} 5128} 5129 5130 abuf->written = written; 5131#undef FLD 5132} 5133 NEXT (vpc); 5134 5135 CASE (sem, INSN_MOVEM_M_PC) : /* movem [${Rs}${inc}],${Rd} */ 5136{ 5137 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5138 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 5139#define FLD(f) abuf->fields.sfmt_movem_m_r.f 5140 int UNUSED written = 0; 5141 IADDR UNUSED pc = abuf->addr; 5142 SEM_BRANCH_INIT 5143 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 5144 5145{ 5146 SI tmp_addr; 5147 BI tmp_postinc; 5148 tmp_postinc = FLD (f_memmode); 5149 tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32))); 5150{ 5151 { 5152 USI opval = GETMEMSI (current_cpu, pc, tmp_addr); 5153 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); 5154 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 5155 } 5156 tmp_addr = ADDSI (tmp_addr, 4); 5157{ 5158 SI tmp_tmp; 5159 tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr); 5160 { 5161 SI opval = tmp_tmp; 5162 SET_H_GR (((UINT) 14), opval); 5163 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5164 } 5165 tmp_addr = ADDSI (tmp_addr, 4); 5166} 5167{ 5168 SI tmp_tmp; 5169 tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr); 5170 { 5171 SI opval = tmp_tmp; 5172 SET_H_GR (((UINT) 13), opval); 5173 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5174 } 5175 tmp_addr = ADDSI (tmp_addr, 4); 5176} 5177{ 5178 SI tmp_tmp; 5179 tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr); 5180 { 5181 SI opval = tmp_tmp; 5182 SET_H_GR (((UINT) 12), opval); 5183 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5184 } 5185 tmp_addr = ADDSI (tmp_addr, 4); 5186} 5187{ 5188 SI tmp_tmp; 5189 tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr); 5190 { 5191 SI opval = tmp_tmp; 5192 SET_H_GR (((UINT) 11), opval); 5193 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5194 } 5195 tmp_addr = ADDSI (tmp_addr, 4); 5196} 5197{ 5198 SI tmp_tmp; 5199 tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr); 5200 { 5201 SI opval = tmp_tmp; 5202 SET_H_GR (((UINT) 10), opval); 5203 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5204 } 5205 tmp_addr = ADDSI (tmp_addr, 4); 5206} 5207{ 5208 SI tmp_tmp; 5209 tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr); 5210 { 5211 SI opval = tmp_tmp; 5212 SET_H_GR (((UINT) 9), opval); 5213 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5214 } 5215 tmp_addr = ADDSI (tmp_addr, 4); 5216} 5217{ 5218 SI tmp_tmp; 5219 tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr); 5220 { 5221 SI opval = tmp_tmp; 5222 SET_H_GR (((UINT) 8), opval); 5223 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5224 } 5225 tmp_addr = ADDSI (tmp_addr, 4); 5226} 5227{ 5228 SI tmp_tmp; 5229 tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr); 5230 { 5231 SI opval = tmp_tmp; 5232 SET_H_GR (((UINT) 7), opval); 5233 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5234 } 5235 tmp_addr = ADDSI (tmp_addr, 4); 5236} 5237{ 5238 SI tmp_tmp; 5239 tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr); 5240 { 5241 SI opval = tmp_tmp; 5242 SET_H_GR (((UINT) 6), opval); 5243 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5244 } 5245 tmp_addr = ADDSI (tmp_addr, 4); 5246} 5247{ 5248 SI tmp_tmp; 5249 tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr); 5250 { 5251 SI opval = tmp_tmp; 5252 SET_H_GR (((UINT) 5), opval); 5253 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5254 } 5255 tmp_addr = ADDSI (tmp_addr, 4); 5256} 5257{ 5258 SI tmp_tmp; 5259 tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr); 5260 { 5261 SI opval = tmp_tmp; 5262 SET_H_GR (((UINT) 4), opval); 5263 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5264 } 5265 tmp_addr = ADDSI (tmp_addr, 4); 5266} 5267{ 5268 SI tmp_tmp; 5269 tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr); 5270 { 5271 SI opval = tmp_tmp; 5272 SET_H_GR (((UINT) 3), opval); 5273 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5274 } 5275 tmp_addr = ADDSI (tmp_addr, 4); 5276} 5277{ 5278 SI tmp_tmp; 5279 tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr); 5280 { 5281 SI opval = tmp_tmp; 5282 SET_H_GR (((UINT) 2), opval); 5283 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5284 } 5285 tmp_addr = ADDSI (tmp_addr, 4); 5286} 5287{ 5288 SI tmp_tmp; 5289 tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr); 5290 { 5291 SI opval = tmp_tmp; 5292 SET_H_GR (((UINT) 1), opval); 5293 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5294 } 5295 tmp_addr = ADDSI (tmp_addr, 4); 5296} 5297{ 5298 SI tmp_tmp; 5299 tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr); 5300 { 5301 SI opval = tmp_tmp; 5302 SET_H_GR (((UINT) 0), opval); 5303 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5304 } 5305 tmp_addr = ADDSI (tmp_addr, 4); 5306} 5307} 5308if (NEBI (tmp_postinc, 0)) { 5309 { 5310 SI opval = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (tmp_addr) : (CPU (h_prefixreg_pre_v32))); 5311 SET_H_GR (FLD (f_operand1), opval); 5312 written |= (1 << 5); 5313 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5314 } 5315} 5316{ 5317 { 5318 BI opval = 0; 5319 CPU (h_xbit) = opval; 5320 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 5321 } 5322 { 5323 BI opval = 0; 5324 SET_H_INSN_PREFIXED_P (opval); 5325 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 5326 } 5327} 5328} 5329 5330 abuf->written = written; 5331 SEM_BRANCH_FINI (vpc); 5332#undef FLD 5333} 5334 NEXT (vpc); 5335 5336 CASE (sem, INSN_ADD_B_R) : /* add.b $Rs,$Rd */ 5337{ 5338 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5339 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 5340#define FLD(f) abuf->fields.sfmt_add_b_r.f 5341 int UNUSED written = 0; 5342 IADDR UNUSED pc = abuf->addr; 5343 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 5344 5345{ 5346 QI tmp_tmpopd; 5347 QI tmp_tmpops; 5348 BI tmp_carry; 5349 QI tmp_newval; 5350 tmp_tmpops = GET_H_GR (FLD (f_operand1)); 5351 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 5352 tmp_carry = CPU (h_cbit); 5353 tmp_newval = ADDCQI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 5354{ 5355 SI tmp_oldregval; 5356 tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2)); 5357 { 5358 SI opval = ORSI (ANDSI (tmp_newval, 255), ANDSI (tmp_oldregval, 0xffffff00)); 5359 SET_H_GR (FLD (f_operand2), opval); 5360 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5361 } 5362} 5363{ 5364 { 5365 BI opval = ORIF (ANDIF (LTQI (tmp_tmpops, 0), LTQI (tmp_tmpopd, 0)), ORIF (ANDIF (LTQI (tmp_tmpopd, 0), GEQI (tmp_newval, 0)), ANDIF (LTQI (tmp_tmpops, 0), GEQI (tmp_newval, 0)))); 5366 CPU (h_cbit) = opval; 5367 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 5368 } 5369 { 5370 BI opval = LTQI (tmp_newval, 0); 5371 CPU (h_nbit) = opval; 5372 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 5373 } 5374 { 5375 BI opval = ANDIF (EQQI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 5376 CPU (h_zbit) = opval; 5377 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 5378 } 5379 { 5380 BI opval = ORIF (ANDIF (ANDIF (LTQI (tmp_tmpops, 0), LTQI (tmp_tmpopd, 0)), GEQI (tmp_newval, 0)), ANDIF (ANDIF (GEQI (tmp_tmpops, 0), GEQI (tmp_tmpopd, 0)), LTQI (tmp_newval, 0))); 5381 CPU (h_vbit) = opval; 5382 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 5383 } 5384{ 5385 { 5386 BI opval = 0; 5387 CPU (h_xbit) = opval; 5388 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 5389 } 5390 { 5391 BI opval = 0; 5392 SET_H_INSN_PREFIXED_P (opval); 5393 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 5394 } 5395} 5396} 5397} 5398 5399#undef FLD 5400} 5401 NEXT (vpc); 5402 5403 CASE (sem, INSN_ADD_W_R) : /* add.w $Rs,$Rd */ 5404{ 5405 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5406 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 5407#define FLD(f) abuf->fields.sfmt_add_b_r.f 5408 int UNUSED written = 0; 5409 IADDR UNUSED pc = abuf->addr; 5410 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 5411 5412{ 5413 HI tmp_tmpopd; 5414 HI tmp_tmpops; 5415 BI tmp_carry; 5416 HI tmp_newval; 5417 tmp_tmpops = GET_H_GR (FLD (f_operand1)); 5418 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 5419 tmp_carry = CPU (h_cbit); 5420 tmp_newval = ADDCHI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 5421{ 5422 SI tmp_oldregval; 5423 tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2)); 5424 { 5425 SI opval = ORSI (ANDSI (tmp_newval, 65535), ANDSI (tmp_oldregval, 0xffff0000)); 5426 SET_H_GR (FLD (f_operand2), opval); 5427 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5428 } 5429} 5430{ 5431 { 5432 BI opval = ORIF (ANDIF (LTHI (tmp_tmpops, 0), LTHI (tmp_tmpopd, 0)), ORIF (ANDIF (LTHI (tmp_tmpopd, 0), GEHI (tmp_newval, 0)), ANDIF (LTHI (tmp_tmpops, 0), GEHI (tmp_newval, 0)))); 5433 CPU (h_cbit) = opval; 5434 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 5435 } 5436 { 5437 BI opval = LTHI (tmp_newval, 0); 5438 CPU (h_nbit) = opval; 5439 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 5440 } 5441 { 5442 BI opval = ANDIF (EQHI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 5443 CPU (h_zbit) = opval; 5444 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 5445 } 5446 { 5447 BI opval = ORIF (ANDIF (ANDIF (LTHI (tmp_tmpops, 0), LTHI (tmp_tmpopd, 0)), GEHI (tmp_newval, 0)), ANDIF (ANDIF (GEHI (tmp_tmpops, 0), GEHI (tmp_tmpopd, 0)), LTHI (tmp_newval, 0))); 5448 CPU (h_vbit) = opval; 5449 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 5450 } 5451{ 5452 { 5453 BI opval = 0; 5454 CPU (h_xbit) = opval; 5455 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 5456 } 5457 { 5458 BI opval = 0; 5459 SET_H_INSN_PREFIXED_P (opval); 5460 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 5461 } 5462} 5463} 5464} 5465 5466#undef FLD 5467} 5468 NEXT (vpc); 5469 5470 CASE (sem, INSN_ADD_D_R) : /* add.d $Rs,$Rd */ 5471{ 5472 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5473 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 5474#define FLD(f) abuf->fields.sfmt_add_b_r.f 5475 int UNUSED written = 0; 5476 IADDR UNUSED pc = abuf->addr; 5477 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 5478 5479{ 5480 SI tmp_tmpopd; 5481 SI tmp_tmpops; 5482 BI tmp_carry; 5483 SI tmp_newval; 5484 tmp_tmpops = GET_H_GR (FLD (f_operand1)); 5485 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 5486 tmp_carry = CPU (h_cbit); 5487 tmp_newval = ADDCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 5488 { 5489 SI opval = tmp_newval; 5490 SET_H_GR (FLD (f_operand2), opval); 5491 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5492 } 5493{ 5494 { 5495 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), ORIF (ANDIF (LTSI (tmp_tmpopd, 0), GESI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_newval, 0)))); 5496 CPU (h_cbit) = opval; 5497 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 5498 } 5499 { 5500 BI opval = LTSI (tmp_newval, 0); 5501 CPU (h_nbit) = opval; 5502 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 5503 } 5504 { 5505 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 5506 CPU (h_zbit) = opval; 5507 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 5508 } 5509 { 5510 BI opval = ORIF (ANDIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (GESI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 5511 CPU (h_vbit) = opval; 5512 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 5513 } 5514{ 5515 { 5516 BI opval = 0; 5517 CPU (h_xbit) = opval; 5518 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 5519 } 5520 { 5521 BI opval = 0; 5522 SET_H_INSN_PREFIXED_P (opval); 5523 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 5524 } 5525} 5526} 5527} 5528 5529#undef FLD 5530} 5531 NEXT (vpc); 5532 5533 CASE (sem, INSN_ADD_M_B_M) : /* add-m.b [${Rs}${inc}],${Rd} */ 5534{ 5535 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5536 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 5537#define FLD(f) abuf->fields.sfmt_add_m_b_m.f 5538 int UNUSED written = 0; 5539 IADDR UNUSED pc = abuf->addr; 5540 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 5541 5542{ 5543 QI tmp_tmpopd; 5544 QI tmp_tmpops; 5545 BI tmp_carry; 5546 QI tmp_newval; 5547 tmp_tmpops = ({ SI tmp_addr; 5548 QI tmp_tmp_mem; 5549 BI tmp_postinc; 5550 tmp_postinc = FLD (f_memmode); 5551; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32))); 5552; tmp_tmp_mem = GETMEMQI (current_cpu, pc, tmp_addr); 5553; if (NEBI (tmp_postinc, 0)) { 5554{ 5555if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 5556 tmp_addr = ADDSI (tmp_addr, 1); 5557} 5558 { 5559 SI opval = tmp_addr; 5560 SET_H_GR (FLD (f_operand1), opval); 5561 written |= (1 << 12); 5562 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5563 } 5564} 5565} 5566; tmp_tmp_mem; }); 5567 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 5568 tmp_carry = CPU (h_cbit); 5569 tmp_newval = ADDCQI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 5570{ 5571 SI tmp_oldregval; 5572 tmp_oldregval = GET_H_RAW_GR_PC (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2)))); 5573 { 5574 SI opval = ORSI (ANDSI (tmp_newval, 255), ANDSI (tmp_oldregval, 0xffffff00)); 5575 SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval); 5576 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5577 } 5578} 5579{ 5580 { 5581 BI opval = ORIF (ANDIF (LTQI (tmp_tmpops, 0), LTQI (tmp_tmpopd, 0)), ORIF (ANDIF (LTQI (tmp_tmpopd, 0), GEQI (tmp_newval, 0)), ANDIF (LTQI (tmp_tmpops, 0), GEQI (tmp_newval, 0)))); 5582 CPU (h_cbit) = opval; 5583 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 5584 } 5585 { 5586 BI opval = LTQI (tmp_newval, 0); 5587 CPU (h_nbit) = opval; 5588 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 5589 } 5590 { 5591 BI opval = ANDIF (EQQI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 5592 CPU (h_zbit) = opval; 5593 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 5594 } 5595 { 5596 BI opval = ORIF (ANDIF (ANDIF (LTQI (tmp_tmpops, 0), LTQI (tmp_tmpopd, 0)), GEQI (tmp_newval, 0)), ANDIF (ANDIF (GEQI (tmp_tmpops, 0), GEQI (tmp_tmpopd, 0)), LTQI (tmp_newval, 0))); 5597 CPU (h_vbit) = opval; 5598 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 5599 } 5600{ 5601 { 5602 BI opval = 0; 5603 CPU (h_xbit) = opval; 5604 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 5605 } 5606 { 5607 BI opval = 0; 5608 SET_H_INSN_PREFIXED_P (opval); 5609 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 5610 } 5611} 5612} 5613} 5614 5615 abuf->written = written; 5616#undef FLD 5617} 5618 NEXT (vpc); 5619 5620 CASE (sem, INSN_ADD_M_W_M) : /* add-m.w [${Rs}${inc}],${Rd} */ 5621{ 5622 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5623 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 5624#define FLD(f) abuf->fields.sfmt_add_m_b_m.f 5625 int UNUSED written = 0; 5626 IADDR UNUSED pc = abuf->addr; 5627 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 5628 5629{ 5630 HI tmp_tmpopd; 5631 HI tmp_tmpops; 5632 BI tmp_carry; 5633 HI tmp_newval; 5634 tmp_tmpops = ({ SI tmp_addr; 5635 HI tmp_tmp_mem; 5636 BI tmp_postinc; 5637 tmp_postinc = FLD (f_memmode); 5638; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32))); 5639; tmp_tmp_mem = GETMEMHI (current_cpu, pc, tmp_addr); 5640; if (NEBI (tmp_postinc, 0)) { 5641{ 5642if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 5643 tmp_addr = ADDSI (tmp_addr, 2); 5644} 5645 { 5646 SI opval = tmp_addr; 5647 SET_H_GR (FLD (f_operand1), opval); 5648 written |= (1 << 12); 5649 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5650 } 5651} 5652} 5653; tmp_tmp_mem; }); 5654 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 5655 tmp_carry = CPU (h_cbit); 5656 tmp_newval = ADDCHI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 5657{ 5658 SI tmp_oldregval; 5659 tmp_oldregval = GET_H_RAW_GR_PC (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2)))); 5660 { 5661 SI opval = ORSI (ANDSI (tmp_newval, 65535), ANDSI (tmp_oldregval, 0xffff0000)); 5662 SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval); 5663 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5664 } 5665} 5666{ 5667 { 5668 BI opval = ORIF (ANDIF (LTHI (tmp_tmpops, 0), LTHI (tmp_tmpopd, 0)), ORIF (ANDIF (LTHI (tmp_tmpopd, 0), GEHI (tmp_newval, 0)), ANDIF (LTHI (tmp_tmpops, 0), GEHI (tmp_newval, 0)))); 5669 CPU (h_cbit) = opval; 5670 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 5671 } 5672 { 5673 BI opval = LTHI (tmp_newval, 0); 5674 CPU (h_nbit) = opval; 5675 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 5676 } 5677 { 5678 BI opval = ANDIF (EQHI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 5679 CPU (h_zbit) = opval; 5680 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 5681 } 5682 { 5683 BI opval = ORIF (ANDIF (ANDIF (LTHI (tmp_tmpops, 0), LTHI (tmp_tmpopd, 0)), GEHI (tmp_newval, 0)), ANDIF (ANDIF (GEHI (tmp_tmpops, 0), GEHI (tmp_tmpopd, 0)), LTHI (tmp_newval, 0))); 5684 CPU (h_vbit) = opval; 5685 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 5686 } 5687{ 5688 { 5689 BI opval = 0; 5690 CPU (h_xbit) = opval; 5691 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 5692 } 5693 { 5694 BI opval = 0; 5695 SET_H_INSN_PREFIXED_P (opval); 5696 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 5697 } 5698} 5699} 5700} 5701 5702 abuf->written = written; 5703#undef FLD 5704} 5705 NEXT (vpc); 5706 5707 CASE (sem, INSN_ADD_M_D_M) : /* add-m.d [${Rs}${inc}],${Rd} */ 5708{ 5709 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5710 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 5711#define FLD(f) abuf->fields.sfmt_add_m_b_m.f 5712 int UNUSED written = 0; 5713 IADDR UNUSED pc = abuf->addr; 5714 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 5715 5716{ 5717 SI tmp_tmpopd; 5718 SI tmp_tmpops; 5719 BI tmp_carry; 5720 SI tmp_newval; 5721 tmp_tmpops = ({ SI tmp_addr; 5722 SI tmp_tmp_mem; 5723 BI tmp_postinc; 5724 tmp_postinc = FLD (f_memmode); 5725; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32))); 5726; tmp_tmp_mem = GETMEMSI (current_cpu, pc, tmp_addr); 5727; if (NEBI (tmp_postinc, 0)) { 5728{ 5729if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 5730 tmp_addr = ADDSI (tmp_addr, 4); 5731} 5732 { 5733 SI opval = tmp_addr; 5734 SET_H_GR (FLD (f_operand1), opval); 5735 written |= (1 << 11); 5736 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5737 } 5738} 5739} 5740; tmp_tmp_mem; }); 5741 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 5742 tmp_carry = CPU (h_cbit); 5743 tmp_newval = ADDCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 5744 { 5745 SI opval = tmp_newval; 5746 SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval); 5747 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5748 } 5749{ 5750 { 5751 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), ORIF (ANDIF (LTSI (tmp_tmpopd, 0), GESI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_newval, 0)))); 5752 CPU (h_cbit) = opval; 5753 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 5754 } 5755 { 5756 BI opval = LTSI (tmp_newval, 0); 5757 CPU (h_nbit) = opval; 5758 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 5759 } 5760 { 5761 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 5762 CPU (h_zbit) = opval; 5763 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 5764 } 5765 { 5766 BI opval = ORIF (ANDIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (GESI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 5767 CPU (h_vbit) = opval; 5768 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 5769 } 5770{ 5771 { 5772 BI opval = 0; 5773 CPU (h_xbit) = opval; 5774 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 5775 } 5776 { 5777 BI opval = 0; 5778 SET_H_INSN_PREFIXED_P (opval); 5779 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 5780 } 5781} 5782} 5783} 5784 5785 abuf->written = written; 5786#undef FLD 5787} 5788 NEXT (vpc); 5789 5790 CASE (sem, INSN_ADDCBR) : /* add.b ${sconst8}],${Rd} */ 5791{ 5792 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5793 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 5794#define FLD(f) abuf->fields.sfmt_addcbr.f 5795 int UNUSED written = 0; 5796 IADDR UNUSED pc = abuf->addr; 5797 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 5798 5799{ 5800 QI tmp_tmpopd; 5801 QI tmp_tmpops; 5802 BI tmp_carry; 5803 QI tmp_newval; 5804 tmp_tmpops = FLD (f_indir_pc__byte); 5805 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 5806 tmp_carry = CPU (h_cbit); 5807 tmp_newval = ADDCQI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 5808{ 5809 SI tmp_oldregval; 5810 tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2)); 5811 { 5812 SI opval = ORSI (ANDSI (tmp_newval, 255), ANDSI (tmp_oldregval, 0xffffff00)); 5813 SET_H_GR (FLD (f_operand2), opval); 5814 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5815 } 5816} 5817{ 5818 { 5819 BI opval = ORIF (ANDIF (LTQI (tmp_tmpops, 0), LTQI (tmp_tmpopd, 0)), ORIF (ANDIF (LTQI (tmp_tmpopd, 0), GEQI (tmp_newval, 0)), ANDIF (LTQI (tmp_tmpops, 0), GEQI (tmp_newval, 0)))); 5820 CPU (h_cbit) = opval; 5821 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 5822 } 5823 { 5824 BI opval = LTQI (tmp_newval, 0); 5825 CPU (h_nbit) = opval; 5826 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 5827 } 5828 { 5829 BI opval = ANDIF (EQQI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 5830 CPU (h_zbit) = opval; 5831 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 5832 } 5833 { 5834 BI opval = ORIF (ANDIF (ANDIF (LTQI (tmp_tmpops, 0), LTQI (tmp_tmpopd, 0)), GEQI (tmp_newval, 0)), ANDIF (ANDIF (GEQI (tmp_tmpops, 0), GEQI (tmp_tmpopd, 0)), LTQI (tmp_newval, 0))); 5835 CPU (h_vbit) = opval; 5836 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 5837 } 5838{ 5839 { 5840 BI opval = 0; 5841 CPU (h_xbit) = opval; 5842 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 5843 } 5844 { 5845 BI opval = 0; 5846 SET_H_INSN_PREFIXED_P (opval); 5847 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 5848 } 5849} 5850} 5851} 5852 5853#undef FLD 5854} 5855 NEXT (vpc); 5856 5857 CASE (sem, INSN_ADDCWR) : /* add.w ${sconst16}],${Rd} */ 5858{ 5859 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5860 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 5861#define FLD(f) abuf->fields.sfmt_addcwr.f 5862 int UNUSED written = 0; 5863 IADDR UNUSED pc = abuf->addr; 5864 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 5865 5866{ 5867 HI tmp_tmpopd; 5868 HI tmp_tmpops; 5869 BI tmp_carry; 5870 HI tmp_newval; 5871 tmp_tmpops = FLD (f_indir_pc__word); 5872 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 5873 tmp_carry = CPU (h_cbit); 5874 tmp_newval = ADDCHI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 5875{ 5876 SI tmp_oldregval; 5877 tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2)); 5878 { 5879 SI opval = ORSI (ANDSI (tmp_newval, 65535), ANDSI (tmp_oldregval, 0xffff0000)); 5880 SET_H_GR (FLD (f_operand2), opval); 5881 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5882 } 5883} 5884{ 5885 { 5886 BI opval = ORIF (ANDIF (LTHI (tmp_tmpops, 0), LTHI (tmp_tmpopd, 0)), ORIF (ANDIF (LTHI (tmp_tmpopd, 0), GEHI (tmp_newval, 0)), ANDIF (LTHI (tmp_tmpops, 0), GEHI (tmp_newval, 0)))); 5887 CPU (h_cbit) = opval; 5888 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 5889 } 5890 { 5891 BI opval = LTHI (tmp_newval, 0); 5892 CPU (h_nbit) = opval; 5893 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 5894 } 5895 { 5896 BI opval = ANDIF (EQHI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 5897 CPU (h_zbit) = opval; 5898 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 5899 } 5900 { 5901 BI opval = ORIF (ANDIF (ANDIF (LTHI (tmp_tmpops, 0), LTHI (tmp_tmpopd, 0)), GEHI (tmp_newval, 0)), ANDIF (ANDIF (GEHI (tmp_tmpops, 0), GEHI (tmp_tmpopd, 0)), LTHI (tmp_newval, 0))); 5902 CPU (h_vbit) = opval; 5903 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 5904 } 5905{ 5906 { 5907 BI opval = 0; 5908 CPU (h_xbit) = opval; 5909 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 5910 } 5911 { 5912 BI opval = 0; 5913 SET_H_INSN_PREFIXED_P (opval); 5914 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 5915 } 5916} 5917} 5918} 5919 5920#undef FLD 5921} 5922 NEXT (vpc); 5923 5924 CASE (sem, INSN_ADDCDR) : /* add.d ${const32}],${Rd} */ 5925{ 5926 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5927 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 5928#define FLD(f) abuf->fields.sfmt_addcdr.f 5929 int UNUSED written = 0; 5930 IADDR UNUSED pc = abuf->addr; 5931 vpc = SEM_NEXT_VPC (sem_arg, pc, 6); 5932 5933{ 5934 SI tmp_tmpopd; 5935 SI tmp_tmpops; 5936 BI tmp_carry; 5937 SI tmp_newval; 5938 tmp_tmpops = FLD (f_indir_pc__dword); 5939 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 5940 tmp_carry = CPU (h_cbit); 5941 tmp_newval = ADDCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 5942 { 5943 SI opval = tmp_newval; 5944 SET_H_GR (FLD (f_operand2), opval); 5945 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5946 } 5947{ 5948 { 5949 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), ORIF (ANDIF (LTSI (tmp_tmpopd, 0), GESI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_newval, 0)))); 5950 CPU (h_cbit) = opval; 5951 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 5952 } 5953 { 5954 BI opval = LTSI (tmp_newval, 0); 5955 CPU (h_nbit) = opval; 5956 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 5957 } 5958 { 5959 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 5960 CPU (h_zbit) = opval; 5961 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 5962 } 5963 { 5964 BI opval = ORIF (ANDIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (GESI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 5965 CPU (h_vbit) = opval; 5966 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 5967 } 5968{ 5969 { 5970 BI opval = 0; 5971 CPU (h_xbit) = opval; 5972 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 5973 } 5974 { 5975 BI opval = 0; 5976 SET_H_INSN_PREFIXED_P (opval); 5977 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 5978 } 5979} 5980} 5981} 5982 5983#undef FLD 5984} 5985 NEXT (vpc); 5986 5987 CASE (sem, INSN_ADDCPC) : /* add.d ${sconst32},PC */ 5988{ 5989 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5990 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 5991#define FLD(f) abuf->fields.sfmt_move_c_sprv10_p9.f 5992 int UNUSED written = 0; 5993 IADDR UNUSED pc = abuf->addr; 5994 SEM_BRANCH_INIT 5995 vpc = SEM_NEXT_VPC (sem_arg, pc, 6); 5996 5997{ 5998 SI tmp_newpc; 5999 SI tmp_oldpc; 6000 SI tmp_offs; 6001 tmp_offs = FLD (f_indir_pc__dword); 6002 tmp_oldpc = ADDSI (pc, 6); 6003 tmp_newpc = ADDSI (tmp_oldpc, tmp_offs); 6004 { 6005 USI opval = tmp_newpc; 6006 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); 6007 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 6008 } 6009{ 6010 { 6011 BI opval = ORIF (ANDIF (LTSI (tmp_offs, 0), LTSI (tmp_oldpc, 0)), ORIF (ANDIF (LTSI (tmp_oldpc, 0), GESI (tmp_newpc, 0)), ANDIF (LTSI (tmp_offs, 0), GESI (tmp_newpc, 0)))); 6012 CPU (h_cbit) = opval; 6013 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 6014 } 6015 { 6016 BI opval = LTSI (tmp_newpc, 0); 6017 CPU (h_nbit) = opval; 6018 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 6019 } 6020 { 6021 BI opval = ANDIF (EQSI (tmp_newpc, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 6022 CPU (h_zbit) = opval; 6023 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 6024 } 6025 { 6026 BI opval = ORIF (ANDIF (ANDIF (LTSI (tmp_offs, 0), LTSI (tmp_oldpc, 0)), GESI (tmp_newpc, 0)), ANDIF (ANDIF (GESI (tmp_offs, 0), GESI (tmp_oldpc, 0)), LTSI (tmp_newpc, 0))); 6027 CPU (h_vbit) = opval; 6028 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 6029 } 6030{ 6031 { 6032 BI opval = 0; 6033 CPU (h_xbit) = opval; 6034 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 6035 } 6036 { 6037 BI opval = 0; 6038 SET_H_INSN_PREFIXED_P (opval); 6039 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 6040 } 6041} 6042} 6043} 6044 6045 SEM_BRANCH_FINI (vpc); 6046#undef FLD 6047} 6048 NEXT (vpc); 6049 6050 CASE (sem, INSN_ADDS_B_R) : /* adds.b $Rs,$Rd */ 6051{ 6052 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6053 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 6054#define FLD(f) abuf->fields.sfmt_add_b_r.f 6055 int UNUSED written = 0; 6056 IADDR UNUSED pc = abuf->addr; 6057 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 6058 6059{ 6060 SI tmp_tmpopd; 6061 SI tmp_tmpops; 6062 BI tmp_carry; 6063 SI tmp_newval; 6064 tmp_tmpops = EXTQISI (TRUNCSIQI (GET_H_GR (FLD (f_operand1)))); 6065 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 6066 tmp_carry = CPU (h_cbit); 6067 tmp_newval = ADDCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 6068 { 6069 SI opval = tmp_newval; 6070 SET_H_GR (FLD (f_operand2), opval); 6071 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 6072 } 6073{ 6074 { 6075 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), ORIF (ANDIF (LTSI (tmp_tmpopd, 0), GESI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_newval, 0)))); 6076 CPU (h_cbit) = opval; 6077 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 6078 } 6079 { 6080 BI opval = LTSI (tmp_newval, 0); 6081 CPU (h_nbit) = opval; 6082 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 6083 } 6084 { 6085 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 6086 CPU (h_zbit) = opval; 6087 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 6088 } 6089 { 6090 BI opval = ORIF (ANDIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (GESI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 6091 CPU (h_vbit) = opval; 6092 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 6093 } 6094{ 6095 { 6096 BI opval = 0; 6097 CPU (h_xbit) = opval; 6098 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 6099 } 6100 { 6101 BI opval = 0; 6102 SET_H_INSN_PREFIXED_P (opval); 6103 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 6104 } 6105} 6106} 6107} 6108 6109#undef FLD 6110} 6111 NEXT (vpc); 6112 6113 CASE (sem, INSN_ADDS_W_R) : /* adds.w $Rs,$Rd */ 6114{ 6115 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6116 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 6117#define FLD(f) abuf->fields.sfmt_add_b_r.f 6118 int UNUSED written = 0; 6119 IADDR UNUSED pc = abuf->addr; 6120 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 6121 6122{ 6123 SI tmp_tmpopd; 6124 SI tmp_tmpops; 6125 BI tmp_carry; 6126 SI tmp_newval; 6127 tmp_tmpops = EXTHISI (TRUNCSIHI (GET_H_GR (FLD (f_operand1)))); 6128 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 6129 tmp_carry = CPU (h_cbit); 6130 tmp_newval = ADDCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 6131 { 6132 SI opval = tmp_newval; 6133 SET_H_GR (FLD (f_operand2), opval); 6134 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 6135 } 6136{ 6137 { 6138 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), ORIF (ANDIF (LTSI (tmp_tmpopd, 0), GESI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_newval, 0)))); 6139 CPU (h_cbit) = opval; 6140 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 6141 } 6142 { 6143 BI opval = LTSI (tmp_newval, 0); 6144 CPU (h_nbit) = opval; 6145 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 6146 } 6147 { 6148 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 6149 CPU (h_zbit) = opval; 6150 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 6151 } 6152 { 6153 BI opval = ORIF (ANDIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (GESI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 6154 CPU (h_vbit) = opval; 6155 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 6156 } 6157{ 6158 { 6159 BI opval = 0; 6160 CPU (h_xbit) = opval; 6161 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 6162 } 6163 { 6164 BI opval = 0; 6165 SET_H_INSN_PREFIXED_P (opval); 6166 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 6167 } 6168} 6169} 6170} 6171 6172#undef FLD 6173} 6174 NEXT (vpc); 6175 6176 CASE (sem, INSN_ADDS_M_B_M) : /* adds-m.b [${Rs}${inc}],$Rd */ 6177{ 6178 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6179 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 6180#define FLD(f) abuf->fields.sfmt_add_m_b_m.f 6181 int UNUSED written = 0; 6182 IADDR UNUSED pc = abuf->addr; 6183 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 6184 6185{ 6186 SI tmp_tmpopd; 6187 SI tmp_tmpops; 6188 BI tmp_carry; 6189 SI tmp_newval; 6190 tmp_tmpops = EXTQISI (({ SI tmp_addr; 6191 QI tmp_tmp_mem; 6192 BI tmp_postinc; 6193 tmp_postinc = FLD (f_memmode); 6194; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32))); 6195; tmp_tmp_mem = GETMEMQI (current_cpu, pc, tmp_addr); 6196; if (NEBI (tmp_postinc, 0)) { 6197{ 6198if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 6199 tmp_addr = ADDSI (tmp_addr, 1); 6200} 6201 { 6202 SI opval = tmp_addr; 6203 SET_H_GR (FLD (f_operand1), opval); 6204 written |= (1 << 11); 6205 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 6206 } 6207} 6208} 6209; tmp_tmp_mem; })); 6210 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 6211 tmp_carry = CPU (h_cbit); 6212 tmp_newval = ADDCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 6213 { 6214 SI opval = tmp_newval; 6215 SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval); 6216 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 6217 } 6218{ 6219 { 6220 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), ORIF (ANDIF (LTSI (tmp_tmpopd, 0), GESI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_newval, 0)))); 6221 CPU (h_cbit) = opval; 6222 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 6223 } 6224 { 6225 BI opval = LTSI (tmp_newval, 0); 6226 CPU (h_nbit) = opval; 6227 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 6228 } 6229 { 6230 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 6231 CPU (h_zbit) = opval; 6232 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 6233 } 6234 { 6235 BI opval = ORIF (ANDIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (GESI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 6236 CPU (h_vbit) = opval; 6237 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 6238 } 6239{ 6240 { 6241 BI opval = 0; 6242 CPU (h_xbit) = opval; 6243 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 6244 } 6245 { 6246 BI opval = 0; 6247 SET_H_INSN_PREFIXED_P (opval); 6248 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 6249 } 6250} 6251} 6252} 6253 6254 abuf->written = written; 6255#undef FLD 6256} 6257 NEXT (vpc); 6258 6259 CASE (sem, INSN_ADDS_M_W_M) : /* adds-m.w [${Rs}${inc}],$Rd */ 6260{ 6261 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6262 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 6263#define FLD(f) abuf->fields.sfmt_add_m_b_m.f 6264 int UNUSED written = 0; 6265 IADDR UNUSED pc = abuf->addr; 6266 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 6267 6268{ 6269 SI tmp_tmpopd; 6270 SI tmp_tmpops; 6271 BI tmp_carry; 6272 SI tmp_newval; 6273 tmp_tmpops = EXTHISI (({ SI tmp_addr; 6274 HI tmp_tmp_mem; 6275 BI tmp_postinc; 6276 tmp_postinc = FLD (f_memmode); 6277; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32))); 6278; tmp_tmp_mem = GETMEMHI (current_cpu, pc, tmp_addr); 6279; if (NEBI (tmp_postinc, 0)) { 6280{ 6281if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 6282 tmp_addr = ADDSI (tmp_addr, 2); 6283} 6284 { 6285 SI opval = tmp_addr; 6286 SET_H_GR (FLD (f_operand1), opval); 6287 written |= (1 << 11); 6288 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 6289 } 6290} 6291} 6292; tmp_tmp_mem; })); 6293 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 6294 tmp_carry = CPU (h_cbit); 6295 tmp_newval = ADDCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 6296 { 6297 SI opval = tmp_newval; 6298 SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval); 6299 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 6300 } 6301{ 6302 { 6303 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), ORIF (ANDIF (LTSI (tmp_tmpopd, 0), GESI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_newval, 0)))); 6304 CPU (h_cbit) = opval; 6305 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 6306 } 6307 { 6308 BI opval = LTSI (tmp_newval, 0); 6309 CPU (h_nbit) = opval; 6310 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 6311 } 6312 { 6313 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 6314 CPU (h_zbit) = opval; 6315 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 6316 } 6317 { 6318 BI opval = ORIF (ANDIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (GESI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 6319 CPU (h_vbit) = opval; 6320 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 6321 } 6322{ 6323 { 6324 BI opval = 0; 6325 CPU (h_xbit) = opval; 6326 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 6327 } 6328 { 6329 BI opval = 0; 6330 SET_H_INSN_PREFIXED_P (opval); 6331 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 6332 } 6333} 6334} 6335} 6336 6337 abuf->written = written; 6338#undef FLD 6339} 6340 NEXT (vpc); 6341 6342 CASE (sem, INSN_ADDSCBR) : /* [${Rs}${inc}],$Rd */ 6343{ 6344 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6345 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 6346#define FLD(f) abuf->fields.sfmt_addcbr.f 6347 int UNUSED written = 0; 6348 IADDR UNUSED pc = abuf->addr; 6349 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 6350 6351{ 6352 SI tmp_tmpopd; 6353 SI tmp_tmpops; 6354 BI tmp_carry; 6355 SI tmp_newval; 6356 tmp_tmpops = EXTQISI (TRUNCSIQI (FLD (f_indir_pc__byte))); 6357 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 6358 tmp_carry = CPU (h_cbit); 6359 tmp_newval = ADDCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 6360 { 6361 SI opval = tmp_newval; 6362 SET_H_GR (FLD (f_operand2), opval); 6363 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 6364 } 6365{ 6366 { 6367 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), ORIF (ANDIF (LTSI (tmp_tmpopd, 0), GESI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_newval, 0)))); 6368 CPU (h_cbit) = opval; 6369 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 6370 } 6371 { 6372 BI opval = LTSI (tmp_newval, 0); 6373 CPU (h_nbit) = opval; 6374 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 6375 } 6376 { 6377 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 6378 CPU (h_zbit) = opval; 6379 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 6380 } 6381 { 6382 BI opval = ORIF (ANDIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (GESI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 6383 CPU (h_vbit) = opval; 6384 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 6385 } 6386{ 6387 { 6388 BI opval = 0; 6389 CPU (h_xbit) = opval; 6390 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 6391 } 6392 { 6393 BI opval = 0; 6394 SET_H_INSN_PREFIXED_P (opval); 6395 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 6396 } 6397} 6398} 6399} 6400 6401#undef FLD 6402} 6403 NEXT (vpc); 6404 6405 CASE (sem, INSN_ADDSCWR) : /* [${Rs}${inc}],$Rd */ 6406{ 6407 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6408 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 6409#define FLD(f) abuf->fields.sfmt_addcwr.f 6410 int UNUSED written = 0; 6411 IADDR UNUSED pc = abuf->addr; 6412 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 6413 6414{ 6415 SI tmp_tmpopd; 6416 SI tmp_tmpops; 6417 BI tmp_carry; 6418 SI tmp_newval; 6419 tmp_tmpops = EXTHISI (TRUNCSIHI (FLD (f_indir_pc__word))); 6420 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 6421 tmp_carry = CPU (h_cbit); 6422 tmp_newval = ADDCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 6423 { 6424 SI opval = tmp_newval; 6425 SET_H_GR (FLD (f_operand2), opval); 6426 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 6427 } 6428{ 6429 { 6430 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), ORIF (ANDIF (LTSI (tmp_tmpopd, 0), GESI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_newval, 0)))); 6431 CPU (h_cbit) = opval; 6432 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 6433 } 6434 { 6435 BI opval = LTSI (tmp_newval, 0); 6436 CPU (h_nbit) = opval; 6437 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 6438 } 6439 { 6440 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 6441 CPU (h_zbit) = opval; 6442 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 6443 } 6444 { 6445 BI opval = ORIF (ANDIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (GESI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 6446 CPU (h_vbit) = opval; 6447 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 6448 } 6449{ 6450 { 6451 BI opval = 0; 6452 CPU (h_xbit) = opval; 6453 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 6454 } 6455 { 6456 BI opval = 0; 6457 SET_H_INSN_PREFIXED_P (opval); 6458 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 6459 } 6460} 6461} 6462} 6463 6464#undef FLD 6465} 6466 NEXT (vpc); 6467 6468 CASE (sem, INSN_ADDSPCPC) : /* adds.w [PC],PC */ 6469{ 6470 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6471 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 6472#define FLD(f) abuf->fields.fmt_empty.f 6473 int UNUSED written = 0; 6474 IADDR UNUSED pc = abuf->addr; 6475 SEM_BRANCH_INIT 6476 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 6477 6478{ 6479 SI tmp_newpc; 6480 SI tmp_oldpc; 6481 HI tmp_offs; 6482if (NOTBI (GET_H_INSN_PREFIXED_P ())) { 6483cgen_rtx_error (current_cpu, "Unexpected adds.w [PC],PC without prefix"); 6484} 6485 tmp_offs = GETMEMHI (current_cpu, pc, CPU (h_prefixreg_pre_v32)); 6486 tmp_oldpc = ADDSI (pc, 2); 6487 tmp_newpc = ADDSI (tmp_oldpc, tmp_offs); 6488 { 6489 USI opval = tmp_newpc; 6490 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); 6491 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 6492 } 6493{ 6494 { 6495 BI opval = ORIF (ANDIF (LTSI (EXTHISI (tmp_offs), 0), LTSI (tmp_oldpc, 0)), ORIF (ANDIF (LTSI (tmp_oldpc, 0), GESI (tmp_newpc, 0)), ANDIF (LTSI (EXTHISI (tmp_offs), 0), GESI (tmp_newpc, 0)))); 6496 CPU (h_cbit) = opval; 6497 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 6498 } 6499 { 6500 BI opval = LTSI (tmp_newpc, 0); 6501 CPU (h_nbit) = opval; 6502 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 6503 } 6504 { 6505 BI opval = ANDIF (EQSI (tmp_newpc, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 6506 CPU (h_zbit) = opval; 6507 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 6508 } 6509 { 6510 BI opval = ORIF (ANDIF (ANDIF (LTSI (EXTHISI (tmp_offs), 0), LTSI (tmp_oldpc, 0)), GESI (tmp_newpc, 0)), ANDIF (ANDIF (GESI (EXTHISI (tmp_offs), 0), GESI (tmp_oldpc, 0)), LTSI (tmp_newpc, 0))); 6511 CPU (h_vbit) = opval; 6512 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 6513 } 6514{ 6515 { 6516 BI opval = 0; 6517 CPU (h_xbit) = opval; 6518 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 6519 } 6520 { 6521 BI opval = 0; 6522 SET_H_INSN_PREFIXED_P (opval); 6523 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 6524 } 6525} 6526} 6527} 6528 6529 SEM_BRANCH_FINI (vpc); 6530#undef FLD 6531} 6532 NEXT (vpc); 6533 6534 CASE (sem, INSN_ADDU_B_R) : /* addu.b $Rs,$Rd */ 6535{ 6536 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6537 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 6538#define FLD(f) abuf->fields.sfmt_add_b_r.f 6539 int UNUSED written = 0; 6540 IADDR UNUSED pc = abuf->addr; 6541 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 6542 6543{ 6544 SI tmp_tmpopd; 6545 SI tmp_tmpops; 6546 BI tmp_carry; 6547 SI tmp_newval; 6548 tmp_tmpops = ZEXTQISI (TRUNCSIQI (GET_H_GR (FLD (f_operand1)))); 6549 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 6550 tmp_carry = CPU (h_cbit); 6551 tmp_newval = ADDCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 6552 { 6553 SI opval = tmp_newval; 6554 SET_H_GR (FLD (f_operand2), opval); 6555 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 6556 } 6557{ 6558 { 6559 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), ORIF (ANDIF (LTSI (tmp_tmpopd, 0), GESI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_newval, 0)))); 6560 CPU (h_cbit) = opval; 6561 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 6562 } 6563 { 6564 BI opval = LTSI (tmp_newval, 0); 6565 CPU (h_nbit) = opval; 6566 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 6567 } 6568 { 6569 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 6570 CPU (h_zbit) = opval; 6571 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 6572 } 6573 { 6574 BI opval = ORIF (ANDIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (GESI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 6575 CPU (h_vbit) = opval; 6576 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 6577 } 6578{ 6579 { 6580 BI opval = 0; 6581 CPU (h_xbit) = opval; 6582 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 6583 } 6584 { 6585 BI opval = 0; 6586 SET_H_INSN_PREFIXED_P (opval); 6587 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 6588 } 6589} 6590} 6591} 6592 6593#undef FLD 6594} 6595 NEXT (vpc); 6596 6597 CASE (sem, INSN_ADDU_W_R) : /* addu.w $Rs,$Rd */ 6598{ 6599 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6600 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 6601#define FLD(f) abuf->fields.sfmt_add_b_r.f 6602 int UNUSED written = 0; 6603 IADDR UNUSED pc = abuf->addr; 6604 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 6605 6606{ 6607 SI tmp_tmpopd; 6608 SI tmp_tmpops; 6609 BI tmp_carry; 6610 SI tmp_newval; 6611 tmp_tmpops = ZEXTHISI (TRUNCSIHI (GET_H_GR (FLD (f_operand1)))); 6612 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 6613 tmp_carry = CPU (h_cbit); 6614 tmp_newval = ADDCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 6615 { 6616 SI opval = tmp_newval; 6617 SET_H_GR (FLD (f_operand2), opval); 6618 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 6619 } 6620{ 6621 { 6622 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), ORIF (ANDIF (LTSI (tmp_tmpopd, 0), GESI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_newval, 0)))); 6623 CPU (h_cbit) = opval; 6624 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 6625 } 6626 { 6627 BI opval = LTSI (tmp_newval, 0); 6628 CPU (h_nbit) = opval; 6629 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 6630 } 6631 { 6632 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 6633 CPU (h_zbit) = opval; 6634 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 6635 } 6636 { 6637 BI opval = ORIF (ANDIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (GESI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 6638 CPU (h_vbit) = opval; 6639 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 6640 } 6641{ 6642 { 6643 BI opval = 0; 6644 CPU (h_xbit) = opval; 6645 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 6646 } 6647 { 6648 BI opval = 0; 6649 SET_H_INSN_PREFIXED_P (opval); 6650 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 6651 } 6652} 6653} 6654} 6655 6656#undef FLD 6657} 6658 NEXT (vpc); 6659 6660 CASE (sem, INSN_ADDU_M_B_M) : /* addu-m.b [${Rs}${inc}],$Rd */ 6661{ 6662 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6663 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 6664#define FLD(f) abuf->fields.sfmt_add_m_b_m.f 6665 int UNUSED written = 0; 6666 IADDR UNUSED pc = abuf->addr; 6667 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 6668 6669{ 6670 SI tmp_tmpopd; 6671 SI tmp_tmpops; 6672 BI tmp_carry; 6673 SI tmp_newval; 6674 tmp_tmpops = ZEXTQISI (({ SI tmp_addr; 6675 QI tmp_tmp_mem; 6676 BI tmp_postinc; 6677 tmp_postinc = FLD (f_memmode); 6678; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32))); 6679; tmp_tmp_mem = GETMEMQI (current_cpu, pc, tmp_addr); 6680; if (NEBI (tmp_postinc, 0)) { 6681{ 6682if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 6683 tmp_addr = ADDSI (tmp_addr, 1); 6684} 6685 { 6686 SI opval = tmp_addr; 6687 SET_H_GR (FLD (f_operand1), opval); 6688 written |= (1 << 11); 6689 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 6690 } 6691} 6692} 6693; tmp_tmp_mem; })); 6694 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 6695 tmp_carry = CPU (h_cbit); 6696 tmp_newval = ADDCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 6697 { 6698 SI opval = tmp_newval; 6699 SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval); 6700 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 6701 } 6702{ 6703 { 6704 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), ORIF (ANDIF (LTSI (tmp_tmpopd, 0), GESI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_newval, 0)))); 6705 CPU (h_cbit) = opval; 6706 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 6707 } 6708 { 6709 BI opval = LTSI (tmp_newval, 0); 6710 CPU (h_nbit) = opval; 6711 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 6712 } 6713 { 6714 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 6715 CPU (h_zbit) = opval; 6716 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 6717 } 6718 { 6719 BI opval = ORIF (ANDIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (GESI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 6720 CPU (h_vbit) = opval; 6721 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 6722 } 6723{ 6724 { 6725 BI opval = 0; 6726 CPU (h_xbit) = opval; 6727 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 6728 } 6729 { 6730 BI opval = 0; 6731 SET_H_INSN_PREFIXED_P (opval); 6732 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 6733 } 6734} 6735} 6736} 6737 6738 abuf->written = written; 6739#undef FLD 6740} 6741 NEXT (vpc); 6742 6743 CASE (sem, INSN_ADDU_M_W_M) : /* addu-m.w [${Rs}${inc}],$Rd */ 6744{ 6745 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6746 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 6747#define FLD(f) abuf->fields.sfmt_add_m_b_m.f 6748 int UNUSED written = 0; 6749 IADDR UNUSED pc = abuf->addr; 6750 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 6751 6752{ 6753 SI tmp_tmpopd; 6754 SI tmp_tmpops; 6755 BI tmp_carry; 6756 SI tmp_newval; 6757 tmp_tmpops = ZEXTHISI (({ SI tmp_addr; 6758 HI tmp_tmp_mem; 6759 BI tmp_postinc; 6760 tmp_postinc = FLD (f_memmode); 6761; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32))); 6762; tmp_tmp_mem = GETMEMHI (current_cpu, pc, tmp_addr); 6763; if (NEBI (tmp_postinc, 0)) { 6764{ 6765if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 6766 tmp_addr = ADDSI (tmp_addr, 2); 6767} 6768 { 6769 SI opval = tmp_addr; 6770 SET_H_GR (FLD (f_operand1), opval); 6771 written |= (1 << 11); 6772 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 6773 } 6774} 6775} 6776; tmp_tmp_mem; })); 6777 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 6778 tmp_carry = CPU (h_cbit); 6779 tmp_newval = ADDCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 6780 { 6781 SI opval = tmp_newval; 6782 SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval); 6783 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 6784 } 6785{ 6786 { 6787 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), ORIF (ANDIF (LTSI (tmp_tmpopd, 0), GESI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_newval, 0)))); 6788 CPU (h_cbit) = opval; 6789 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 6790 } 6791 { 6792 BI opval = LTSI (tmp_newval, 0); 6793 CPU (h_nbit) = opval; 6794 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 6795 } 6796 { 6797 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 6798 CPU (h_zbit) = opval; 6799 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 6800 } 6801 { 6802 BI opval = ORIF (ANDIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (GESI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 6803 CPU (h_vbit) = opval; 6804 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 6805 } 6806{ 6807 { 6808 BI opval = 0; 6809 CPU (h_xbit) = opval; 6810 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 6811 } 6812 { 6813 BI opval = 0; 6814 SET_H_INSN_PREFIXED_P (opval); 6815 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 6816 } 6817} 6818} 6819} 6820 6821 abuf->written = written; 6822#undef FLD 6823} 6824 NEXT (vpc); 6825 6826 CASE (sem, INSN_ADDUCBR) : /* [${Rs}${inc}],$Rd */ 6827{ 6828 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6829 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 6830#define FLD(f) abuf->fields.sfmt_addcbr.f 6831 int UNUSED written = 0; 6832 IADDR UNUSED pc = abuf->addr; 6833 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 6834 6835{ 6836 SI tmp_tmpopd; 6837 SI tmp_tmpops; 6838 BI tmp_carry; 6839 SI tmp_newval; 6840 tmp_tmpops = ZEXTQISI (TRUNCSIQI (FLD (f_indir_pc__byte))); 6841 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 6842 tmp_carry = CPU (h_cbit); 6843 tmp_newval = ADDCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 6844 { 6845 SI opval = tmp_newval; 6846 SET_H_GR (FLD (f_operand2), opval); 6847 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 6848 } 6849{ 6850 { 6851 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), ORIF (ANDIF (LTSI (tmp_tmpopd, 0), GESI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_newval, 0)))); 6852 CPU (h_cbit) = opval; 6853 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 6854 } 6855 { 6856 BI opval = LTSI (tmp_newval, 0); 6857 CPU (h_nbit) = opval; 6858 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 6859 } 6860 { 6861 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 6862 CPU (h_zbit) = opval; 6863 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 6864 } 6865 { 6866 BI opval = ORIF (ANDIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (GESI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 6867 CPU (h_vbit) = opval; 6868 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 6869 } 6870{ 6871 { 6872 BI opval = 0; 6873 CPU (h_xbit) = opval; 6874 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 6875 } 6876 { 6877 BI opval = 0; 6878 SET_H_INSN_PREFIXED_P (opval); 6879 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 6880 } 6881} 6882} 6883} 6884 6885#undef FLD 6886} 6887 NEXT (vpc); 6888 6889 CASE (sem, INSN_ADDUCWR) : /* [${Rs}${inc}],$Rd */ 6890{ 6891 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6892 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 6893#define FLD(f) abuf->fields.sfmt_addcwr.f 6894 int UNUSED written = 0; 6895 IADDR UNUSED pc = abuf->addr; 6896 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 6897 6898{ 6899 SI tmp_tmpopd; 6900 SI tmp_tmpops; 6901 BI tmp_carry; 6902 SI tmp_newval; 6903 tmp_tmpops = ZEXTHISI (TRUNCSIHI (FLD (f_indir_pc__word))); 6904 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 6905 tmp_carry = CPU (h_cbit); 6906 tmp_newval = ADDCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 6907 { 6908 SI opval = tmp_newval; 6909 SET_H_GR (FLD (f_operand2), opval); 6910 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 6911 } 6912{ 6913 { 6914 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), ORIF (ANDIF (LTSI (tmp_tmpopd, 0), GESI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_newval, 0)))); 6915 CPU (h_cbit) = opval; 6916 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 6917 } 6918 { 6919 BI opval = LTSI (tmp_newval, 0); 6920 CPU (h_nbit) = opval; 6921 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 6922 } 6923 { 6924 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 6925 CPU (h_zbit) = opval; 6926 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 6927 } 6928 { 6929 BI opval = ORIF (ANDIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (GESI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 6930 CPU (h_vbit) = opval; 6931 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 6932 } 6933{ 6934 { 6935 BI opval = 0; 6936 CPU (h_xbit) = opval; 6937 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 6938 } 6939 { 6940 BI opval = 0; 6941 SET_H_INSN_PREFIXED_P (opval); 6942 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 6943 } 6944} 6945} 6946} 6947 6948#undef FLD 6949} 6950 NEXT (vpc); 6951 6952 CASE (sem, INSN_SUB_B_R) : /* sub.b $Rs,$Rd */ 6953{ 6954 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6955 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 6956#define FLD(f) abuf->fields.sfmt_add_b_r.f 6957 int UNUSED written = 0; 6958 IADDR UNUSED pc = abuf->addr; 6959 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 6960 6961{ 6962 QI tmp_tmpopd; 6963 QI tmp_tmpops; 6964 BI tmp_carry; 6965 QI tmp_newval; 6966 tmp_tmpops = GET_H_GR (FLD (f_operand1)); 6967 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 6968 tmp_carry = CPU (h_cbit); 6969 tmp_newval = SUBCQI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 6970{ 6971 SI tmp_oldregval; 6972 tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2)); 6973 { 6974 SI opval = ORSI (ANDSI (tmp_newval, 255), ANDSI (tmp_oldregval, 0xffffff00)); 6975 SET_H_GR (FLD (f_operand2), opval); 6976 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 6977 } 6978} 6979{ 6980 { 6981 BI opval = ORIF (ANDIF (LTQI (tmp_tmpops, 0), GEQI (tmp_tmpopd, 0)), ORIF (ANDIF (GEQI (tmp_tmpopd, 0), LTQI (tmp_newval, 0)), ANDIF (LTQI (tmp_tmpops, 0), LTQI (tmp_newval, 0)))); 6982 CPU (h_cbit) = opval; 6983 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 6984 } 6985 { 6986 BI opval = LTQI (tmp_newval, 0); 6987 CPU (h_nbit) = opval; 6988 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 6989 } 6990 { 6991 BI opval = ANDIF (EQQI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 6992 CPU (h_zbit) = opval; 6993 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 6994 } 6995 { 6996 BI opval = ORIF (ANDIF (ANDIF (GEQI (tmp_tmpops, 0), LTQI (tmp_tmpopd, 0)), GEQI (tmp_newval, 0)), ANDIF (ANDIF (LTQI (tmp_tmpops, 0), GEQI (tmp_tmpopd, 0)), LTQI (tmp_newval, 0))); 6997 CPU (h_vbit) = opval; 6998 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 6999 } 7000{ 7001 { 7002 BI opval = 0; 7003 CPU (h_xbit) = opval; 7004 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 7005 } 7006 { 7007 BI opval = 0; 7008 SET_H_INSN_PREFIXED_P (opval); 7009 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 7010 } 7011} 7012} 7013} 7014 7015#undef FLD 7016} 7017 NEXT (vpc); 7018 7019 CASE (sem, INSN_SUB_W_R) : /* sub.w $Rs,$Rd */ 7020{ 7021 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 7022 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 7023#define FLD(f) abuf->fields.sfmt_add_b_r.f 7024 int UNUSED written = 0; 7025 IADDR UNUSED pc = abuf->addr; 7026 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 7027 7028{ 7029 HI tmp_tmpopd; 7030 HI tmp_tmpops; 7031 BI tmp_carry; 7032 HI tmp_newval; 7033 tmp_tmpops = GET_H_GR (FLD (f_operand1)); 7034 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 7035 tmp_carry = CPU (h_cbit); 7036 tmp_newval = SUBCHI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 7037{ 7038 SI tmp_oldregval; 7039 tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2)); 7040 { 7041 SI opval = ORSI (ANDSI (tmp_newval, 65535), ANDSI (tmp_oldregval, 0xffff0000)); 7042 SET_H_GR (FLD (f_operand2), opval); 7043 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 7044 } 7045} 7046{ 7047 { 7048 BI opval = ORIF (ANDIF (LTHI (tmp_tmpops, 0), GEHI (tmp_tmpopd, 0)), ORIF (ANDIF (GEHI (tmp_tmpopd, 0), LTHI (tmp_newval, 0)), ANDIF (LTHI (tmp_tmpops, 0), LTHI (tmp_newval, 0)))); 7049 CPU (h_cbit) = opval; 7050 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 7051 } 7052 { 7053 BI opval = LTHI (tmp_newval, 0); 7054 CPU (h_nbit) = opval; 7055 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 7056 } 7057 { 7058 BI opval = ANDIF (EQHI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 7059 CPU (h_zbit) = opval; 7060 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 7061 } 7062 { 7063 BI opval = ORIF (ANDIF (ANDIF (GEHI (tmp_tmpops, 0), LTHI (tmp_tmpopd, 0)), GEHI (tmp_newval, 0)), ANDIF (ANDIF (LTHI (tmp_tmpops, 0), GEHI (tmp_tmpopd, 0)), LTHI (tmp_newval, 0))); 7064 CPU (h_vbit) = opval; 7065 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 7066 } 7067{ 7068 { 7069 BI opval = 0; 7070 CPU (h_xbit) = opval; 7071 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 7072 } 7073 { 7074 BI opval = 0; 7075 SET_H_INSN_PREFIXED_P (opval); 7076 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 7077 } 7078} 7079} 7080} 7081 7082#undef FLD 7083} 7084 NEXT (vpc); 7085 7086 CASE (sem, INSN_SUB_D_R) : /* sub.d $Rs,$Rd */ 7087{ 7088 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 7089 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 7090#define FLD(f) abuf->fields.sfmt_add_b_r.f 7091 int UNUSED written = 0; 7092 IADDR UNUSED pc = abuf->addr; 7093 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 7094 7095{ 7096 SI tmp_tmpopd; 7097 SI tmp_tmpops; 7098 BI tmp_carry; 7099 SI tmp_newval; 7100 tmp_tmpops = GET_H_GR (FLD (f_operand1)); 7101 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 7102 tmp_carry = CPU (h_cbit); 7103 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 7104 { 7105 SI opval = tmp_newval; 7106 SET_H_GR (FLD (f_operand2), opval); 7107 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 7108 } 7109{ 7110 { 7111 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0)))); 7112 CPU (h_cbit) = opval; 7113 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 7114 } 7115 { 7116 BI opval = LTSI (tmp_newval, 0); 7117 CPU (h_nbit) = opval; 7118 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 7119 } 7120 { 7121 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 7122 CPU (h_zbit) = opval; 7123 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 7124 } 7125 { 7126 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 7127 CPU (h_vbit) = opval; 7128 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 7129 } 7130{ 7131 { 7132 BI opval = 0; 7133 CPU (h_xbit) = opval; 7134 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 7135 } 7136 { 7137 BI opval = 0; 7138 SET_H_INSN_PREFIXED_P (opval); 7139 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 7140 } 7141} 7142} 7143} 7144 7145#undef FLD 7146} 7147 NEXT (vpc); 7148 7149 CASE (sem, INSN_SUB_M_B_M) : /* sub-m.b [${Rs}${inc}],${Rd} */ 7150{ 7151 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 7152 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 7153#define FLD(f) abuf->fields.sfmt_add_m_b_m.f 7154 int UNUSED written = 0; 7155 IADDR UNUSED pc = abuf->addr; 7156 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 7157 7158{ 7159 QI tmp_tmpopd; 7160 QI tmp_tmpops; 7161 BI tmp_carry; 7162 QI tmp_newval; 7163 tmp_tmpops = ({ SI tmp_addr; 7164 QI tmp_tmp_mem; 7165 BI tmp_postinc; 7166 tmp_postinc = FLD (f_memmode); 7167; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32))); 7168; tmp_tmp_mem = GETMEMQI (current_cpu, pc, tmp_addr); 7169; if (NEBI (tmp_postinc, 0)) { 7170{ 7171if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 7172 tmp_addr = ADDSI (tmp_addr, 1); 7173} 7174 { 7175 SI opval = tmp_addr; 7176 SET_H_GR (FLD (f_operand1), opval); 7177 written |= (1 << 12); 7178 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 7179 } 7180} 7181} 7182; tmp_tmp_mem; }); 7183 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 7184 tmp_carry = CPU (h_cbit); 7185 tmp_newval = SUBCQI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 7186{ 7187 SI tmp_oldregval; 7188 tmp_oldregval = GET_H_RAW_GR_PC (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2)))); 7189 { 7190 SI opval = ORSI (ANDSI (tmp_newval, 255), ANDSI (tmp_oldregval, 0xffffff00)); 7191 SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval); 7192 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 7193 } 7194} 7195{ 7196 { 7197 BI opval = ORIF (ANDIF (LTQI (tmp_tmpops, 0), GEQI (tmp_tmpopd, 0)), ORIF (ANDIF (GEQI (tmp_tmpopd, 0), LTQI (tmp_newval, 0)), ANDIF (LTQI (tmp_tmpops, 0), LTQI (tmp_newval, 0)))); 7198 CPU (h_cbit) = opval; 7199 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 7200 } 7201 { 7202 BI opval = LTQI (tmp_newval, 0); 7203 CPU (h_nbit) = opval; 7204 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 7205 } 7206 { 7207 BI opval = ANDIF (EQQI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 7208 CPU (h_zbit) = opval; 7209 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 7210 } 7211 { 7212 BI opval = ORIF (ANDIF (ANDIF (GEQI (tmp_tmpops, 0), LTQI (tmp_tmpopd, 0)), GEQI (tmp_newval, 0)), ANDIF (ANDIF (LTQI (tmp_tmpops, 0), GEQI (tmp_tmpopd, 0)), LTQI (tmp_newval, 0))); 7213 CPU (h_vbit) = opval; 7214 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 7215 } 7216{ 7217 { 7218 BI opval = 0; 7219 CPU (h_xbit) = opval; 7220 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 7221 } 7222 { 7223 BI opval = 0; 7224 SET_H_INSN_PREFIXED_P (opval); 7225 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 7226 } 7227} 7228} 7229} 7230 7231 abuf->written = written; 7232#undef FLD 7233} 7234 NEXT (vpc); 7235 7236 CASE (sem, INSN_SUB_M_W_M) : /* sub-m.w [${Rs}${inc}],${Rd} */ 7237{ 7238 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 7239 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 7240#define FLD(f) abuf->fields.sfmt_add_m_b_m.f 7241 int UNUSED written = 0; 7242 IADDR UNUSED pc = abuf->addr; 7243 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 7244 7245{ 7246 HI tmp_tmpopd; 7247 HI tmp_tmpops; 7248 BI tmp_carry; 7249 HI tmp_newval; 7250 tmp_tmpops = ({ SI tmp_addr; 7251 HI tmp_tmp_mem; 7252 BI tmp_postinc; 7253 tmp_postinc = FLD (f_memmode); 7254; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32))); 7255; tmp_tmp_mem = GETMEMHI (current_cpu, pc, tmp_addr); 7256; if (NEBI (tmp_postinc, 0)) { 7257{ 7258if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 7259 tmp_addr = ADDSI (tmp_addr, 2); 7260} 7261 { 7262 SI opval = tmp_addr; 7263 SET_H_GR (FLD (f_operand1), opval); 7264 written |= (1 << 12); 7265 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 7266 } 7267} 7268} 7269; tmp_tmp_mem; }); 7270 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 7271 tmp_carry = CPU (h_cbit); 7272 tmp_newval = SUBCHI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 7273{ 7274 SI tmp_oldregval; 7275 tmp_oldregval = GET_H_RAW_GR_PC (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2)))); 7276 { 7277 SI opval = ORSI (ANDSI (tmp_newval, 65535), ANDSI (tmp_oldregval, 0xffff0000)); 7278 SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval); 7279 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 7280 } 7281} 7282{ 7283 { 7284 BI opval = ORIF (ANDIF (LTHI (tmp_tmpops, 0), GEHI (tmp_tmpopd, 0)), ORIF (ANDIF (GEHI (tmp_tmpopd, 0), LTHI (tmp_newval, 0)), ANDIF (LTHI (tmp_tmpops, 0), LTHI (tmp_newval, 0)))); 7285 CPU (h_cbit) = opval; 7286 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 7287 } 7288 { 7289 BI opval = LTHI (tmp_newval, 0); 7290 CPU (h_nbit) = opval; 7291 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 7292 } 7293 { 7294 BI opval = ANDIF (EQHI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 7295 CPU (h_zbit) = opval; 7296 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 7297 } 7298 { 7299 BI opval = ORIF (ANDIF (ANDIF (GEHI (tmp_tmpops, 0), LTHI (tmp_tmpopd, 0)), GEHI (tmp_newval, 0)), ANDIF (ANDIF (LTHI (tmp_tmpops, 0), GEHI (tmp_tmpopd, 0)), LTHI (tmp_newval, 0))); 7300 CPU (h_vbit) = opval; 7301 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 7302 } 7303{ 7304 { 7305 BI opval = 0; 7306 CPU (h_xbit) = opval; 7307 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 7308 } 7309 { 7310 BI opval = 0; 7311 SET_H_INSN_PREFIXED_P (opval); 7312 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 7313 } 7314} 7315} 7316} 7317 7318 abuf->written = written; 7319#undef FLD 7320} 7321 NEXT (vpc); 7322 7323 CASE (sem, INSN_SUB_M_D_M) : /* sub-m.d [${Rs}${inc}],${Rd} */ 7324{ 7325 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 7326 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 7327#define FLD(f) abuf->fields.sfmt_add_m_b_m.f 7328 int UNUSED written = 0; 7329 IADDR UNUSED pc = abuf->addr; 7330 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 7331 7332{ 7333 SI tmp_tmpopd; 7334 SI tmp_tmpops; 7335 BI tmp_carry; 7336 SI tmp_newval; 7337 tmp_tmpops = ({ SI tmp_addr; 7338 SI tmp_tmp_mem; 7339 BI tmp_postinc; 7340 tmp_postinc = FLD (f_memmode); 7341; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32))); 7342; tmp_tmp_mem = GETMEMSI (current_cpu, pc, tmp_addr); 7343; if (NEBI (tmp_postinc, 0)) { 7344{ 7345if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 7346 tmp_addr = ADDSI (tmp_addr, 4); 7347} 7348 { 7349 SI opval = tmp_addr; 7350 SET_H_GR (FLD (f_operand1), opval); 7351 written |= (1 << 11); 7352 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 7353 } 7354} 7355} 7356; tmp_tmp_mem; }); 7357 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 7358 tmp_carry = CPU (h_cbit); 7359 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 7360 { 7361 SI opval = tmp_newval; 7362 SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval); 7363 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 7364 } 7365{ 7366 { 7367 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0)))); 7368 CPU (h_cbit) = opval; 7369 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 7370 } 7371 { 7372 BI opval = LTSI (tmp_newval, 0); 7373 CPU (h_nbit) = opval; 7374 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 7375 } 7376 { 7377 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 7378 CPU (h_zbit) = opval; 7379 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 7380 } 7381 { 7382 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 7383 CPU (h_vbit) = opval; 7384 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 7385 } 7386{ 7387 { 7388 BI opval = 0; 7389 CPU (h_xbit) = opval; 7390 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 7391 } 7392 { 7393 BI opval = 0; 7394 SET_H_INSN_PREFIXED_P (opval); 7395 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 7396 } 7397} 7398} 7399} 7400 7401 abuf->written = written; 7402#undef FLD 7403} 7404 NEXT (vpc); 7405 7406 CASE (sem, INSN_SUBCBR) : /* sub.b ${sconst8}],${Rd} */ 7407{ 7408 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 7409 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 7410#define FLD(f) abuf->fields.sfmt_addcbr.f 7411 int UNUSED written = 0; 7412 IADDR UNUSED pc = abuf->addr; 7413 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 7414 7415{ 7416 QI tmp_tmpopd; 7417 QI tmp_tmpops; 7418 BI tmp_carry; 7419 QI tmp_newval; 7420 tmp_tmpops = FLD (f_indir_pc__byte); 7421 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 7422 tmp_carry = CPU (h_cbit); 7423 tmp_newval = SUBCQI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 7424{ 7425 SI tmp_oldregval; 7426 tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2)); 7427 { 7428 SI opval = ORSI (ANDSI (tmp_newval, 255), ANDSI (tmp_oldregval, 0xffffff00)); 7429 SET_H_GR (FLD (f_operand2), opval); 7430 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 7431 } 7432} 7433{ 7434 { 7435 BI opval = ORIF (ANDIF (LTQI (tmp_tmpops, 0), GEQI (tmp_tmpopd, 0)), ORIF (ANDIF (GEQI (tmp_tmpopd, 0), LTQI (tmp_newval, 0)), ANDIF (LTQI (tmp_tmpops, 0), LTQI (tmp_newval, 0)))); 7436 CPU (h_cbit) = opval; 7437 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 7438 } 7439 { 7440 BI opval = LTQI (tmp_newval, 0); 7441 CPU (h_nbit) = opval; 7442 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 7443 } 7444 { 7445 BI opval = ANDIF (EQQI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 7446 CPU (h_zbit) = opval; 7447 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 7448 } 7449 { 7450 BI opval = ORIF (ANDIF (ANDIF (GEQI (tmp_tmpops, 0), LTQI (tmp_tmpopd, 0)), GEQI (tmp_newval, 0)), ANDIF (ANDIF (LTQI (tmp_tmpops, 0), GEQI (tmp_tmpopd, 0)), LTQI (tmp_newval, 0))); 7451 CPU (h_vbit) = opval; 7452 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 7453 } 7454{ 7455 { 7456 BI opval = 0; 7457 CPU (h_xbit) = opval; 7458 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 7459 } 7460 { 7461 BI opval = 0; 7462 SET_H_INSN_PREFIXED_P (opval); 7463 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 7464 } 7465} 7466} 7467} 7468 7469#undef FLD 7470} 7471 NEXT (vpc); 7472 7473 CASE (sem, INSN_SUBCWR) : /* sub.w ${sconst16}],${Rd} */ 7474{ 7475 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 7476 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 7477#define FLD(f) abuf->fields.sfmt_addcwr.f 7478 int UNUSED written = 0; 7479 IADDR UNUSED pc = abuf->addr; 7480 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 7481 7482{ 7483 HI tmp_tmpopd; 7484 HI tmp_tmpops; 7485 BI tmp_carry; 7486 HI tmp_newval; 7487 tmp_tmpops = FLD (f_indir_pc__word); 7488 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 7489 tmp_carry = CPU (h_cbit); 7490 tmp_newval = SUBCHI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 7491{ 7492 SI tmp_oldregval; 7493 tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2)); 7494 { 7495 SI opval = ORSI (ANDSI (tmp_newval, 65535), ANDSI (tmp_oldregval, 0xffff0000)); 7496 SET_H_GR (FLD (f_operand2), opval); 7497 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 7498 } 7499} 7500{ 7501 { 7502 BI opval = ORIF (ANDIF (LTHI (tmp_tmpops, 0), GEHI (tmp_tmpopd, 0)), ORIF (ANDIF (GEHI (tmp_tmpopd, 0), LTHI (tmp_newval, 0)), ANDIF (LTHI (tmp_tmpops, 0), LTHI (tmp_newval, 0)))); 7503 CPU (h_cbit) = opval; 7504 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 7505 } 7506 { 7507 BI opval = LTHI (tmp_newval, 0); 7508 CPU (h_nbit) = opval; 7509 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 7510 } 7511 { 7512 BI opval = ANDIF (EQHI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 7513 CPU (h_zbit) = opval; 7514 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 7515 } 7516 { 7517 BI opval = ORIF (ANDIF (ANDIF (GEHI (tmp_tmpops, 0), LTHI (tmp_tmpopd, 0)), GEHI (tmp_newval, 0)), ANDIF (ANDIF (LTHI (tmp_tmpops, 0), GEHI (tmp_tmpopd, 0)), LTHI (tmp_newval, 0))); 7518 CPU (h_vbit) = opval; 7519 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 7520 } 7521{ 7522 { 7523 BI opval = 0; 7524 CPU (h_xbit) = opval; 7525 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 7526 } 7527 { 7528 BI opval = 0; 7529 SET_H_INSN_PREFIXED_P (opval); 7530 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 7531 } 7532} 7533} 7534} 7535 7536#undef FLD 7537} 7538 NEXT (vpc); 7539 7540 CASE (sem, INSN_SUBCDR) : /* sub.d ${const32}],${Rd} */ 7541{ 7542 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 7543 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 7544#define FLD(f) abuf->fields.sfmt_addcdr.f 7545 int UNUSED written = 0; 7546 IADDR UNUSED pc = abuf->addr; 7547 vpc = SEM_NEXT_VPC (sem_arg, pc, 6); 7548 7549{ 7550 SI tmp_tmpopd; 7551 SI tmp_tmpops; 7552 BI tmp_carry; 7553 SI tmp_newval; 7554 tmp_tmpops = FLD (f_indir_pc__dword); 7555 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 7556 tmp_carry = CPU (h_cbit); 7557 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 7558 { 7559 SI opval = tmp_newval; 7560 SET_H_GR (FLD (f_operand2), opval); 7561 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 7562 } 7563{ 7564 { 7565 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0)))); 7566 CPU (h_cbit) = opval; 7567 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 7568 } 7569 { 7570 BI opval = LTSI (tmp_newval, 0); 7571 CPU (h_nbit) = opval; 7572 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 7573 } 7574 { 7575 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 7576 CPU (h_zbit) = opval; 7577 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 7578 } 7579 { 7580 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 7581 CPU (h_vbit) = opval; 7582 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 7583 } 7584{ 7585 { 7586 BI opval = 0; 7587 CPU (h_xbit) = opval; 7588 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 7589 } 7590 { 7591 BI opval = 0; 7592 SET_H_INSN_PREFIXED_P (opval); 7593 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 7594 } 7595} 7596} 7597} 7598 7599#undef FLD 7600} 7601 NEXT (vpc); 7602 7603 CASE (sem, INSN_SUBS_B_R) : /* subs.b $Rs,$Rd */ 7604{ 7605 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 7606 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 7607#define FLD(f) abuf->fields.sfmt_add_b_r.f 7608 int UNUSED written = 0; 7609 IADDR UNUSED pc = abuf->addr; 7610 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 7611 7612{ 7613 SI tmp_tmpopd; 7614 SI tmp_tmpops; 7615 BI tmp_carry; 7616 SI tmp_newval; 7617 tmp_tmpops = EXTQISI (TRUNCSIQI (GET_H_GR (FLD (f_operand1)))); 7618 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 7619 tmp_carry = CPU (h_cbit); 7620 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 7621 { 7622 SI opval = tmp_newval; 7623 SET_H_GR (FLD (f_operand2), opval); 7624 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 7625 } 7626{ 7627 { 7628 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0)))); 7629 CPU (h_cbit) = opval; 7630 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 7631 } 7632 { 7633 BI opval = LTSI (tmp_newval, 0); 7634 CPU (h_nbit) = opval; 7635 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 7636 } 7637 { 7638 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 7639 CPU (h_zbit) = opval; 7640 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 7641 } 7642 { 7643 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 7644 CPU (h_vbit) = opval; 7645 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 7646 } 7647{ 7648 { 7649 BI opval = 0; 7650 CPU (h_xbit) = opval; 7651 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 7652 } 7653 { 7654 BI opval = 0; 7655 SET_H_INSN_PREFIXED_P (opval); 7656 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 7657 } 7658} 7659} 7660} 7661 7662#undef FLD 7663} 7664 NEXT (vpc); 7665 7666 CASE (sem, INSN_SUBS_W_R) : /* subs.w $Rs,$Rd */ 7667{ 7668 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 7669 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 7670#define FLD(f) abuf->fields.sfmt_add_b_r.f 7671 int UNUSED written = 0; 7672 IADDR UNUSED pc = abuf->addr; 7673 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 7674 7675{ 7676 SI tmp_tmpopd; 7677 SI tmp_tmpops; 7678 BI tmp_carry; 7679 SI tmp_newval; 7680 tmp_tmpops = EXTHISI (TRUNCSIHI (GET_H_GR (FLD (f_operand1)))); 7681 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 7682 tmp_carry = CPU (h_cbit); 7683 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 7684 { 7685 SI opval = tmp_newval; 7686 SET_H_GR (FLD (f_operand2), opval); 7687 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 7688 } 7689{ 7690 { 7691 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0)))); 7692 CPU (h_cbit) = opval; 7693 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 7694 } 7695 { 7696 BI opval = LTSI (tmp_newval, 0); 7697 CPU (h_nbit) = opval; 7698 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 7699 } 7700 { 7701 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 7702 CPU (h_zbit) = opval; 7703 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 7704 } 7705 { 7706 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 7707 CPU (h_vbit) = opval; 7708 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 7709 } 7710{ 7711 { 7712 BI opval = 0; 7713 CPU (h_xbit) = opval; 7714 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 7715 } 7716 { 7717 BI opval = 0; 7718 SET_H_INSN_PREFIXED_P (opval); 7719 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 7720 } 7721} 7722} 7723} 7724 7725#undef FLD 7726} 7727 NEXT (vpc); 7728 7729 CASE (sem, INSN_SUBS_M_B_M) : /* subs-m.b [${Rs}${inc}],$Rd */ 7730{ 7731 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 7732 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 7733#define FLD(f) abuf->fields.sfmt_add_m_b_m.f 7734 int UNUSED written = 0; 7735 IADDR UNUSED pc = abuf->addr; 7736 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 7737 7738{ 7739 SI tmp_tmpopd; 7740 SI tmp_tmpops; 7741 BI tmp_carry; 7742 SI tmp_newval; 7743 tmp_tmpops = EXTQISI (({ SI tmp_addr; 7744 QI tmp_tmp_mem; 7745 BI tmp_postinc; 7746 tmp_postinc = FLD (f_memmode); 7747; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32))); 7748; tmp_tmp_mem = GETMEMQI (current_cpu, pc, tmp_addr); 7749; if (NEBI (tmp_postinc, 0)) { 7750{ 7751if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 7752 tmp_addr = ADDSI (tmp_addr, 1); 7753} 7754 { 7755 SI opval = tmp_addr; 7756 SET_H_GR (FLD (f_operand1), opval); 7757 written |= (1 << 11); 7758 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 7759 } 7760} 7761} 7762; tmp_tmp_mem; })); 7763 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 7764 tmp_carry = CPU (h_cbit); 7765 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 7766 { 7767 SI opval = tmp_newval; 7768 SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval); 7769 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 7770 } 7771{ 7772 { 7773 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0)))); 7774 CPU (h_cbit) = opval; 7775 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 7776 } 7777 { 7778 BI opval = LTSI (tmp_newval, 0); 7779 CPU (h_nbit) = opval; 7780 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 7781 } 7782 { 7783 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 7784 CPU (h_zbit) = opval; 7785 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 7786 } 7787 { 7788 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 7789 CPU (h_vbit) = opval; 7790 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 7791 } 7792{ 7793 { 7794 BI opval = 0; 7795 CPU (h_xbit) = opval; 7796 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 7797 } 7798 { 7799 BI opval = 0; 7800 SET_H_INSN_PREFIXED_P (opval); 7801 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 7802 } 7803} 7804} 7805} 7806 7807 abuf->written = written; 7808#undef FLD 7809} 7810 NEXT (vpc); 7811 7812 CASE (sem, INSN_SUBS_M_W_M) : /* subs-m.w [${Rs}${inc}],$Rd */ 7813{ 7814 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 7815 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 7816#define FLD(f) abuf->fields.sfmt_add_m_b_m.f 7817 int UNUSED written = 0; 7818 IADDR UNUSED pc = abuf->addr; 7819 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 7820 7821{ 7822 SI tmp_tmpopd; 7823 SI tmp_tmpops; 7824 BI tmp_carry; 7825 SI tmp_newval; 7826 tmp_tmpops = EXTHISI (({ SI tmp_addr; 7827 HI tmp_tmp_mem; 7828 BI tmp_postinc; 7829 tmp_postinc = FLD (f_memmode); 7830; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32))); 7831; tmp_tmp_mem = GETMEMHI (current_cpu, pc, tmp_addr); 7832; if (NEBI (tmp_postinc, 0)) { 7833{ 7834if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 7835 tmp_addr = ADDSI (tmp_addr, 2); 7836} 7837 { 7838 SI opval = tmp_addr; 7839 SET_H_GR (FLD (f_operand1), opval); 7840 written |= (1 << 11); 7841 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 7842 } 7843} 7844} 7845; tmp_tmp_mem; })); 7846 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 7847 tmp_carry = CPU (h_cbit); 7848 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 7849 { 7850 SI opval = tmp_newval; 7851 SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval); 7852 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 7853 } 7854{ 7855 { 7856 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0)))); 7857 CPU (h_cbit) = opval; 7858 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 7859 } 7860 { 7861 BI opval = LTSI (tmp_newval, 0); 7862 CPU (h_nbit) = opval; 7863 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 7864 } 7865 { 7866 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 7867 CPU (h_zbit) = opval; 7868 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 7869 } 7870 { 7871 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 7872 CPU (h_vbit) = opval; 7873 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 7874 } 7875{ 7876 { 7877 BI opval = 0; 7878 CPU (h_xbit) = opval; 7879 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 7880 } 7881 { 7882 BI opval = 0; 7883 SET_H_INSN_PREFIXED_P (opval); 7884 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 7885 } 7886} 7887} 7888} 7889 7890 abuf->written = written; 7891#undef FLD 7892} 7893 NEXT (vpc); 7894 7895 CASE (sem, INSN_SUBSCBR) : /* [${Rs}${inc}],$Rd */ 7896{ 7897 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 7898 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 7899#define FLD(f) abuf->fields.sfmt_addcbr.f 7900 int UNUSED written = 0; 7901 IADDR UNUSED pc = abuf->addr; 7902 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 7903 7904{ 7905 SI tmp_tmpopd; 7906 SI tmp_tmpops; 7907 BI tmp_carry; 7908 SI tmp_newval; 7909 tmp_tmpops = EXTQISI (TRUNCSIQI (FLD (f_indir_pc__byte))); 7910 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 7911 tmp_carry = CPU (h_cbit); 7912 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 7913 { 7914 SI opval = tmp_newval; 7915 SET_H_GR (FLD (f_operand2), opval); 7916 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 7917 } 7918{ 7919 { 7920 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0)))); 7921 CPU (h_cbit) = opval; 7922 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 7923 } 7924 { 7925 BI opval = LTSI (tmp_newval, 0); 7926 CPU (h_nbit) = opval; 7927 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 7928 } 7929 { 7930 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 7931 CPU (h_zbit) = opval; 7932 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 7933 } 7934 { 7935 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 7936 CPU (h_vbit) = opval; 7937 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 7938 } 7939{ 7940 { 7941 BI opval = 0; 7942 CPU (h_xbit) = opval; 7943 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 7944 } 7945 { 7946 BI opval = 0; 7947 SET_H_INSN_PREFIXED_P (opval); 7948 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 7949 } 7950} 7951} 7952} 7953 7954#undef FLD 7955} 7956 NEXT (vpc); 7957 7958 CASE (sem, INSN_SUBSCWR) : /* [${Rs}${inc}],$Rd */ 7959{ 7960 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 7961 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 7962#define FLD(f) abuf->fields.sfmt_addcwr.f 7963 int UNUSED written = 0; 7964 IADDR UNUSED pc = abuf->addr; 7965 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 7966 7967{ 7968 SI tmp_tmpopd; 7969 SI tmp_tmpops; 7970 BI tmp_carry; 7971 SI tmp_newval; 7972 tmp_tmpops = EXTHISI (TRUNCSIHI (FLD (f_indir_pc__word))); 7973 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 7974 tmp_carry = CPU (h_cbit); 7975 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 7976 { 7977 SI opval = tmp_newval; 7978 SET_H_GR (FLD (f_operand2), opval); 7979 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 7980 } 7981{ 7982 { 7983 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0)))); 7984 CPU (h_cbit) = opval; 7985 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 7986 } 7987 { 7988 BI opval = LTSI (tmp_newval, 0); 7989 CPU (h_nbit) = opval; 7990 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 7991 } 7992 { 7993 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 7994 CPU (h_zbit) = opval; 7995 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 7996 } 7997 { 7998 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 7999 CPU (h_vbit) = opval; 8000 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 8001 } 8002{ 8003 { 8004 BI opval = 0; 8005 CPU (h_xbit) = opval; 8006 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 8007 } 8008 { 8009 BI opval = 0; 8010 SET_H_INSN_PREFIXED_P (opval); 8011 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 8012 } 8013} 8014} 8015} 8016 8017#undef FLD 8018} 8019 NEXT (vpc); 8020 8021 CASE (sem, INSN_SUBU_B_R) : /* subu.b $Rs,$Rd */ 8022{ 8023 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 8024 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 8025#define FLD(f) abuf->fields.sfmt_add_b_r.f 8026 int UNUSED written = 0; 8027 IADDR UNUSED pc = abuf->addr; 8028 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 8029 8030{ 8031 SI tmp_tmpopd; 8032 SI tmp_tmpops; 8033 BI tmp_carry; 8034 SI tmp_newval; 8035 tmp_tmpops = ZEXTQISI (TRUNCSIQI (GET_H_GR (FLD (f_operand1)))); 8036 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 8037 tmp_carry = CPU (h_cbit); 8038 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 8039 { 8040 SI opval = tmp_newval; 8041 SET_H_GR (FLD (f_operand2), opval); 8042 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 8043 } 8044{ 8045 { 8046 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0)))); 8047 CPU (h_cbit) = opval; 8048 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 8049 } 8050 { 8051 BI opval = LTSI (tmp_newval, 0); 8052 CPU (h_nbit) = opval; 8053 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 8054 } 8055 { 8056 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 8057 CPU (h_zbit) = opval; 8058 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 8059 } 8060 { 8061 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 8062 CPU (h_vbit) = opval; 8063 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 8064 } 8065{ 8066 { 8067 BI opval = 0; 8068 CPU (h_xbit) = opval; 8069 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 8070 } 8071 { 8072 BI opval = 0; 8073 SET_H_INSN_PREFIXED_P (opval); 8074 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 8075 } 8076} 8077} 8078} 8079 8080#undef FLD 8081} 8082 NEXT (vpc); 8083 8084 CASE (sem, INSN_SUBU_W_R) : /* subu.w $Rs,$Rd */ 8085{ 8086 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 8087 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 8088#define FLD(f) abuf->fields.sfmt_add_b_r.f 8089 int UNUSED written = 0; 8090 IADDR UNUSED pc = abuf->addr; 8091 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 8092 8093{ 8094 SI tmp_tmpopd; 8095 SI tmp_tmpops; 8096 BI tmp_carry; 8097 SI tmp_newval; 8098 tmp_tmpops = ZEXTHISI (TRUNCSIHI (GET_H_GR (FLD (f_operand1)))); 8099 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 8100 tmp_carry = CPU (h_cbit); 8101 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 8102 { 8103 SI opval = tmp_newval; 8104 SET_H_GR (FLD (f_operand2), opval); 8105 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 8106 } 8107{ 8108 { 8109 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0)))); 8110 CPU (h_cbit) = opval; 8111 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 8112 } 8113 { 8114 BI opval = LTSI (tmp_newval, 0); 8115 CPU (h_nbit) = opval; 8116 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 8117 } 8118 { 8119 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 8120 CPU (h_zbit) = opval; 8121 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 8122 } 8123 { 8124 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 8125 CPU (h_vbit) = opval; 8126 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 8127 } 8128{ 8129 { 8130 BI opval = 0; 8131 CPU (h_xbit) = opval; 8132 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 8133 } 8134 { 8135 BI opval = 0; 8136 SET_H_INSN_PREFIXED_P (opval); 8137 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 8138 } 8139} 8140} 8141} 8142 8143#undef FLD 8144} 8145 NEXT (vpc); 8146 8147 CASE (sem, INSN_SUBU_M_B_M) : /* subu-m.b [${Rs}${inc}],$Rd */ 8148{ 8149 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 8150 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 8151#define FLD(f) abuf->fields.sfmt_add_m_b_m.f 8152 int UNUSED written = 0; 8153 IADDR UNUSED pc = abuf->addr; 8154 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 8155 8156{ 8157 SI tmp_tmpopd; 8158 SI tmp_tmpops; 8159 BI tmp_carry; 8160 SI tmp_newval; 8161 tmp_tmpops = ZEXTQISI (({ SI tmp_addr; 8162 QI tmp_tmp_mem; 8163 BI tmp_postinc; 8164 tmp_postinc = FLD (f_memmode); 8165; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32))); 8166; tmp_tmp_mem = GETMEMQI (current_cpu, pc, tmp_addr); 8167; if (NEBI (tmp_postinc, 0)) { 8168{ 8169if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 8170 tmp_addr = ADDSI (tmp_addr, 1); 8171} 8172 { 8173 SI opval = tmp_addr; 8174 SET_H_GR (FLD (f_operand1), opval); 8175 written |= (1 << 11); 8176 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 8177 } 8178} 8179} 8180; tmp_tmp_mem; })); 8181 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 8182 tmp_carry = CPU (h_cbit); 8183 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 8184 { 8185 SI opval = tmp_newval; 8186 SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval); 8187 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 8188 } 8189{ 8190 { 8191 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0)))); 8192 CPU (h_cbit) = opval; 8193 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 8194 } 8195 { 8196 BI opval = LTSI (tmp_newval, 0); 8197 CPU (h_nbit) = opval; 8198 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 8199 } 8200 { 8201 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 8202 CPU (h_zbit) = opval; 8203 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 8204 } 8205 { 8206 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 8207 CPU (h_vbit) = opval; 8208 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 8209 } 8210{ 8211 { 8212 BI opval = 0; 8213 CPU (h_xbit) = opval; 8214 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 8215 } 8216 { 8217 BI opval = 0; 8218 SET_H_INSN_PREFIXED_P (opval); 8219 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 8220 } 8221} 8222} 8223} 8224 8225 abuf->written = written; 8226#undef FLD 8227} 8228 NEXT (vpc); 8229 8230 CASE (sem, INSN_SUBU_M_W_M) : /* subu-m.w [${Rs}${inc}],$Rd */ 8231{ 8232 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 8233 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 8234#define FLD(f) abuf->fields.sfmt_add_m_b_m.f 8235 int UNUSED written = 0; 8236 IADDR UNUSED pc = abuf->addr; 8237 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 8238 8239{ 8240 SI tmp_tmpopd; 8241 SI tmp_tmpops; 8242 BI tmp_carry; 8243 SI tmp_newval; 8244 tmp_tmpops = ZEXTHISI (({ SI tmp_addr; 8245 HI tmp_tmp_mem; 8246 BI tmp_postinc; 8247 tmp_postinc = FLD (f_memmode); 8248; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32))); 8249; tmp_tmp_mem = GETMEMHI (current_cpu, pc, tmp_addr); 8250; if (NEBI (tmp_postinc, 0)) { 8251{ 8252if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 8253 tmp_addr = ADDSI (tmp_addr, 2); 8254} 8255 { 8256 SI opval = tmp_addr; 8257 SET_H_GR (FLD (f_operand1), opval); 8258 written |= (1 << 11); 8259 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 8260 } 8261} 8262} 8263; tmp_tmp_mem; })); 8264 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 8265 tmp_carry = CPU (h_cbit); 8266 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 8267 { 8268 SI opval = tmp_newval; 8269 SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval); 8270 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 8271 } 8272{ 8273 { 8274 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0)))); 8275 CPU (h_cbit) = opval; 8276 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 8277 } 8278 { 8279 BI opval = LTSI (tmp_newval, 0); 8280 CPU (h_nbit) = opval; 8281 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 8282 } 8283 { 8284 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 8285 CPU (h_zbit) = opval; 8286 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 8287 } 8288 { 8289 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 8290 CPU (h_vbit) = opval; 8291 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 8292 } 8293{ 8294 { 8295 BI opval = 0; 8296 CPU (h_xbit) = opval; 8297 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 8298 } 8299 { 8300 BI opval = 0; 8301 SET_H_INSN_PREFIXED_P (opval); 8302 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 8303 } 8304} 8305} 8306} 8307 8308 abuf->written = written; 8309#undef FLD 8310} 8311 NEXT (vpc); 8312 8313 CASE (sem, INSN_SUBUCBR) : /* [${Rs}${inc}],$Rd */ 8314{ 8315 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 8316 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 8317#define FLD(f) abuf->fields.sfmt_addcbr.f 8318 int UNUSED written = 0; 8319 IADDR UNUSED pc = abuf->addr; 8320 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 8321 8322{ 8323 SI tmp_tmpopd; 8324 SI tmp_tmpops; 8325 BI tmp_carry; 8326 SI tmp_newval; 8327 tmp_tmpops = ZEXTQISI (TRUNCSIQI (FLD (f_indir_pc__byte))); 8328 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 8329 tmp_carry = CPU (h_cbit); 8330 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 8331 { 8332 SI opval = tmp_newval; 8333 SET_H_GR (FLD (f_operand2), opval); 8334 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 8335 } 8336{ 8337 { 8338 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0)))); 8339 CPU (h_cbit) = opval; 8340 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 8341 } 8342 { 8343 BI opval = LTSI (tmp_newval, 0); 8344 CPU (h_nbit) = opval; 8345 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 8346 } 8347 { 8348 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 8349 CPU (h_zbit) = opval; 8350 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 8351 } 8352 { 8353 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 8354 CPU (h_vbit) = opval; 8355 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 8356 } 8357{ 8358 { 8359 BI opval = 0; 8360 CPU (h_xbit) = opval; 8361 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 8362 } 8363 { 8364 BI opval = 0; 8365 SET_H_INSN_PREFIXED_P (opval); 8366 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 8367 } 8368} 8369} 8370} 8371 8372#undef FLD 8373} 8374 NEXT (vpc); 8375 8376 CASE (sem, INSN_SUBUCWR) : /* [${Rs}${inc}],$Rd */ 8377{ 8378 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 8379 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 8380#define FLD(f) abuf->fields.sfmt_addcwr.f 8381 int UNUSED written = 0; 8382 IADDR UNUSED pc = abuf->addr; 8383 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 8384 8385{ 8386 SI tmp_tmpopd; 8387 SI tmp_tmpops; 8388 BI tmp_carry; 8389 SI tmp_newval; 8390 tmp_tmpops = ZEXTHISI (TRUNCSIHI (FLD (f_indir_pc__word))); 8391 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 8392 tmp_carry = CPU (h_cbit); 8393 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 8394 { 8395 SI opval = tmp_newval; 8396 SET_H_GR (FLD (f_operand2), opval); 8397 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 8398 } 8399{ 8400 { 8401 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0)))); 8402 CPU (h_cbit) = opval; 8403 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 8404 } 8405 { 8406 BI opval = LTSI (tmp_newval, 0); 8407 CPU (h_nbit) = opval; 8408 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 8409 } 8410 { 8411 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 8412 CPU (h_zbit) = opval; 8413 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 8414 } 8415 { 8416 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 8417 CPU (h_vbit) = opval; 8418 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 8419 } 8420{ 8421 { 8422 BI opval = 0; 8423 CPU (h_xbit) = opval; 8424 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 8425 } 8426 { 8427 BI opval = 0; 8428 SET_H_INSN_PREFIXED_P (opval); 8429 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 8430 } 8431} 8432} 8433} 8434 8435#undef FLD 8436} 8437 NEXT (vpc); 8438 8439 CASE (sem, INSN_ADDI_B_R) : /* addi.b ${Rs-dfield}.m,${Rd-sfield} */ 8440{ 8441 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 8442 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 8443#define FLD(f) abuf->fields.sfmt_bound_m_b_m.f 8444 int UNUSED written = 0; 8445 IADDR UNUSED pc = abuf->addr; 8446 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 8447 8448{ 8449 { 8450 SI opval = ADDSI (GET_H_GR (FLD (f_operand1)), MULSI (GET_H_GR (FLD (f_operand2)), 1)); 8451 SET_H_GR (FLD (f_operand1), opval); 8452 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 8453 } 8454{ 8455 { 8456 BI opval = 0; 8457 CPU (h_xbit) = opval; 8458 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 8459 } 8460 { 8461 BI opval = 0; 8462 SET_H_INSN_PREFIXED_P (opval); 8463 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 8464 } 8465} 8466} 8467 8468#undef FLD 8469} 8470 NEXT (vpc); 8471 8472 CASE (sem, INSN_ADDI_W_R) : /* addi.w ${Rs-dfield}.m,${Rd-sfield} */ 8473{ 8474 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 8475 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 8476#define FLD(f) abuf->fields.sfmt_bound_m_b_m.f 8477 int UNUSED written = 0; 8478 IADDR UNUSED pc = abuf->addr; 8479 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 8480 8481{ 8482 { 8483 SI opval = ADDSI (GET_H_GR (FLD (f_operand1)), MULSI (GET_H_GR (FLD (f_operand2)), 2)); 8484 SET_H_GR (FLD (f_operand1), opval); 8485 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 8486 } 8487{ 8488 { 8489 BI opval = 0; 8490 CPU (h_xbit) = opval; 8491 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 8492 } 8493 { 8494 BI opval = 0; 8495 SET_H_INSN_PREFIXED_P (opval); 8496 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 8497 } 8498} 8499} 8500 8501#undef FLD 8502} 8503 NEXT (vpc); 8504 8505 CASE (sem, INSN_ADDI_D_R) : /* addi.d ${Rs-dfield}.m,${Rd-sfield} */ 8506{ 8507 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 8508 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 8509#define FLD(f) abuf->fields.sfmt_bound_m_b_m.f 8510 int UNUSED written = 0; 8511 IADDR UNUSED pc = abuf->addr; 8512 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 8513 8514{ 8515 { 8516 SI opval = ADDSI (GET_H_GR (FLD (f_operand1)), MULSI (GET_H_GR (FLD (f_operand2)), 4)); 8517 SET_H_GR (FLD (f_operand1), opval); 8518 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 8519 } 8520{ 8521 { 8522 BI opval = 0; 8523 CPU (h_xbit) = opval; 8524 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 8525 } 8526 { 8527 BI opval = 0; 8528 SET_H_INSN_PREFIXED_P (opval); 8529 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 8530 } 8531} 8532} 8533 8534#undef FLD 8535} 8536 NEXT (vpc); 8537 8538 CASE (sem, INSN_NEG_B_R) : /* neg.b $Rs,$Rd */ 8539{ 8540 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 8541 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 8542#define FLD(f) abuf->fields.sfmt_add_b_r.f 8543 int UNUSED written = 0; 8544 IADDR UNUSED pc = abuf->addr; 8545 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 8546 8547{ 8548 QI tmp_tmpopd; 8549 QI tmp_tmpops; 8550 BI tmp_carry; 8551 QI tmp_newval; 8552 tmp_tmpops = GET_H_GR (FLD (f_operand1)); 8553 tmp_tmpopd = 0; 8554 tmp_carry = CPU (h_cbit); 8555 tmp_newval = SUBCQI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 8556{ 8557 SI tmp_oldregval; 8558 tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2)); 8559 { 8560 SI opval = ORSI (ANDSI (tmp_newval, 255), ANDSI (tmp_oldregval, 0xffffff00)); 8561 SET_H_GR (FLD (f_operand2), opval); 8562 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 8563 } 8564} 8565{ 8566 { 8567 BI opval = ORIF (ANDIF (LTQI (tmp_tmpops, 0), GEQI (tmp_tmpopd, 0)), ORIF (ANDIF (GEQI (tmp_tmpopd, 0), LTQI (tmp_newval, 0)), ANDIF (LTQI (tmp_tmpops, 0), LTQI (tmp_newval, 0)))); 8568 CPU (h_cbit) = opval; 8569 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 8570 } 8571 { 8572 BI opval = LTQI (tmp_newval, 0); 8573 CPU (h_nbit) = opval; 8574 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 8575 } 8576 { 8577 BI opval = ANDIF (EQQI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 8578 CPU (h_zbit) = opval; 8579 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 8580 } 8581 { 8582 BI opval = ORIF (ANDIF (ANDIF (GEQI (tmp_tmpops, 0), LTQI (tmp_tmpopd, 0)), GEQI (tmp_newval, 0)), ANDIF (ANDIF (LTQI (tmp_tmpops, 0), GEQI (tmp_tmpopd, 0)), LTQI (tmp_newval, 0))); 8583 CPU (h_vbit) = opval; 8584 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 8585 } 8586{ 8587 { 8588 BI opval = 0; 8589 CPU (h_xbit) = opval; 8590 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 8591 } 8592 { 8593 BI opval = 0; 8594 SET_H_INSN_PREFIXED_P (opval); 8595 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 8596 } 8597} 8598} 8599} 8600 8601#undef FLD 8602} 8603 NEXT (vpc); 8604 8605 CASE (sem, INSN_NEG_W_R) : /* neg.w $Rs,$Rd */ 8606{ 8607 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 8608 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 8609#define FLD(f) abuf->fields.sfmt_add_b_r.f 8610 int UNUSED written = 0; 8611 IADDR UNUSED pc = abuf->addr; 8612 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 8613 8614{ 8615 HI tmp_tmpopd; 8616 HI tmp_tmpops; 8617 BI tmp_carry; 8618 HI tmp_newval; 8619 tmp_tmpops = GET_H_GR (FLD (f_operand1)); 8620 tmp_tmpopd = 0; 8621 tmp_carry = CPU (h_cbit); 8622 tmp_newval = SUBCHI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 8623{ 8624 SI tmp_oldregval; 8625 tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2)); 8626 { 8627 SI opval = ORSI (ANDSI (tmp_newval, 65535), ANDSI (tmp_oldregval, 0xffff0000)); 8628 SET_H_GR (FLD (f_operand2), opval); 8629 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 8630 } 8631} 8632{ 8633 { 8634 BI opval = ORIF (ANDIF (LTHI (tmp_tmpops, 0), GEHI (tmp_tmpopd, 0)), ORIF (ANDIF (GEHI (tmp_tmpopd, 0), LTHI (tmp_newval, 0)), ANDIF (LTHI (tmp_tmpops, 0), LTHI (tmp_newval, 0)))); 8635 CPU (h_cbit) = opval; 8636 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 8637 } 8638 { 8639 BI opval = LTHI (tmp_newval, 0); 8640 CPU (h_nbit) = opval; 8641 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 8642 } 8643 { 8644 BI opval = ANDIF (EQHI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 8645 CPU (h_zbit) = opval; 8646 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 8647 } 8648 { 8649 BI opval = ORIF (ANDIF (ANDIF (GEHI (tmp_tmpops, 0), LTHI (tmp_tmpopd, 0)), GEHI (tmp_newval, 0)), ANDIF (ANDIF (LTHI (tmp_tmpops, 0), GEHI (tmp_tmpopd, 0)), LTHI (tmp_newval, 0))); 8650 CPU (h_vbit) = opval; 8651 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 8652 } 8653{ 8654 { 8655 BI opval = 0; 8656 CPU (h_xbit) = opval; 8657 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 8658 } 8659 { 8660 BI opval = 0; 8661 SET_H_INSN_PREFIXED_P (opval); 8662 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 8663 } 8664} 8665} 8666} 8667 8668#undef FLD 8669} 8670 NEXT (vpc); 8671 8672 CASE (sem, INSN_NEG_D_R) : /* neg.d $Rs,$Rd */ 8673{ 8674 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 8675 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 8676#define FLD(f) abuf->fields.sfmt_add_b_r.f 8677 int UNUSED written = 0; 8678 IADDR UNUSED pc = abuf->addr; 8679 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 8680 8681{ 8682 SI tmp_tmpopd; 8683 SI tmp_tmpops; 8684 BI tmp_carry; 8685 SI tmp_newval; 8686 tmp_tmpops = GET_H_GR (FLD (f_operand1)); 8687 tmp_tmpopd = 0; 8688 tmp_carry = CPU (h_cbit); 8689 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 8690 { 8691 SI opval = tmp_newval; 8692 SET_H_GR (FLD (f_operand2), opval); 8693 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 8694 } 8695{ 8696 { 8697 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0)))); 8698 CPU (h_cbit) = opval; 8699 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 8700 } 8701 { 8702 BI opval = LTSI (tmp_newval, 0); 8703 CPU (h_nbit) = opval; 8704 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 8705 } 8706 { 8707 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 8708 CPU (h_zbit) = opval; 8709 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 8710 } 8711 { 8712 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 8713 CPU (h_vbit) = opval; 8714 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 8715 } 8716{ 8717 { 8718 BI opval = 0; 8719 CPU (h_xbit) = opval; 8720 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 8721 } 8722 { 8723 BI opval = 0; 8724 SET_H_INSN_PREFIXED_P (opval); 8725 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 8726 } 8727} 8728} 8729} 8730 8731#undef FLD 8732} 8733 NEXT (vpc); 8734 8735 CASE (sem, INSN_TEST_M_B_M) : /* test-m.b [${Rs}${inc}] */ 8736{ 8737 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 8738 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 8739#define FLD(f) abuf->fields.sfmt_move_spr_mv10.f 8740 int UNUSED written = 0; 8741 IADDR UNUSED pc = abuf->addr; 8742 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 8743 8744{ 8745 QI tmp_tmpd; 8746 tmp_tmpd = ({ SI tmp_addr; 8747 QI tmp_tmp_mem; 8748 BI tmp_postinc; 8749 tmp_postinc = FLD (f_memmode); 8750; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32))); 8751; tmp_tmp_mem = GETMEMQI (current_cpu, pc, tmp_addr); 8752; if (NEBI (tmp_postinc, 0)) { 8753{ 8754if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 8755 tmp_addr = ADDSI (tmp_addr, 1); 8756} 8757 { 8758 SI opval = tmp_addr; 8759 SET_H_GR (FLD (f_operand1), opval); 8760 written |= (1 << 8); 8761 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 8762 } 8763} 8764} 8765; tmp_tmp_mem; }); 8766{ 8767 QI tmp_tmpopd; 8768 QI tmp_tmpops; 8769 BI tmp_carry; 8770 QI tmp_newval; 8771 tmp_tmpops = 0; 8772 tmp_tmpopd = tmp_tmpd; 8773 tmp_carry = CPU (h_cbit); 8774 tmp_newval = SUBCQI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 8775((void) 0); /*nop*/ 8776{ 8777 { 8778 BI opval = ORIF (ANDIF (LTQI (tmp_tmpops, 0), GEQI (tmp_tmpopd, 0)), ORIF (ANDIF (GEQI (tmp_tmpopd, 0), LTQI (tmp_newval, 0)), ANDIF (LTQI (tmp_tmpops, 0), LTQI (tmp_newval, 0)))); 8779 CPU (h_cbit) = opval; 8780 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 8781 } 8782 { 8783 BI opval = LTQI (tmp_newval, 0); 8784 CPU (h_nbit) = opval; 8785 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 8786 } 8787 { 8788 BI opval = ANDIF (EQQI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 8789 CPU (h_zbit) = opval; 8790 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 8791 } 8792 { 8793 BI opval = ORIF (ANDIF (ANDIF (GEQI (tmp_tmpops, 0), LTQI (tmp_tmpopd, 0)), GEQI (tmp_newval, 0)), ANDIF (ANDIF (LTQI (tmp_tmpops, 0), GEQI (tmp_tmpopd, 0)), LTQI (tmp_newval, 0))); 8794 CPU (h_vbit) = opval; 8795 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 8796 } 8797{ 8798 { 8799 BI opval = 0; 8800 CPU (h_xbit) = opval; 8801 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 8802 } 8803 { 8804 BI opval = 0; 8805 SET_H_INSN_PREFIXED_P (opval); 8806 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 8807 } 8808} 8809} 8810} 8811} 8812 8813 abuf->written = written; 8814#undef FLD 8815} 8816 NEXT (vpc); 8817 8818 CASE (sem, INSN_TEST_M_W_M) : /* test-m.w [${Rs}${inc}] */ 8819{ 8820 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 8821 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 8822#define FLD(f) abuf->fields.sfmt_move_spr_mv10.f 8823 int UNUSED written = 0; 8824 IADDR UNUSED pc = abuf->addr; 8825 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 8826 8827{ 8828 HI tmp_tmpd; 8829 tmp_tmpd = ({ SI tmp_addr; 8830 HI tmp_tmp_mem; 8831 BI tmp_postinc; 8832 tmp_postinc = FLD (f_memmode); 8833; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32))); 8834; tmp_tmp_mem = GETMEMHI (current_cpu, pc, tmp_addr); 8835; if (NEBI (tmp_postinc, 0)) { 8836{ 8837if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 8838 tmp_addr = ADDSI (tmp_addr, 2); 8839} 8840 { 8841 SI opval = tmp_addr; 8842 SET_H_GR (FLD (f_operand1), opval); 8843 written |= (1 << 8); 8844 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 8845 } 8846} 8847} 8848; tmp_tmp_mem; }); 8849{ 8850 HI tmp_tmpopd; 8851 HI tmp_tmpops; 8852 BI tmp_carry; 8853 HI tmp_newval; 8854 tmp_tmpops = 0; 8855 tmp_tmpopd = tmp_tmpd; 8856 tmp_carry = CPU (h_cbit); 8857 tmp_newval = SUBCHI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 8858((void) 0); /*nop*/ 8859{ 8860 { 8861 BI opval = ORIF (ANDIF (LTHI (tmp_tmpops, 0), GEHI (tmp_tmpopd, 0)), ORIF (ANDIF (GEHI (tmp_tmpopd, 0), LTHI (tmp_newval, 0)), ANDIF (LTHI (tmp_tmpops, 0), LTHI (tmp_newval, 0)))); 8862 CPU (h_cbit) = opval; 8863 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 8864 } 8865 { 8866 BI opval = LTHI (tmp_newval, 0); 8867 CPU (h_nbit) = opval; 8868 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 8869 } 8870 { 8871 BI opval = ANDIF (EQHI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 8872 CPU (h_zbit) = opval; 8873 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 8874 } 8875 { 8876 BI opval = ORIF (ANDIF (ANDIF (GEHI (tmp_tmpops, 0), LTHI (tmp_tmpopd, 0)), GEHI (tmp_newval, 0)), ANDIF (ANDIF (LTHI (tmp_tmpops, 0), GEHI (tmp_tmpopd, 0)), LTHI (tmp_newval, 0))); 8877 CPU (h_vbit) = opval; 8878 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 8879 } 8880{ 8881 { 8882 BI opval = 0; 8883 CPU (h_xbit) = opval; 8884 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 8885 } 8886 { 8887 BI opval = 0; 8888 SET_H_INSN_PREFIXED_P (opval); 8889 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 8890 } 8891} 8892} 8893} 8894} 8895 8896 abuf->written = written; 8897#undef FLD 8898} 8899 NEXT (vpc); 8900 8901 CASE (sem, INSN_TEST_M_D_M) : /* test-m.d [${Rs}${inc}] */ 8902{ 8903 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 8904 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 8905#define FLD(f) abuf->fields.sfmt_move_spr_mv10.f 8906 int UNUSED written = 0; 8907 IADDR UNUSED pc = abuf->addr; 8908 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 8909 8910{ 8911 SI tmp_tmpd; 8912 tmp_tmpd = ({ SI tmp_addr; 8913 SI tmp_tmp_mem; 8914 BI tmp_postinc; 8915 tmp_postinc = FLD (f_memmode); 8916; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32))); 8917; tmp_tmp_mem = GETMEMSI (current_cpu, pc, tmp_addr); 8918; if (NEBI (tmp_postinc, 0)) { 8919{ 8920if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 8921 tmp_addr = ADDSI (tmp_addr, 4); 8922} 8923 { 8924 SI opval = tmp_addr; 8925 SET_H_GR (FLD (f_operand1), opval); 8926 written |= (1 << 8); 8927 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 8928 } 8929} 8930} 8931; tmp_tmp_mem; }); 8932{ 8933 SI tmp_tmpopd; 8934 SI tmp_tmpops; 8935 BI tmp_carry; 8936 SI tmp_newval; 8937 tmp_tmpops = 0; 8938 tmp_tmpopd = tmp_tmpd; 8939 tmp_carry = CPU (h_cbit); 8940 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 8941((void) 0); /*nop*/ 8942{ 8943 { 8944 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0)))); 8945 CPU (h_cbit) = opval; 8946 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 8947 } 8948 { 8949 BI opval = LTSI (tmp_newval, 0); 8950 CPU (h_nbit) = opval; 8951 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 8952 } 8953 { 8954 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 8955 CPU (h_zbit) = opval; 8956 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 8957 } 8958 { 8959 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 8960 CPU (h_vbit) = opval; 8961 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 8962 } 8963{ 8964 { 8965 BI opval = 0; 8966 CPU (h_xbit) = opval; 8967 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 8968 } 8969 { 8970 BI opval = 0; 8971 SET_H_INSN_PREFIXED_P (opval); 8972 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 8973 } 8974} 8975} 8976} 8977} 8978 8979 abuf->written = written; 8980#undef FLD 8981} 8982 NEXT (vpc); 8983 8984 CASE (sem, INSN_MOVE_R_M_B_M) : /* move-r-m.b ${Rs-dfield},[${Rd-sfield}${inc}] */ 8985{ 8986 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 8987 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 8988#define FLD(f) abuf->fields.sfmt_bound_m_b_m.f 8989 int UNUSED written = 0; 8990 IADDR UNUSED pc = abuf->addr; 8991 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 8992 8993{ 8994 QI tmp_tmpd; 8995 tmp_tmpd = GET_H_GR (FLD (f_operand2)); 8996{ 8997 SI tmp_addr; 8998 BI tmp_postinc; 8999 tmp_postinc = FLD (f_memmode); 9000 tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32))); 9001if (ANDIF (GET_H_V32_NON_V32 (), NEBI (CPU (h_xbit), 0))) { 9002if (EQBI (CPU (h_pbit), 0)) { 9003{ 9004 { 9005 QI opval = tmp_tmpd; 9006 SETMEMQI (current_cpu, pc, tmp_addr, opval); 9007 written |= (1 << 10); 9008 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 9009 } 9010 { 9011 BI opval = CPU (h_pbit); 9012 CPU (h_cbit) = opval; 9013 written |= (1 << 9); 9014 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 9015 } 9016} 9017} else { 9018 { 9019 BI opval = 1; 9020 CPU (h_cbit) = opval; 9021 written |= (1 << 9); 9022 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 9023 } 9024} 9025} else { 9026 { 9027 QI opval = tmp_tmpd; 9028 SETMEMQI (current_cpu, pc, tmp_addr, opval); 9029 written |= (1 << 10); 9030 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 9031 } 9032} 9033if (NEBI (tmp_postinc, 0)) { 9034{ 9035if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 9036 tmp_addr = ADDSI (tmp_addr, 1); 9037} 9038 { 9039 SI opval = tmp_addr; 9040 SET_H_GR (FLD (f_operand1), opval); 9041 written |= (1 << 8); 9042 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 9043 } 9044} 9045} 9046} 9047{ 9048 { 9049 BI opval = 0; 9050 CPU (h_xbit) = opval; 9051 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 9052 } 9053 { 9054 BI opval = 0; 9055 SET_H_INSN_PREFIXED_P (opval); 9056 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 9057 } 9058} 9059} 9060 9061 abuf->written = written; 9062#undef FLD 9063} 9064 NEXT (vpc); 9065 9066 CASE (sem, INSN_MOVE_R_M_W_M) : /* move-r-m.w ${Rs-dfield},[${Rd-sfield}${inc}] */ 9067{ 9068 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 9069 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 9070#define FLD(f) abuf->fields.sfmt_bound_m_b_m.f 9071 int UNUSED written = 0; 9072 IADDR UNUSED pc = abuf->addr; 9073 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 9074 9075{ 9076 HI tmp_tmpd; 9077 tmp_tmpd = GET_H_GR (FLD (f_operand2)); 9078{ 9079 SI tmp_addr; 9080 BI tmp_postinc; 9081 tmp_postinc = FLD (f_memmode); 9082 tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32))); 9083if (ANDIF (GET_H_V32_NON_V32 (), NEBI (CPU (h_xbit), 0))) { 9084if (EQBI (CPU (h_pbit), 0)) { 9085{ 9086 { 9087 HI opval = tmp_tmpd; 9088 SETMEMHI (current_cpu, pc, tmp_addr, opval); 9089 written |= (1 << 10); 9090 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 9091 } 9092 { 9093 BI opval = CPU (h_pbit); 9094 CPU (h_cbit) = opval; 9095 written |= (1 << 9); 9096 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 9097 } 9098} 9099} else { 9100 { 9101 BI opval = 1; 9102 CPU (h_cbit) = opval; 9103 written |= (1 << 9); 9104 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 9105 } 9106} 9107} else { 9108 { 9109 HI opval = tmp_tmpd; 9110 SETMEMHI (current_cpu, pc, tmp_addr, opval); 9111 written |= (1 << 10); 9112 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 9113 } 9114} 9115if (NEBI (tmp_postinc, 0)) { 9116{ 9117if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 9118 tmp_addr = ADDSI (tmp_addr, 2); 9119} 9120 { 9121 SI opval = tmp_addr; 9122 SET_H_GR (FLD (f_operand1), opval); 9123 written |= (1 << 8); 9124 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 9125 } 9126} 9127} 9128} 9129{ 9130 { 9131 BI opval = 0; 9132 CPU (h_xbit) = opval; 9133 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 9134 } 9135 { 9136 BI opval = 0; 9137 SET_H_INSN_PREFIXED_P (opval); 9138 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 9139 } 9140} 9141} 9142 9143 abuf->written = written; 9144#undef FLD 9145} 9146 NEXT (vpc); 9147 9148 CASE (sem, INSN_MOVE_R_M_D_M) : /* move-r-m.d ${Rs-dfield},[${Rd-sfield}${inc}] */ 9149{ 9150 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 9151 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 9152#define FLD(f) abuf->fields.sfmt_bound_m_b_m.f 9153 int UNUSED written = 0; 9154 IADDR UNUSED pc = abuf->addr; 9155 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 9156 9157{ 9158 SI tmp_tmpd; 9159 tmp_tmpd = GET_H_GR (FLD (f_operand2)); 9160{ 9161 SI tmp_addr; 9162 BI tmp_postinc; 9163 tmp_postinc = FLD (f_memmode); 9164 tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32))); 9165if (ANDIF (GET_H_V32_NON_V32 (), NEBI (CPU (h_xbit), 0))) { 9166if (EQBI (CPU (h_pbit), 0)) { 9167{ 9168 { 9169 SI opval = tmp_tmpd; 9170 SETMEMSI (current_cpu, pc, tmp_addr, opval); 9171 written |= (1 << 10); 9172 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 9173 } 9174 { 9175 BI opval = CPU (h_pbit); 9176 CPU (h_cbit) = opval; 9177 written |= (1 << 9); 9178 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 9179 } 9180} 9181} else { 9182 { 9183 BI opval = 1; 9184 CPU (h_cbit) = opval; 9185 written |= (1 << 9); 9186 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 9187 } 9188} 9189} else { 9190 { 9191 SI opval = tmp_tmpd; 9192 SETMEMSI (current_cpu, pc, tmp_addr, opval); 9193 written |= (1 << 10); 9194 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 9195 } 9196} 9197if (NEBI (tmp_postinc, 0)) { 9198{ 9199if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 9200 tmp_addr = ADDSI (tmp_addr, 4); 9201} 9202 { 9203 SI opval = tmp_addr; 9204 SET_H_GR (FLD (f_operand1), opval); 9205 written |= (1 << 8); 9206 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 9207 } 9208} 9209} 9210} 9211{ 9212 { 9213 BI opval = 0; 9214 CPU (h_xbit) = opval; 9215 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 9216 } 9217 { 9218 BI opval = 0; 9219 SET_H_INSN_PREFIXED_P (opval); 9220 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 9221 } 9222} 9223} 9224 9225 abuf->written = written; 9226#undef FLD 9227} 9228 NEXT (vpc); 9229 9230 CASE (sem, INSN_MULS_B) : /* muls.b $Rs,$Rd */ 9231{ 9232 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 9233 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 9234#define FLD(f) abuf->fields.sfmt_muls_b.f 9235 int UNUSED written = 0; 9236 IADDR UNUSED pc = abuf->addr; 9237 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 9238 9239{ 9240 DI tmp_src1; 9241 DI tmp_src2; 9242 DI tmp_tmpr; 9243 tmp_src1 = EXTQIDI (TRUNCSIQI (GET_H_GR (FLD (f_operand1)))); 9244 tmp_src2 = EXTQIDI (TRUNCSIQI (GET_H_GR (FLD (f_operand2)))); 9245 tmp_tmpr = MULDI (tmp_src1, tmp_src2); 9246 { 9247 SI opval = TRUNCDISI (tmp_tmpr); 9248 SET_H_GR (FLD (f_operand2), opval); 9249 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 9250 } 9251 { 9252 SI opval = TRUNCDISI (SRLDI (tmp_tmpr, 32)); 9253 SET_H_SR (((UINT) 7), opval); 9254 TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval); 9255 } 9256{ 9257 { 9258 BI opval = ANDIF (GET_H_V32_NON_V32 (), CPU (h_cbit)); 9259 CPU (h_cbit) = opval; 9260 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 9261 } 9262 { 9263 BI opval = LTDI (tmp_tmpr, 0); 9264 CPU (h_nbit) = opval; 9265 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 9266 } 9267 { 9268 BI opval = ANDIF (EQDI (tmp_tmpr, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 9269 CPU (h_zbit) = opval; 9270 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 9271 } 9272 { 9273 BI opval = NEDI (tmp_tmpr, EXTSIDI (TRUNCDISI (tmp_tmpr))); 9274 CPU (h_vbit) = opval; 9275 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 9276 } 9277{ 9278 { 9279 BI opval = 0; 9280 CPU (h_xbit) = opval; 9281 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 9282 } 9283 { 9284 BI opval = 0; 9285 SET_H_INSN_PREFIXED_P (opval); 9286 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 9287 } 9288} 9289} 9290} 9291 9292#undef FLD 9293} 9294 NEXT (vpc); 9295 9296 CASE (sem, INSN_MULS_W) : /* muls.w $Rs,$Rd */ 9297{ 9298 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 9299 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 9300#define FLD(f) abuf->fields.sfmt_muls_b.f 9301 int UNUSED written = 0; 9302 IADDR UNUSED pc = abuf->addr; 9303 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 9304 9305{ 9306 DI tmp_src1; 9307 DI tmp_src2; 9308 DI tmp_tmpr; 9309 tmp_src1 = EXTHIDI (TRUNCSIHI (GET_H_GR (FLD (f_operand1)))); 9310 tmp_src2 = EXTHIDI (TRUNCSIHI (GET_H_GR (FLD (f_operand2)))); 9311 tmp_tmpr = MULDI (tmp_src1, tmp_src2); 9312 { 9313 SI opval = TRUNCDISI (tmp_tmpr); 9314 SET_H_GR (FLD (f_operand2), opval); 9315 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 9316 } 9317 { 9318 SI opval = TRUNCDISI (SRLDI (tmp_tmpr, 32)); 9319 SET_H_SR (((UINT) 7), opval); 9320 TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval); 9321 } 9322{ 9323 { 9324 BI opval = ANDIF (GET_H_V32_NON_V32 (), CPU (h_cbit)); 9325 CPU (h_cbit) = opval; 9326 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 9327 } 9328 { 9329 BI opval = LTDI (tmp_tmpr, 0); 9330 CPU (h_nbit) = opval; 9331 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 9332 } 9333 { 9334 BI opval = ANDIF (EQDI (tmp_tmpr, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 9335 CPU (h_zbit) = opval; 9336 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 9337 } 9338 { 9339 BI opval = NEDI (tmp_tmpr, EXTSIDI (TRUNCDISI (tmp_tmpr))); 9340 CPU (h_vbit) = opval; 9341 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 9342 } 9343{ 9344 { 9345 BI opval = 0; 9346 CPU (h_xbit) = opval; 9347 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 9348 } 9349 { 9350 BI opval = 0; 9351 SET_H_INSN_PREFIXED_P (opval); 9352 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 9353 } 9354} 9355} 9356} 9357 9358#undef FLD 9359} 9360 NEXT (vpc); 9361 9362 CASE (sem, INSN_MULS_D) : /* muls.d $Rs,$Rd */ 9363{ 9364 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 9365 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 9366#define FLD(f) abuf->fields.sfmt_muls_b.f 9367 int UNUSED written = 0; 9368 IADDR UNUSED pc = abuf->addr; 9369 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 9370 9371{ 9372 DI tmp_src1; 9373 DI tmp_src2; 9374 DI tmp_tmpr; 9375 tmp_src1 = EXTSIDI (TRUNCSISI (GET_H_GR (FLD (f_operand1)))); 9376 tmp_src2 = EXTSIDI (TRUNCSISI (GET_H_GR (FLD (f_operand2)))); 9377 tmp_tmpr = MULDI (tmp_src1, tmp_src2); 9378 { 9379 SI opval = TRUNCDISI (tmp_tmpr); 9380 SET_H_GR (FLD (f_operand2), opval); 9381 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 9382 } 9383 { 9384 SI opval = TRUNCDISI (SRLDI (tmp_tmpr, 32)); 9385 SET_H_SR (((UINT) 7), opval); 9386 TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval); 9387 } 9388{ 9389 { 9390 BI opval = ANDIF (GET_H_V32_NON_V32 (), CPU (h_cbit)); 9391 CPU (h_cbit) = opval; 9392 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 9393 } 9394 { 9395 BI opval = LTDI (tmp_tmpr, 0); 9396 CPU (h_nbit) = opval; 9397 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 9398 } 9399 { 9400 BI opval = ANDIF (EQDI (tmp_tmpr, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 9401 CPU (h_zbit) = opval; 9402 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 9403 } 9404 { 9405 BI opval = NEDI (tmp_tmpr, EXTSIDI (TRUNCDISI (tmp_tmpr))); 9406 CPU (h_vbit) = opval; 9407 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 9408 } 9409{ 9410 { 9411 BI opval = 0; 9412 CPU (h_xbit) = opval; 9413 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 9414 } 9415 { 9416 BI opval = 0; 9417 SET_H_INSN_PREFIXED_P (opval); 9418 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 9419 } 9420} 9421} 9422} 9423 9424#undef FLD 9425} 9426 NEXT (vpc); 9427 9428 CASE (sem, INSN_MULU_B) : /* mulu.b $Rs,$Rd */ 9429{ 9430 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 9431 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 9432#define FLD(f) abuf->fields.sfmt_muls_b.f 9433 int UNUSED written = 0; 9434 IADDR UNUSED pc = abuf->addr; 9435 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 9436 9437{ 9438 DI tmp_src1; 9439 DI tmp_src2; 9440 DI tmp_tmpr; 9441 tmp_src1 = ZEXTQIDI (TRUNCSIQI (GET_H_GR (FLD (f_operand1)))); 9442 tmp_src2 = ZEXTQIDI (TRUNCSIQI (GET_H_GR (FLD (f_operand2)))); 9443 tmp_tmpr = MULDI (tmp_src1, tmp_src2); 9444 { 9445 SI opval = TRUNCDISI (tmp_tmpr); 9446 SET_H_GR (FLD (f_operand2), opval); 9447 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 9448 } 9449 { 9450 SI opval = TRUNCDISI (SRLDI (tmp_tmpr, 32)); 9451 SET_H_SR (((UINT) 7), opval); 9452 TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval); 9453 } 9454{ 9455 { 9456 BI opval = ANDIF (GET_H_V32_NON_V32 (), CPU (h_cbit)); 9457 CPU (h_cbit) = opval; 9458 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 9459 } 9460 { 9461 BI opval = LTDI (tmp_tmpr, 0); 9462 CPU (h_nbit) = opval; 9463 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 9464 } 9465 { 9466 BI opval = ANDIF (EQDI (tmp_tmpr, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 9467 CPU (h_zbit) = opval; 9468 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 9469 } 9470 { 9471 BI opval = NEDI (tmp_tmpr, ZEXTSIDI (TRUNCDISI (tmp_tmpr))); 9472 CPU (h_vbit) = opval; 9473 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 9474 } 9475{ 9476 { 9477 BI opval = 0; 9478 CPU (h_xbit) = opval; 9479 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 9480 } 9481 { 9482 BI opval = 0; 9483 SET_H_INSN_PREFIXED_P (opval); 9484 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 9485 } 9486} 9487} 9488} 9489 9490#undef FLD 9491} 9492 NEXT (vpc); 9493 9494 CASE (sem, INSN_MULU_W) : /* mulu.w $Rs,$Rd */ 9495{ 9496 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 9497 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 9498#define FLD(f) abuf->fields.sfmt_muls_b.f 9499 int UNUSED written = 0; 9500 IADDR UNUSED pc = abuf->addr; 9501 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 9502 9503{ 9504 DI tmp_src1; 9505 DI tmp_src2; 9506 DI tmp_tmpr; 9507 tmp_src1 = ZEXTHIDI (TRUNCSIHI (GET_H_GR (FLD (f_operand1)))); 9508 tmp_src2 = ZEXTHIDI (TRUNCSIHI (GET_H_GR (FLD (f_operand2)))); 9509 tmp_tmpr = MULDI (tmp_src1, tmp_src2); 9510 { 9511 SI opval = TRUNCDISI (tmp_tmpr); 9512 SET_H_GR (FLD (f_operand2), opval); 9513 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 9514 } 9515 { 9516 SI opval = TRUNCDISI (SRLDI (tmp_tmpr, 32)); 9517 SET_H_SR (((UINT) 7), opval); 9518 TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval); 9519 } 9520{ 9521 { 9522 BI opval = ANDIF (GET_H_V32_NON_V32 (), CPU (h_cbit)); 9523 CPU (h_cbit) = opval; 9524 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 9525 } 9526 { 9527 BI opval = LTDI (tmp_tmpr, 0); 9528 CPU (h_nbit) = opval; 9529 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 9530 } 9531 { 9532 BI opval = ANDIF (EQDI (tmp_tmpr, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 9533 CPU (h_zbit) = opval; 9534 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 9535 } 9536 { 9537 BI opval = NEDI (tmp_tmpr, ZEXTSIDI (TRUNCDISI (tmp_tmpr))); 9538 CPU (h_vbit) = opval; 9539 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 9540 } 9541{ 9542 { 9543 BI opval = 0; 9544 CPU (h_xbit) = opval; 9545 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 9546 } 9547 { 9548 BI opval = 0; 9549 SET_H_INSN_PREFIXED_P (opval); 9550 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 9551 } 9552} 9553} 9554} 9555 9556#undef FLD 9557} 9558 NEXT (vpc); 9559 9560 CASE (sem, INSN_MULU_D) : /* mulu.d $Rs,$Rd */ 9561{ 9562 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 9563 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 9564#define FLD(f) abuf->fields.sfmt_muls_b.f 9565 int UNUSED written = 0; 9566 IADDR UNUSED pc = abuf->addr; 9567 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 9568 9569{ 9570 DI tmp_src1; 9571 DI tmp_src2; 9572 DI tmp_tmpr; 9573 tmp_src1 = ZEXTSIDI (TRUNCSISI (GET_H_GR (FLD (f_operand1)))); 9574 tmp_src2 = ZEXTSIDI (TRUNCSISI (GET_H_GR (FLD (f_operand2)))); 9575 tmp_tmpr = MULDI (tmp_src1, tmp_src2); 9576 { 9577 SI opval = TRUNCDISI (tmp_tmpr); 9578 SET_H_GR (FLD (f_operand2), opval); 9579 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 9580 } 9581 { 9582 SI opval = TRUNCDISI (SRLDI (tmp_tmpr, 32)); 9583 SET_H_SR (((UINT) 7), opval); 9584 TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval); 9585 } 9586{ 9587 { 9588 BI opval = ANDIF (GET_H_V32_NON_V32 (), CPU (h_cbit)); 9589 CPU (h_cbit) = opval; 9590 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 9591 } 9592 { 9593 BI opval = LTDI (tmp_tmpr, 0); 9594 CPU (h_nbit) = opval; 9595 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 9596 } 9597 { 9598 BI opval = ANDIF (EQDI (tmp_tmpr, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 9599 CPU (h_zbit) = opval; 9600 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 9601 } 9602 { 9603 BI opval = NEDI (tmp_tmpr, ZEXTSIDI (TRUNCDISI (tmp_tmpr))); 9604 CPU (h_vbit) = opval; 9605 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 9606 } 9607{ 9608 { 9609 BI opval = 0; 9610 CPU (h_xbit) = opval; 9611 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 9612 } 9613 { 9614 BI opval = 0; 9615 SET_H_INSN_PREFIXED_P (opval); 9616 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 9617 } 9618} 9619} 9620} 9621 9622#undef FLD 9623} 9624 NEXT (vpc); 9625 9626 CASE (sem, INSN_MSTEP) : /* mstep $Rs,$Rd */ 9627{ 9628 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 9629 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 9630#define FLD(f) abuf->fields.sfmt_muls_b.f 9631 int UNUSED written = 0; 9632 IADDR UNUSED pc = abuf->addr; 9633 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 9634 9635{ 9636 SI tmp_tmpd; 9637 SI tmp_tmps; 9638 tmp_tmps = GET_H_GR (FLD (f_operand1)); 9639 tmp_tmpd = ADDSI (SLLSI (GET_H_GR (FLD (f_operand2)), 1), ((CPU (h_nbit)) ? (tmp_tmps) : (0))); 9640 { 9641 SI opval = tmp_tmpd; 9642 SET_H_GR (FLD (f_operand2), opval); 9643 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 9644 } 9645{ 9646 { 9647 BI opval = LTSI (tmp_tmpd, 0); 9648 CPU (h_nbit) = opval; 9649 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 9650 } 9651 { 9652 BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 9653 CPU (h_zbit) = opval; 9654 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 9655 } 9656SET_H_CBIT_MOVE (0); 9657SET_H_VBIT_MOVE (0); 9658{ 9659 { 9660 BI opval = 0; 9661 CPU (h_xbit) = opval; 9662 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 9663 } 9664 { 9665 BI opval = 0; 9666 SET_H_INSN_PREFIXED_P (opval); 9667 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 9668 } 9669} 9670} 9671} 9672 9673#undef FLD 9674} 9675 NEXT (vpc); 9676 9677 CASE (sem, INSN_DSTEP) : /* dstep $Rs,$Rd */ 9678{ 9679 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 9680 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 9681#define FLD(f) abuf->fields.sfmt_muls_b.f 9682 int UNUSED written = 0; 9683 IADDR UNUSED pc = abuf->addr; 9684 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 9685 9686{ 9687 SI tmp_tmp; 9688 SI tmp_tmps; 9689 SI tmp_tmpd; 9690 tmp_tmps = GET_H_GR (FLD (f_operand1)); 9691 tmp_tmp = SLLSI (GET_H_GR (FLD (f_operand2)), 1); 9692 tmp_tmpd = ((GEUSI (tmp_tmp, tmp_tmps)) ? (SUBSI (tmp_tmp, tmp_tmps)) : (tmp_tmp)); 9693 { 9694 SI opval = tmp_tmpd; 9695 SET_H_GR (FLD (f_operand2), opval); 9696 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 9697 } 9698{ 9699 { 9700 BI opval = LTSI (tmp_tmpd, 0); 9701 CPU (h_nbit) = opval; 9702 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 9703 } 9704 { 9705 BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 9706 CPU (h_zbit) = opval; 9707 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 9708 } 9709SET_H_CBIT_MOVE (0); 9710SET_H_VBIT_MOVE (0); 9711{ 9712 { 9713 BI opval = 0; 9714 CPU (h_xbit) = opval; 9715 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 9716 } 9717 { 9718 BI opval = 0; 9719 SET_H_INSN_PREFIXED_P (opval); 9720 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 9721 } 9722} 9723} 9724} 9725 9726#undef FLD 9727} 9728 NEXT (vpc); 9729 9730 CASE (sem, INSN_ABS) : /* abs $Rs,$Rd */ 9731{ 9732 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 9733 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 9734#define FLD(f) abuf->fields.sfmt_muls_b.f 9735 int UNUSED written = 0; 9736 IADDR UNUSED pc = abuf->addr; 9737 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 9738 9739{ 9740 SI tmp_tmpd; 9741 tmp_tmpd = ABSSI (GET_H_GR (FLD (f_operand1))); 9742 { 9743 SI opval = tmp_tmpd; 9744 SET_H_GR (FLD (f_operand2), opval); 9745 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 9746 } 9747{ 9748 { 9749 BI opval = LTSI (tmp_tmpd, 0); 9750 CPU (h_nbit) = opval; 9751 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 9752 } 9753 { 9754 BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 9755 CPU (h_zbit) = opval; 9756 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 9757 } 9758SET_H_CBIT_MOVE (0); 9759SET_H_VBIT_MOVE (0); 9760{ 9761 { 9762 BI opval = 0; 9763 CPU (h_xbit) = opval; 9764 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 9765 } 9766 { 9767 BI opval = 0; 9768 SET_H_INSN_PREFIXED_P (opval); 9769 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 9770 } 9771} 9772} 9773} 9774 9775#undef FLD 9776} 9777 NEXT (vpc); 9778 9779 CASE (sem, INSN_AND_B_R) : /* and.b $Rs,$Rd */ 9780{ 9781 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 9782 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 9783#define FLD(f) abuf->fields.sfmt_add_b_r.f 9784 int UNUSED written = 0; 9785 IADDR UNUSED pc = abuf->addr; 9786 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 9787 9788{ 9789 QI tmp_tmpd; 9790 tmp_tmpd = ANDQI (GET_H_GR (FLD (f_operand2)), GET_H_GR (FLD (f_operand1))); 9791{ 9792 SI tmp_oldregval; 9793 tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2)); 9794 { 9795 SI opval = ORSI (ANDSI (tmp_tmpd, 255), ANDSI (tmp_oldregval, 0xffffff00)); 9796 SET_H_GR (FLD (f_operand2), opval); 9797 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 9798 } 9799} 9800{ 9801 { 9802 BI opval = LTQI (tmp_tmpd, 0); 9803 CPU (h_nbit) = opval; 9804 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 9805 } 9806 { 9807 BI opval = ANDIF (EQQI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 9808 CPU (h_zbit) = opval; 9809 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 9810 } 9811SET_H_CBIT_MOVE (0); 9812SET_H_VBIT_MOVE (0); 9813{ 9814 { 9815 BI opval = 0; 9816 CPU (h_xbit) = opval; 9817 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 9818 } 9819 { 9820 BI opval = 0; 9821 SET_H_INSN_PREFIXED_P (opval); 9822 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 9823 } 9824} 9825} 9826} 9827 9828#undef FLD 9829} 9830 NEXT (vpc); 9831 9832 CASE (sem, INSN_AND_W_R) : /* and.w $Rs,$Rd */ 9833{ 9834 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 9835 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 9836#define FLD(f) abuf->fields.sfmt_add_b_r.f 9837 int UNUSED written = 0; 9838 IADDR UNUSED pc = abuf->addr; 9839 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 9840 9841{ 9842 HI tmp_tmpd; 9843 tmp_tmpd = ANDHI (GET_H_GR (FLD (f_operand2)), GET_H_GR (FLD (f_operand1))); 9844{ 9845 SI tmp_oldregval; 9846 tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2)); 9847 { 9848 SI opval = ORSI (ANDSI (tmp_tmpd, 65535), ANDSI (tmp_oldregval, 0xffff0000)); 9849 SET_H_GR (FLD (f_operand2), opval); 9850 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 9851 } 9852} 9853{ 9854 { 9855 BI opval = LTHI (tmp_tmpd, 0); 9856 CPU (h_nbit) = opval; 9857 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 9858 } 9859 { 9860 BI opval = ANDIF (EQHI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 9861 CPU (h_zbit) = opval; 9862 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 9863 } 9864SET_H_CBIT_MOVE (0); 9865SET_H_VBIT_MOVE (0); 9866{ 9867 { 9868 BI opval = 0; 9869 CPU (h_xbit) = opval; 9870 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 9871 } 9872 { 9873 BI opval = 0; 9874 SET_H_INSN_PREFIXED_P (opval); 9875 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 9876 } 9877} 9878} 9879} 9880 9881#undef FLD 9882} 9883 NEXT (vpc); 9884 9885 CASE (sem, INSN_AND_D_R) : /* and.d $Rs,$Rd */ 9886{ 9887 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 9888 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 9889#define FLD(f) abuf->fields.sfmt_add_b_r.f 9890 int UNUSED written = 0; 9891 IADDR UNUSED pc = abuf->addr; 9892 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 9893 9894{ 9895 SI tmp_tmpd; 9896 tmp_tmpd = ANDSI (GET_H_GR (FLD (f_operand2)), GET_H_GR (FLD (f_operand1))); 9897 { 9898 SI opval = tmp_tmpd; 9899 SET_H_GR (FLD (f_operand2), opval); 9900 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 9901 } 9902{ 9903 { 9904 BI opval = LTSI (tmp_tmpd, 0); 9905 CPU (h_nbit) = opval; 9906 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 9907 } 9908 { 9909 BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 9910 CPU (h_zbit) = opval; 9911 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 9912 } 9913SET_H_CBIT_MOVE (0); 9914SET_H_VBIT_MOVE (0); 9915{ 9916 { 9917 BI opval = 0; 9918 CPU (h_xbit) = opval; 9919 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 9920 } 9921 { 9922 BI opval = 0; 9923 SET_H_INSN_PREFIXED_P (opval); 9924 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 9925 } 9926} 9927} 9928} 9929 9930#undef FLD 9931} 9932 NEXT (vpc); 9933 9934 CASE (sem, INSN_AND_M_B_M) : /* and-m.b [${Rs}${inc}],${Rd} */ 9935{ 9936 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 9937 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 9938#define FLD(f) abuf->fields.sfmt_add_m_b_m.f 9939 int UNUSED written = 0; 9940 IADDR UNUSED pc = abuf->addr; 9941 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 9942 9943{ 9944 QI tmp_tmpd; 9945 tmp_tmpd = ANDQI (GET_H_GR (FLD (f_operand2)), ({ SI tmp_addr; 9946 QI tmp_tmp_mem; 9947 BI tmp_postinc; 9948 tmp_postinc = FLD (f_memmode); 9949; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32))); 9950; tmp_tmp_mem = GETMEMQI (current_cpu, pc, tmp_addr); 9951; if (NEBI (tmp_postinc, 0)) { 9952{ 9953if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 9954 tmp_addr = ADDSI (tmp_addr, 1); 9955} 9956 { 9957 SI opval = tmp_addr; 9958 SET_H_GR (FLD (f_operand1), opval); 9959 written |= (1 << 11); 9960 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 9961 } 9962} 9963} 9964; tmp_tmp_mem; })); 9965{ 9966 SI tmp_oldregval; 9967 tmp_oldregval = GET_H_RAW_GR_PC (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2)))); 9968 { 9969 SI opval = ORSI (ANDSI (tmp_tmpd, 255), ANDSI (tmp_oldregval, 0xffffff00)); 9970 SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval); 9971 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 9972 } 9973} 9974{ 9975 { 9976 BI opval = LTQI (tmp_tmpd, 0); 9977 CPU (h_nbit) = opval; 9978 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 9979 } 9980 { 9981 BI opval = ANDIF (EQQI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 9982 CPU (h_zbit) = opval; 9983 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 9984 } 9985SET_H_CBIT_MOVE (0); 9986SET_H_VBIT_MOVE (0); 9987{ 9988 { 9989 BI opval = 0; 9990 CPU (h_xbit) = opval; 9991 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 9992 } 9993 { 9994 BI opval = 0; 9995 SET_H_INSN_PREFIXED_P (opval); 9996 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 9997 } 9998} 9999} 10000} 10001 10002 abuf->written = written; 10003#undef FLD 10004} 10005 NEXT (vpc); 10006 10007 CASE (sem, INSN_AND_M_W_M) : /* and-m.w [${Rs}${inc}],${Rd} */ 10008{ 10009 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 10010 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 10011#define FLD(f) abuf->fields.sfmt_add_m_b_m.f 10012 int UNUSED written = 0; 10013 IADDR UNUSED pc = abuf->addr; 10014 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 10015 10016{ 10017 HI tmp_tmpd; 10018 tmp_tmpd = ANDHI (GET_H_GR (FLD (f_operand2)), ({ SI tmp_addr; 10019 HI tmp_tmp_mem; 10020 BI tmp_postinc; 10021 tmp_postinc = FLD (f_memmode); 10022; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32))); 10023; tmp_tmp_mem = GETMEMHI (current_cpu, pc, tmp_addr); 10024; if (NEBI (tmp_postinc, 0)) { 10025{ 10026if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 10027 tmp_addr = ADDSI (tmp_addr, 2); 10028} 10029 { 10030 SI opval = tmp_addr; 10031 SET_H_GR (FLD (f_operand1), opval); 10032 written |= (1 << 11); 10033 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 10034 } 10035} 10036} 10037; tmp_tmp_mem; })); 10038{ 10039 SI tmp_oldregval; 10040 tmp_oldregval = GET_H_RAW_GR_PC (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2)))); 10041 { 10042 SI opval = ORSI (ANDSI (tmp_tmpd, 65535), ANDSI (tmp_oldregval, 0xffff0000)); 10043 SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval); 10044 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 10045 } 10046} 10047{ 10048 { 10049 BI opval = LTHI (tmp_tmpd, 0); 10050 CPU (h_nbit) = opval; 10051 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 10052 } 10053 { 10054 BI opval = ANDIF (EQHI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 10055 CPU (h_zbit) = opval; 10056 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 10057 } 10058SET_H_CBIT_MOVE (0); 10059SET_H_VBIT_MOVE (0); 10060{ 10061 { 10062 BI opval = 0; 10063 CPU (h_xbit) = opval; 10064 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 10065 } 10066 { 10067 BI opval = 0; 10068 SET_H_INSN_PREFIXED_P (opval); 10069 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 10070 } 10071} 10072} 10073} 10074 10075 abuf->written = written; 10076#undef FLD 10077} 10078 NEXT (vpc); 10079 10080 CASE (sem, INSN_AND_M_D_M) : /* and-m.d [${Rs}${inc}],${Rd} */ 10081{ 10082 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 10083 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 10084#define FLD(f) abuf->fields.sfmt_add_m_b_m.f 10085 int UNUSED written = 0; 10086 IADDR UNUSED pc = abuf->addr; 10087 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 10088 10089{ 10090 SI tmp_tmpd; 10091 tmp_tmpd = ANDSI (GET_H_GR (FLD (f_operand2)), ({ SI tmp_addr; 10092 SI tmp_tmp_mem; 10093 BI tmp_postinc; 10094 tmp_postinc = FLD (f_memmode); 10095; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32))); 10096; tmp_tmp_mem = GETMEMSI (current_cpu, pc, tmp_addr); 10097; if (NEBI (tmp_postinc, 0)) { 10098{ 10099if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 10100 tmp_addr = ADDSI (tmp_addr, 4); 10101} 10102 { 10103 SI opval = tmp_addr; 10104 SET_H_GR (FLD (f_operand1), opval); 10105 written |= (1 << 10); 10106 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 10107 } 10108} 10109} 10110; tmp_tmp_mem; })); 10111 { 10112 SI opval = tmp_tmpd; 10113 SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval); 10114 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 10115 } 10116{ 10117 { 10118 BI opval = LTSI (tmp_tmpd, 0); 10119 CPU (h_nbit) = opval; 10120 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 10121 } 10122 { 10123 BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 10124 CPU (h_zbit) = opval; 10125 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 10126 } 10127SET_H_CBIT_MOVE (0); 10128SET_H_VBIT_MOVE (0); 10129{ 10130 { 10131 BI opval = 0; 10132 CPU (h_xbit) = opval; 10133 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 10134 } 10135 { 10136 BI opval = 0; 10137 SET_H_INSN_PREFIXED_P (opval); 10138 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 10139 } 10140} 10141} 10142} 10143 10144 abuf->written = written; 10145#undef FLD 10146} 10147 NEXT (vpc); 10148 10149 CASE (sem, INSN_ANDCBR) : /* and.b ${sconst8}],${Rd} */ 10150{ 10151 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 10152 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 10153#define FLD(f) abuf->fields.sfmt_addcbr.f 10154 int UNUSED written = 0; 10155 IADDR UNUSED pc = abuf->addr; 10156 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 10157 10158{ 10159 QI tmp_tmpd; 10160 tmp_tmpd = ANDQI (GET_H_GR (FLD (f_operand2)), FLD (f_indir_pc__byte)); 10161{ 10162 SI tmp_oldregval; 10163 tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2)); 10164 { 10165 SI opval = ORSI (ANDSI (tmp_tmpd, 255), ANDSI (tmp_oldregval, 0xffffff00)); 10166 SET_H_GR (FLD (f_operand2), opval); 10167 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 10168 } 10169} 10170{ 10171 { 10172 BI opval = LTQI (tmp_tmpd, 0); 10173 CPU (h_nbit) = opval; 10174 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 10175 } 10176 { 10177 BI opval = ANDIF (EQQI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 10178 CPU (h_zbit) = opval; 10179 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 10180 } 10181SET_H_CBIT_MOVE (0); 10182SET_H_VBIT_MOVE (0); 10183{ 10184 { 10185 BI opval = 0; 10186 CPU (h_xbit) = opval; 10187 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 10188 } 10189 { 10190 BI opval = 0; 10191 SET_H_INSN_PREFIXED_P (opval); 10192 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 10193 } 10194} 10195} 10196} 10197 10198#undef FLD 10199} 10200 NEXT (vpc); 10201 10202 CASE (sem, INSN_ANDCWR) : /* and.w ${sconst16}],${Rd} */ 10203{ 10204 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 10205 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 10206#define FLD(f) abuf->fields.sfmt_addcwr.f 10207 int UNUSED written = 0; 10208 IADDR UNUSED pc = abuf->addr; 10209 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 10210 10211{ 10212 HI tmp_tmpd; 10213 tmp_tmpd = ANDHI (GET_H_GR (FLD (f_operand2)), FLD (f_indir_pc__word)); 10214{ 10215 SI tmp_oldregval; 10216 tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2)); 10217 { 10218 SI opval = ORSI (ANDSI (tmp_tmpd, 65535), ANDSI (tmp_oldregval, 0xffff0000)); 10219 SET_H_GR (FLD (f_operand2), opval); 10220 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 10221 } 10222} 10223{ 10224 { 10225 BI opval = LTHI (tmp_tmpd, 0); 10226 CPU (h_nbit) = opval; 10227 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 10228 } 10229 { 10230 BI opval = ANDIF (EQHI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 10231 CPU (h_zbit) = opval; 10232 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 10233 } 10234SET_H_CBIT_MOVE (0); 10235SET_H_VBIT_MOVE (0); 10236{ 10237 { 10238 BI opval = 0; 10239 CPU (h_xbit) = opval; 10240 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 10241 } 10242 { 10243 BI opval = 0; 10244 SET_H_INSN_PREFIXED_P (opval); 10245 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 10246 } 10247} 10248} 10249} 10250 10251#undef FLD 10252} 10253 NEXT (vpc); 10254 10255 CASE (sem, INSN_ANDCDR) : /* and.d ${const32}],${Rd} */ 10256{ 10257 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 10258 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 10259#define FLD(f) abuf->fields.sfmt_addcdr.f 10260 int UNUSED written = 0; 10261 IADDR UNUSED pc = abuf->addr; 10262 vpc = SEM_NEXT_VPC (sem_arg, pc, 6); 10263 10264{ 10265 SI tmp_tmpd; 10266 tmp_tmpd = ANDSI (GET_H_GR (FLD (f_operand2)), FLD (f_indir_pc__dword)); 10267 { 10268 SI opval = tmp_tmpd; 10269 SET_H_GR (FLD (f_operand2), opval); 10270 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 10271 } 10272{ 10273 { 10274 BI opval = LTSI (tmp_tmpd, 0); 10275 CPU (h_nbit) = opval; 10276 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 10277 } 10278 { 10279 BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 10280 CPU (h_zbit) = opval; 10281 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 10282 } 10283SET_H_CBIT_MOVE (0); 10284SET_H_VBIT_MOVE (0); 10285{ 10286 { 10287 BI opval = 0; 10288 CPU (h_xbit) = opval; 10289 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 10290 } 10291 { 10292 BI opval = 0; 10293 SET_H_INSN_PREFIXED_P (opval); 10294 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 10295 } 10296} 10297} 10298} 10299 10300#undef FLD 10301} 10302 NEXT (vpc); 10303 10304 CASE (sem, INSN_ANDQ) : /* andq $i,$Rd */ 10305{ 10306 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 10307 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 10308#define FLD(f) abuf->fields.sfmt_andq.f 10309 int UNUSED written = 0; 10310 IADDR UNUSED pc = abuf->addr; 10311 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 10312 10313{ 10314 SI tmp_tmpd; 10315 tmp_tmpd = ANDSI (GET_H_GR (FLD (f_operand2)), FLD (f_s6)); 10316 { 10317 SI opval = tmp_tmpd; 10318 SET_H_GR (FLD (f_operand2), opval); 10319 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 10320 } 10321{ 10322 { 10323 BI opval = LTSI (tmp_tmpd, 0); 10324 CPU (h_nbit) = opval; 10325 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 10326 } 10327 { 10328 BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 10329 CPU (h_zbit) = opval; 10330 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 10331 } 10332SET_H_CBIT_MOVE (0); 10333SET_H_VBIT_MOVE (0); 10334{ 10335 { 10336 BI opval = 0; 10337 CPU (h_xbit) = opval; 10338 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 10339 } 10340 { 10341 BI opval = 0; 10342 SET_H_INSN_PREFIXED_P (opval); 10343 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 10344 } 10345} 10346} 10347} 10348 10349#undef FLD 10350} 10351 NEXT (vpc); 10352 10353 CASE (sem, INSN_ORR_B_R) : /* orr.b $Rs,$Rd */ 10354{ 10355 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 10356 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 10357#define FLD(f) abuf->fields.sfmt_add_b_r.f 10358 int UNUSED written = 0; 10359 IADDR UNUSED pc = abuf->addr; 10360 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 10361 10362{ 10363 QI tmp_tmpd; 10364 tmp_tmpd = ORQI (GET_H_GR (FLD (f_operand2)), GET_H_GR (FLD (f_operand1))); 10365{ 10366 SI tmp_oldregval; 10367 tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2)); 10368 { 10369 SI opval = ORSI (ANDSI (tmp_tmpd, 255), ANDSI (tmp_oldregval, 0xffffff00)); 10370 SET_H_GR (FLD (f_operand2), opval); 10371 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 10372 } 10373} 10374{ 10375 { 10376 BI opval = LTQI (tmp_tmpd, 0); 10377 CPU (h_nbit) = opval; 10378 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 10379 } 10380 { 10381 BI opval = ANDIF (EQQI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 10382 CPU (h_zbit) = opval; 10383 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 10384 } 10385SET_H_CBIT_MOVE (0); 10386SET_H_VBIT_MOVE (0); 10387{ 10388 { 10389 BI opval = 0; 10390 CPU (h_xbit) = opval; 10391 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 10392 } 10393 { 10394 BI opval = 0; 10395 SET_H_INSN_PREFIXED_P (opval); 10396 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 10397 } 10398} 10399} 10400} 10401 10402#undef FLD 10403} 10404 NEXT (vpc); 10405 10406 CASE (sem, INSN_ORR_W_R) : /* orr.w $Rs,$Rd */ 10407{ 10408 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 10409 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 10410#define FLD(f) abuf->fields.sfmt_add_b_r.f 10411 int UNUSED written = 0; 10412 IADDR UNUSED pc = abuf->addr; 10413 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 10414 10415{ 10416 HI tmp_tmpd; 10417 tmp_tmpd = ORHI (GET_H_GR (FLD (f_operand2)), GET_H_GR (FLD (f_operand1))); 10418{ 10419 SI tmp_oldregval; 10420 tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2)); 10421 { 10422 SI opval = ORSI (ANDSI (tmp_tmpd, 65535), ANDSI (tmp_oldregval, 0xffff0000)); 10423 SET_H_GR (FLD (f_operand2), opval); 10424 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 10425 } 10426} 10427{ 10428 { 10429 BI opval = LTHI (tmp_tmpd, 0); 10430 CPU (h_nbit) = opval; 10431 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 10432 } 10433 { 10434 BI opval = ANDIF (EQHI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 10435 CPU (h_zbit) = opval; 10436 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 10437 } 10438SET_H_CBIT_MOVE (0); 10439SET_H_VBIT_MOVE (0); 10440{ 10441 { 10442 BI opval = 0; 10443 CPU (h_xbit) = opval; 10444 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 10445 } 10446 { 10447 BI opval = 0; 10448 SET_H_INSN_PREFIXED_P (opval); 10449 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 10450 } 10451} 10452} 10453} 10454 10455#undef FLD 10456} 10457 NEXT (vpc); 10458 10459 CASE (sem, INSN_ORR_D_R) : /* orr.d $Rs,$Rd */ 10460{ 10461 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 10462 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 10463#define FLD(f) abuf->fields.sfmt_add_b_r.f 10464 int UNUSED written = 0; 10465 IADDR UNUSED pc = abuf->addr; 10466 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 10467 10468{ 10469 SI tmp_tmpd; 10470 tmp_tmpd = ORSI (GET_H_GR (FLD (f_operand2)), GET_H_GR (FLD (f_operand1))); 10471 { 10472 SI opval = tmp_tmpd; 10473 SET_H_GR (FLD (f_operand2), opval); 10474 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 10475 } 10476{ 10477 { 10478 BI opval = LTSI (tmp_tmpd, 0); 10479 CPU (h_nbit) = opval; 10480 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 10481 } 10482 { 10483 BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 10484 CPU (h_zbit) = opval; 10485 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 10486 } 10487SET_H_CBIT_MOVE (0); 10488SET_H_VBIT_MOVE (0); 10489{ 10490 { 10491 BI opval = 0; 10492 CPU (h_xbit) = opval; 10493 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 10494 } 10495 { 10496 BI opval = 0; 10497 SET_H_INSN_PREFIXED_P (opval); 10498 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 10499 } 10500} 10501} 10502} 10503 10504#undef FLD 10505} 10506 NEXT (vpc); 10507 10508 CASE (sem, INSN_OR_M_B_M) : /* or-m.b [${Rs}${inc}],${Rd} */ 10509{ 10510 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 10511 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 10512#define FLD(f) abuf->fields.sfmt_add_m_b_m.f 10513 int UNUSED written = 0; 10514 IADDR UNUSED pc = abuf->addr; 10515 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 10516 10517{ 10518 QI tmp_tmpd; 10519 tmp_tmpd = ORQI (GET_H_GR (FLD (f_operand2)), ({ SI tmp_addr; 10520 QI tmp_tmp_mem; 10521 BI tmp_postinc; 10522 tmp_postinc = FLD (f_memmode); 10523; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32))); 10524; tmp_tmp_mem = GETMEMQI (current_cpu, pc, tmp_addr); 10525; if (NEBI (tmp_postinc, 0)) { 10526{ 10527if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 10528 tmp_addr = ADDSI (tmp_addr, 1); 10529} 10530 { 10531 SI opval = tmp_addr; 10532 SET_H_GR (FLD (f_operand1), opval); 10533 written |= (1 << 11); 10534 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 10535 } 10536} 10537} 10538; tmp_tmp_mem; })); 10539{ 10540 SI tmp_oldregval; 10541 tmp_oldregval = GET_H_RAW_GR_PC (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2)))); 10542 { 10543 SI opval = ORSI (ANDSI (tmp_tmpd, 255), ANDSI (tmp_oldregval, 0xffffff00)); 10544 SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval); 10545 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 10546 } 10547} 10548{ 10549 { 10550 BI opval = LTQI (tmp_tmpd, 0); 10551 CPU (h_nbit) = opval; 10552 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 10553 } 10554 { 10555 BI opval = ANDIF (EQQI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 10556 CPU (h_zbit) = opval; 10557 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 10558 } 10559SET_H_CBIT_MOVE (0); 10560SET_H_VBIT_MOVE (0); 10561{ 10562 { 10563 BI opval = 0; 10564 CPU (h_xbit) = opval; 10565 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 10566 } 10567 { 10568 BI opval = 0; 10569 SET_H_INSN_PREFIXED_P (opval); 10570 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 10571 } 10572} 10573} 10574} 10575 10576 abuf->written = written; 10577#undef FLD 10578} 10579 NEXT (vpc); 10580 10581 CASE (sem, INSN_OR_M_W_M) : /* or-m.w [${Rs}${inc}],${Rd} */ 10582{ 10583 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 10584 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 10585#define FLD(f) abuf->fields.sfmt_add_m_b_m.f 10586 int UNUSED written = 0; 10587 IADDR UNUSED pc = abuf->addr; 10588 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 10589 10590{ 10591 HI tmp_tmpd; 10592 tmp_tmpd = ORHI (GET_H_GR (FLD (f_operand2)), ({ SI tmp_addr; 10593 HI tmp_tmp_mem; 10594 BI tmp_postinc; 10595 tmp_postinc = FLD (f_memmode); 10596; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32))); 10597; tmp_tmp_mem = GETMEMHI (current_cpu, pc, tmp_addr); 10598; if (NEBI (tmp_postinc, 0)) { 10599{ 10600if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 10601 tmp_addr = ADDSI (tmp_addr, 2); 10602} 10603 { 10604 SI opval = tmp_addr; 10605 SET_H_GR (FLD (f_operand1), opval); 10606 written |= (1 << 11); 10607 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 10608 } 10609} 10610} 10611; tmp_tmp_mem; })); 10612{ 10613 SI tmp_oldregval; 10614 tmp_oldregval = GET_H_RAW_GR_PC (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2)))); 10615 { 10616 SI opval = ORSI (ANDSI (tmp_tmpd, 65535), ANDSI (tmp_oldregval, 0xffff0000)); 10617 SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval); 10618 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 10619 } 10620} 10621{ 10622 { 10623 BI opval = LTHI (tmp_tmpd, 0); 10624 CPU (h_nbit) = opval; 10625 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 10626 } 10627 { 10628 BI opval = ANDIF (EQHI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 10629 CPU (h_zbit) = opval; 10630 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 10631 } 10632SET_H_CBIT_MOVE (0); 10633SET_H_VBIT_MOVE (0); 10634{ 10635 { 10636 BI opval = 0; 10637 CPU (h_xbit) = opval; 10638 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 10639 } 10640 { 10641 BI opval = 0; 10642 SET_H_INSN_PREFIXED_P (opval); 10643 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 10644 } 10645} 10646} 10647} 10648 10649 abuf->written = written; 10650#undef FLD 10651} 10652 NEXT (vpc); 10653 10654 CASE (sem, INSN_OR_M_D_M) : /* or-m.d [${Rs}${inc}],${Rd} */ 10655{ 10656 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 10657 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 10658#define FLD(f) abuf->fields.sfmt_add_m_b_m.f 10659 int UNUSED written = 0; 10660 IADDR UNUSED pc = abuf->addr; 10661 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 10662 10663{ 10664 SI tmp_tmpd; 10665 tmp_tmpd = ORSI (GET_H_GR (FLD (f_operand2)), ({ SI tmp_addr; 10666 SI tmp_tmp_mem; 10667 BI tmp_postinc; 10668 tmp_postinc = FLD (f_memmode); 10669; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32))); 10670; tmp_tmp_mem = GETMEMSI (current_cpu, pc, tmp_addr); 10671; if (NEBI (tmp_postinc, 0)) { 10672{ 10673if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 10674 tmp_addr = ADDSI (tmp_addr, 4); 10675} 10676 { 10677 SI opval = tmp_addr; 10678 SET_H_GR (FLD (f_operand1), opval); 10679 written |= (1 << 10); 10680 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 10681 } 10682} 10683} 10684; tmp_tmp_mem; })); 10685 { 10686 SI opval = tmp_tmpd; 10687 SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval); 10688 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 10689 } 10690{ 10691 { 10692 BI opval = LTSI (tmp_tmpd, 0); 10693 CPU (h_nbit) = opval; 10694 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 10695 } 10696 { 10697 BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 10698 CPU (h_zbit) = opval; 10699 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 10700 } 10701SET_H_CBIT_MOVE (0); 10702SET_H_VBIT_MOVE (0); 10703{ 10704 { 10705 BI opval = 0; 10706 CPU (h_xbit) = opval; 10707 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 10708 } 10709 { 10710 BI opval = 0; 10711 SET_H_INSN_PREFIXED_P (opval); 10712 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 10713 } 10714} 10715} 10716} 10717 10718 abuf->written = written; 10719#undef FLD 10720} 10721 NEXT (vpc); 10722 10723 CASE (sem, INSN_ORCBR) : /* or.b ${sconst8}],${Rd} */ 10724{ 10725 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 10726 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 10727#define FLD(f) abuf->fields.sfmt_addcbr.f 10728 int UNUSED written = 0; 10729 IADDR UNUSED pc = abuf->addr; 10730 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 10731 10732{ 10733 QI tmp_tmpd; 10734 tmp_tmpd = ORQI (GET_H_GR (FLD (f_operand2)), FLD (f_indir_pc__byte)); 10735{ 10736 SI tmp_oldregval; 10737 tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2)); 10738 { 10739 SI opval = ORSI (ANDSI (tmp_tmpd, 255), ANDSI (tmp_oldregval, 0xffffff00)); 10740 SET_H_GR (FLD (f_operand2), opval); 10741 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 10742 } 10743} 10744{ 10745 { 10746 BI opval = LTQI (tmp_tmpd, 0); 10747 CPU (h_nbit) = opval; 10748 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 10749 } 10750 { 10751 BI opval = ANDIF (EQQI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 10752 CPU (h_zbit) = opval; 10753 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 10754 } 10755SET_H_CBIT_MOVE (0); 10756SET_H_VBIT_MOVE (0); 10757{ 10758 { 10759 BI opval = 0; 10760 CPU (h_xbit) = opval; 10761 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 10762 } 10763 { 10764 BI opval = 0; 10765 SET_H_INSN_PREFIXED_P (opval); 10766 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 10767 } 10768} 10769} 10770} 10771 10772#undef FLD 10773} 10774 NEXT (vpc); 10775 10776 CASE (sem, INSN_ORCWR) : /* or.w ${sconst16}],${Rd} */ 10777{ 10778 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 10779 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 10780#define FLD(f) abuf->fields.sfmt_addcwr.f 10781 int UNUSED written = 0; 10782 IADDR UNUSED pc = abuf->addr; 10783 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 10784 10785{ 10786 HI tmp_tmpd; 10787 tmp_tmpd = ORHI (GET_H_GR (FLD (f_operand2)), FLD (f_indir_pc__word)); 10788{ 10789 SI tmp_oldregval; 10790 tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2)); 10791 { 10792 SI opval = ORSI (ANDSI (tmp_tmpd, 65535), ANDSI (tmp_oldregval, 0xffff0000)); 10793 SET_H_GR (FLD (f_operand2), opval); 10794 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 10795 } 10796} 10797{ 10798 { 10799 BI opval = LTHI (tmp_tmpd, 0); 10800 CPU (h_nbit) = opval; 10801 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 10802 } 10803 { 10804 BI opval = ANDIF (EQHI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 10805 CPU (h_zbit) = opval; 10806 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 10807 } 10808SET_H_CBIT_MOVE (0); 10809SET_H_VBIT_MOVE (0); 10810{ 10811 { 10812 BI opval = 0; 10813 CPU (h_xbit) = opval; 10814 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 10815 } 10816 { 10817 BI opval = 0; 10818 SET_H_INSN_PREFIXED_P (opval); 10819 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 10820 } 10821} 10822} 10823} 10824 10825#undef FLD 10826} 10827 NEXT (vpc); 10828 10829 CASE (sem, INSN_ORCDR) : /* or.d ${const32}],${Rd} */ 10830{ 10831 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 10832 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 10833#define FLD(f) abuf->fields.sfmt_addcdr.f 10834 int UNUSED written = 0; 10835 IADDR UNUSED pc = abuf->addr; 10836 vpc = SEM_NEXT_VPC (sem_arg, pc, 6); 10837 10838{ 10839 SI tmp_tmpd; 10840 tmp_tmpd = ORSI (GET_H_GR (FLD (f_operand2)), FLD (f_indir_pc__dword)); 10841 { 10842 SI opval = tmp_tmpd; 10843 SET_H_GR (FLD (f_operand2), opval); 10844 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 10845 } 10846{ 10847 { 10848 BI opval = LTSI (tmp_tmpd, 0); 10849 CPU (h_nbit) = opval; 10850 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 10851 } 10852 { 10853 BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 10854 CPU (h_zbit) = opval; 10855 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 10856 } 10857SET_H_CBIT_MOVE (0); 10858SET_H_VBIT_MOVE (0); 10859{ 10860 { 10861 BI opval = 0; 10862 CPU (h_xbit) = opval; 10863 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 10864 } 10865 { 10866 BI opval = 0; 10867 SET_H_INSN_PREFIXED_P (opval); 10868 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 10869 } 10870} 10871} 10872} 10873 10874#undef FLD 10875} 10876 NEXT (vpc); 10877 10878 CASE (sem, INSN_ORQ) : /* orq $i,$Rd */ 10879{ 10880 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 10881 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 10882#define FLD(f) abuf->fields.sfmt_andq.f 10883 int UNUSED written = 0; 10884 IADDR UNUSED pc = abuf->addr; 10885 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 10886 10887{ 10888 SI tmp_tmpd; 10889 tmp_tmpd = ORSI (GET_H_GR (FLD (f_operand2)), FLD (f_s6)); 10890 { 10891 SI opval = tmp_tmpd; 10892 SET_H_GR (FLD (f_operand2), opval); 10893 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 10894 } 10895{ 10896 { 10897 BI opval = LTSI (tmp_tmpd, 0); 10898 CPU (h_nbit) = opval; 10899 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 10900 } 10901 { 10902 BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 10903 CPU (h_zbit) = opval; 10904 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 10905 } 10906SET_H_CBIT_MOVE (0); 10907SET_H_VBIT_MOVE (0); 10908{ 10909 { 10910 BI opval = 0; 10911 CPU (h_xbit) = opval; 10912 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 10913 } 10914 { 10915 BI opval = 0; 10916 SET_H_INSN_PREFIXED_P (opval); 10917 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 10918 } 10919} 10920} 10921} 10922 10923#undef FLD 10924} 10925 NEXT (vpc); 10926 10927 CASE (sem, INSN_XOR) : /* xor $Rs,$Rd */ 10928{ 10929 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 10930 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 10931#define FLD(f) abuf->fields.sfmt_muls_b.f 10932 int UNUSED written = 0; 10933 IADDR UNUSED pc = abuf->addr; 10934 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 10935 10936{ 10937 SI tmp_tmpd; 10938 tmp_tmpd = XORSI (GET_H_GR (FLD (f_operand2)), GET_H_GR (FLD (f_operand1))); 10939 { 10940 SI opval = tmp_tmpd; 10941 SET_H_GR (FLD (f_operand2), opval); 10942 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 10943 } 10944{ 10945 { 10946 BI opval = LTSI (tmp_tmpd, 0); 10947 CPU (h_nbit) = opval; 10948 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 10949 } 10950 { 10951 BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 10952 CPU (h_zbit) = opval; 10953 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 10954 } 10955SET_H_CBIT_MOVE (0); 10956SET_H_VBIT_MOVE (0); 10957{ 10958 { 10959 BI opval = 0; 10960 CPU (h_xbit) = opval; 10961 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 10962 } 10963 { 10964 BI opval = 0; 10965 SET_H_INSN_PREFIXED_P (opval); 10966 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 10967 } 10968} 10969} 10970} 10971 10972#undef FLD 10973} 10974 NEXT (vpc); 10975 10976 CASE (sem, INSN_SWAP) : /* swap${swapoption} ${Rs} */ 10977{ 10978 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 10979 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 10980#define FLD(f) abuf->fields.sfmt_move_spr_mv10.f 10981 int UNUSED written = 0; 10982 IADDR UNUSED pc = abuf->addr; 10983 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 10984 10985{ 10986 SI tmp_tmps; 10987 SI tmp_tmpd; 10988 tmp_tmps = GET_H_GR (FLD (f_operand1)); 10989 tmp_tmpd = ({ SI tmp_tmpcode; 10990 SI tmp_tmpval; 10991 SI tmp_tmpres; 10992 tmp_tmpcode = FLD (f_operand2); 10993; tmp_tmpval = tmp_tmps; 10994; if (EQSI (tmp_tmpcode, 0)) { 10995 tmp_tmpres = (cgen_rtx_error (current_cpu, "SWAP without swap modifier isn't implemented"), 0); 10996} 10997 else if (EQSI (tmp_tmpcode, 1)) { 10998 tmp_tmpres = ({ SI tmp_tmpr; 10999 tmp_tmpr = tmp_tmpval; 11000; ORSI (SLLSI (ANDSI (tmp_tmpr, 16843009), 7), ORSI (SLLSI (ANDSI (tmp_tmpr, 33686018), 5), ORSI (SLLSI (ANDSI (tmp_tmpr, 67372036), 3), ORSI (SLLSI (ANDSI (tmp_tmpr, 134744072), 1), ORSI (SRLSI (ANDSI (tmp_tmpr, 269488144), 1), ORSI (SRLSI (ANDSI (tmp_tmpr, 538976288), 3), ORSI (SRLSI (ANDSI (tmp_tmpr, 1077952576), 5), SRLSI (ANDSI (tmp_tmpr, 0x80808080), 7)))))))); }); 11001} 11002 else if (EQSI (tmp_tmpcode, 2)) { 11003 tmp_tmpres = ({ SI tmp_tmpb; 11004 tmp_tmpb = tmp_tmpval; 11005; ORSI (ANDSI (SLLSI (tmp_tmpb, 8), 0xff00ff00), ANDSI (SRLSI (tmp_tmpb, 8), 16711935)); }); 11006} 11007 else if (EQSI (tmp_tmpcode, 3)) { 11008 tmp_tmpres = ({ SI tmp_tmpr; 11009 tmp_tmpr = ({ SI tmp_tmpb; 11010 tmp_tmpb = tmp_tmpval; 11011; ORSI (ANDSI (SLLSI (tmp_tmpb, 8), 0xff00ff00), ANDSI (SRLSI (tmp_tmpb, 8), 16711935)); }); 11012; ORSI (SLLSI (ANDSI (tmp_tmpr, 16843009), 7), ORSI (SLLSI (ANDSI (tmp_tmpr, 33686018), 5), ORSI (SLLSI (ANDSI (tmp_tmpr, 67372036), 3), ORSI (SLLSI (ANDSI (tmp_tmpr, 134744072), 1), ORSI (SRLSI (ANDSI (tmp_tmpr, 269488144), 1), ORSI (SRLSI (ANDSI (tmp_tmpr, 538976288), 3), ORSI (SRLSI (ANDSI (tmp_tmpr, 1077952576), 5), SRLSI (ANDSI (tmp_tmpr, 0x80808080), 7)))))))); }); 11013} 11014 else if (EQSI (tmp_tmpcode, 4)) { 11015 tmp_tmpres = ({ SI tmp_tmpb; 11016 tmp_tmpb = tmp_tmpval; 11017; ORSI (ANDSI (SLLSI (tmp_tmpb, 16), 0xffff0000), ANDSI (SRLSI (tmp_tmpb, 16), 65535)); }); 11018} 11019 else if (EQSI (tmp_tmpcode, 5)) { 11020 tmp_tmpres = ({ SI tmp_tmpr; 11021 tmp_tmpr = ({ SI tmp_tmpb; 11022 tmp_tmpb = tmp_tmpval; 11023; ORSI (ANDSI (SLLSI (tmp_tmpb, 16), 0xffff0000), ANDSI (SRLSI (tmp_tmpb, 16), 65535)); }); 11024; ORSI (SLLSI (ANDSI (tmp_tmpr, 16843009), 7), ORSI (SLLSI (ANDSI (tmp_tmpr, 33686018), 5), ORSI (SLLSI (ANDSI (tmp_tmpr, 67372036), 3), ORSI (SLLSI (ANDSI (tmp_tmpr, 134744072), 1), ORSI (SRLSI (ANDSI (tmp_tmpr, 269488144), 1), ORSI (SRLSI (ANDSI (tmp_tmpr, 538976288), 3), ORSI (SRLSI (ANDSI (tmp_tmpr, 1077952576), 5), SRLSI (ANDSI (tmp_tmpr, 0x80808080), 7)))))))); }); 11025} 11026 else if (EQSI (tmp_tmpcode, 6)) { 11027 tmp_tmpres = ({ SI tmp_tmpb; 11028 tmp_tmpb = ({ SI tmp_tmpb; 11029 tmp_tmpb = tmp_tmpval; 11030; ORSI (ANDSI (SLLSI (tmp_tmpb, 16), 0xffff0000), ANDSI (SRLSI (tmp_tmpb, 16), 65535)); }); 11031; ORSI (ANDSI (SLLSI (tmp_tmpb, 8), 0xff00ff00), ANDSI (SRLSI (tmp_tmpb, 8), 16711935)); }); 11032} 11033 else if (EQSI (tmp_tmpcode, 7)) { 11034 tmp_tmpres = ({ SI tmp_tmpr; 11035 tmp_tmpr = ({ SI tmp_tmpb; 11036 tmp_tmpb = ({ SI tmp_tmpb; 11037 tmp_tmpb = tmp_tmpval; 11038; ORSI (ANDSI (SLLSI (tmp_tmpb, 16), 0xffff0000), ANDSI (SRLSI (tmp_tmpb, 16), 65535)); }); 11039; ORSI (ANDSI (SLLSI (tmp_tmpb, 8), 0xff00ff00), ANDSI (SRLSI (tmp_tmpb, 8), 16711935)); }); 11040; ORSI (SLLSI (ANDSI (tmp_tmpr, 16843009), 7), ORSI (SLLSI (ANDSI (tmp_tmpr, 33686018), 5), ORSI (SLLSI (ANDSI (tmp_tmpr, 67372036), 3), ORSI (SLLSI (ANDSI (tmp_tmpr, 134744072), 1), ORSI (SRLSI (ANDSI (tmp_tmpr, 269488144), 1), ORSI (SRLSI (ANDSI (tmp_tmpr, 538976288), 3), ORSI (SRLSI (ANDSI (tmp_tmpr, 1077952576), 5), SRLSI (ANDSI (tmp_tmpr, 0x80808080), 7)))))))); }); 11041} 11042 else if (EQSI (tmp_tmpcode, 8)) { 11043 tmp_tmpres = INVSI (tmp_tmpval); 11044} 11045 else if (EQSI (tmp_tmpcode, 9)) { 11046 tmp_tmpres = ({ SI tmp_tmpr; 11047 tmp_tmpr = INVSI (tmp_tmpval); 11048; ORSI (SLLSI (ANDSI (tmp_tmpr, 16843009), 7), ORSI (SLLSI (ANDSI (tmp_tmpr, 33686018), 5), ORSI (SLLSI (ANDSI (tmp_tmpr, 67372036), 3), ORSI (SLLSI (ANDSI (tmp_tmpr, 134744072), 1), ORSI (SRLSI (ANDSI (tmp_tmpr, 269488144), 1), ORSI (SRLSI (ANDSI (tmp_tmpr, 538976288), 3), ORSI (SRLSI (ANDSI (tmp_tmpr, 1077952576), 5), SRLSI (ANDSI (tmp_tmpr, 0x80808080), 7)))))))); }); 11049} 11050 else if (EQSI (tmp_tmpcode, 10)) { 11051 tmp_tmpres = ({ SI tmp_tmpb; 11052 tmp_tmpb = INVSI (tmp_tmpval); 11053; ORSI (ANDSI (SLLSI (tmp_tmpb, 8), 0xff00ff00), ANDSI (SRLSI (tmp_tmpb, 8), 16711935)); }); 11054} 11055 else if (EQSI (tmp_tmpcode, 11)) { 11056 tmp_tmpres = ({ SI tmp_tmpr; 11057 tmp_tmpr = ({ SI tmp_tmpb; 11058 tmp_tmpb = INVSI (tmp_tmpval); 11059; ORSI (ANDSI (SLLSI (tmp_tmpb, 8), 0xff00ff00), ANDSI (SRLSI (tmp_tmpb, 8), 16711935)); }); 11060; ORSI (SLLSI (ANDSI (tmp_tmpr, 16843009), 7), ORSI (SLLSI (ANDSI (tmp_tmpr, 33686018), 5), ORSI (SLLSI (ANDSI (tmp_tmpr, 67372036), 3), ORSI (SLLSI (ANDSI (tmp_tmpr, 134744072), 1), ORSI (SRLSI (ANDSI (tmp_tmpr, 269488144), 1), ORSI (SRLSI (ANDSI (tmp_tmpr, 538976288), 3), ORSI (SRLSI (ANDSI (tmp_tmpr, 1077952576), 5), SRLSI (ANDSI (tmp_tmpr, 0x80808080), 7)))))))); }); 11061} 11062 else if (EQSI (tmp_tmpcode, 12)) { 11063 tmp_tmpres = ({ SI tmp_tmpb; 11064 tmp_tmpb = INVSI (tmp_tmpval); 11065; ORSI (ANDSI (SLLSI (tmp_tmpb, 16), 0xffff0000), ANDSI (SRLSI (tmp_tmpb, 16), 65535)); }); 11066} 11067 else if (EQSI (tmp_tmpcode, 13)) { 11068 tmp_tmpres = ({ SI tmp_tmpr; 11069 tmp_tmpr = ({ SI tmp_tmpb; 11070 tmp_tmpb = INVSI (tmp_tmpval); 11071; ORSI (ANDSI (SLLSI (tmp_tmpb, 16), 0xffff0000), ANDSI (SRLSI (tmp_tmpb, 16), 65535)); }); 11072; ORSI (SLLSI (ANDSI (tmp_tmpr, 16843009), 7), ORSI (SLLSI (ANDSI (tmp_tmpr, 33686018), 5), ORSI (SLLSI (ANDSI (tmp_tmpr, 67372036), 3), ORSI (SLLSI (ANDSI (tmp_tmpr, 134744072), 1), ORSI (SRLSI (ANDSI (tmp_tmpr, 269488144), 1), ORSI (SRLSI (ANDSI (tmp_tmpr, 538976288), 3), ORSI (SRLSI (ANDSI (tmp_tmpr, 1077952576), 5), SRLSI (ANDSI (tmp_tmpr, 0x80808080), 7)))))))); }); 11073} 11074 else if (EQSI (tmp_tmpcode, 14)) { 11075 tmp_tmpres = ({ SI tmp_tmpb; 11076 tmp_tmpb = ({ SI tmp_tmpb; 11077 tmp_tmpb = INVSI (tmp_tmpval); 11078; ORSI (ANDSI (SLLSI (tmp_tmpb, 16), 0xffff0000), ANDSI (SRLSI (tmp_tmpb, 16), 65535)); }); 11079; ORSI (ANDSI (SLLSI (tmp_tmpb, 8), 0xff00ff00), ANDSI (SRLSI (tmp_tmpb, 8), 16711935)); }); 11080} 11081 else if (EQSI (tmp_tmpcode, 15)) { 11082 tmp_tmpres = ({ SI tmp_tmpr; 11083 tmp_tmpr = ({ SI tmp_tmpb; 11084 tmp_tmpb = ({ SI tmp_tmpb; 11085 tmp_tmpb = INVSI (tmp_tmpval); 11086; ORSI (ANDSI (SLLSI (tmp_tmpb, 16), 0xffff0000), ANDSI (SRLSI (tmp_tmpb, 16), 65535)); }); 11087; ORSI (ANDSI (SLLSI (tmp_tmpb, 8), 0xff00ff00), ANDSI (SRLSI (tmp_tmpb, 8), 16711935)); }); 11088; ORSI (SLLSI (ANDSI (tmp_tmpr, 16843009), 7), ORSI (SLLSI (ANDSI (tmp_tmpr, 33686018), 5), ORSI (SLLSI (ANDSI (tmp_tmpr, 67372036), 3), ORSI (SLLSI (ANDSI (tmp_tmpr, 134744072), 1), ORSI (SRLSI (ANDSI (tmp_tmpr, 269488144), 1), ORSI (SRLSI (ANDSI (tmp_tmpr, 538976288), 3), ORSI (SRLSI (ANDSI (tmp_tmpr, 1077952576), 5), SRLSI (ANDSI (tmp_tmpr, 0x80808080), 7)))))))); }); 11089} 11090; tmp_tmpres; }); 11091 { 11092 SI opval = tmp_tmpd; 11093 SET_H_GR (FLD (f_operand1), opval); 11094 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 11095 } 11096{ 11097 { 11098 BI opval = LTSI (tmp_tmpd, 0); 11099 CPU (h_nbit) = opval; 11100 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 11101 } 11102 { 11103 BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 11104 CPU (h_zbit) = opval; 11105 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 11106 } 11107SET_H_CBIT_MOVE (0); 11108SET_H_VBIT_MOVE (0); 11109{ 11110 { 11111 BI opval = 0; 11112 CPU (h_xbit) = opval; 11113 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 11114 } 11115 { 11116 BI opval = 0; 11117 SET_H_INSN_PREFIXED_P (opval); 11118 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 11119 } 11120} 11121} 11122} 11123 11124#undef FLD 11125} 11126 NEXT (vpc); 11127 11128 CASE (sem, INSN_ASRR_B_R) : /* asrr.b $Rs,$Rd */ 11129{ 11130 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 11131 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 11132#define FLD(f) abuf->fields.sfmt_add_b_r.f 11133 int UNUSED written = 0; 11134 IADDR UNUSED pc = abuf->addr; 11135 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 11136 11137{ 11138 QI tmp_tmpd; 11139 SI tmp_cnt1; 11140 SI tmp_cnt2; 11141 tmp_cnt1 = GET_H_GR (FLD (f_operand1)); 11142 tmp_cnt2 = ((NESI (ANDSI (tmp_cnt1, 32), 0)) ? (31) : (ANDSI (tmp_cnt1, 31))); 11143 tmp_tmpd = SRASI (EXTQISI (TRUNCSIQI (GET_H_GR (FLD (f_operand2)))), tmp_cnt2); 11144{ 11145 SI tmp_oldregval; 11146 tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2)); 11147 { 11148 SI opval = ORSI (ANDSI (tmp_tmpd, 255), ANDSI (tmp_oldregval, 0xffffff00)); 11149 SET_H_GR (FLD (f_operand2), opval); 11150 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 11151 } 11152} 11153{ 11154 { 11155 BI opval = LTQI (tmp_tmpd, 0); 11156 CPU (h_nbit) = opval; 11157 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 11158 } 11159 { 11160 BI opval = ANDIF (EQQI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 11161 CPU (h_zbit) = opval; 11162 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 11163 } 11164SET_H_CBIT_MOVE (0); 11165SET_H_VBIT_MOVE (0); 11166{ 11167 { 11168 BI opval = 0; 11169 CPU (h_xbit) = opval; 11170 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 11171 } 11172 { 11173 BI opval = 0; 11174 SET_H_INSN_PREFIXED_P (opval); 11175 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 11176 } 11177} 11178} 11179} 11180 11181#undef FLD 11182} 11183 NEXT (vpc); 11184 11185 CASE (sem, INSN_ASRR_W_R) : /* asrr.w $Rs,$Rd */ 11186{ 11187 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 11188 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 11189#define FLD(f) abuf->fields.sfmt_add_b_r.f 11190 int UNUSED written = 0; 11191 IADDR UNUSED pc = abuf->addr; 11192 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 11193 11194{ 11195 HI tmp_tmpd; 11196 SI tmp_cnt1; 11197 SI tmp_cnt2; 11198 tmp_cnt1 = GET_H_GR (FLD (f_operand1)); 11199 tmp_cnt2 = ((NESI (ANDSI (tmp_cnt1, 32), 0)) ? (31) : (ANDSI (tmp_cnt1, 31))); 11200 tmp_tmpd = SRASI (EXTHISI (TRUNCSIHI (GET_H_GR (FLD (f_operand2)))), tmp_cnt2); 11201{ 11202 SI tmp_oldregval; 11203 tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2)); 11204 { 11205 SI opval = ORSI (ANDSI (tmp_tmpd, 65535), ANDSI (tmp_oldregval, 0xffff0000)); 11206 SET_H_GR (FLD (f_operand2), opval); 11207 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 11208 } 11209} 11210{ 11211 { 11212 BI opval = LTHI (tmp_tmpd, 0); 11213 CPU (h_nbit) = opval; 11214 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 11215 } 11216 { 11217 BI opval = ANDIF (EQHI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 11218 CPU (h_zbit) = opval; 11219 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 11220 } 11221SET_H_CBIT_MOVE (0); 11222SET_H_VBIT_MOVE (0); 11223{ 11224 { 11225 BI opval = 0; 11226 CPU (h_xbit) = opval; 11227 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 11228 } 11229 { 11230 BI opval = 0; 11231 SET_H_INSN_PREFIXED_P (opval); 11232 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 11233 } 11234} 11235} 11236} 11237 11238#undef FLD 11239} 11240 NEXT (vpc); 11241 11242 CASE (sem, INSN_ASRR_D_R) : /* asrr.d $Rs,$Rd */ 11243{ 11244 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 11245 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 11246#define FLD(f) abuf->fields.sfmt_add_b_r.f 11247 int UNUSED written = 0; 11248 IADDR UNUSED pc = abuf->addr; 11249 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 11250 11251{ 11252 SI tmp_tmpd; 11253 SI tmp_cnt1; 11254 SI tmp_cnt2; 11255 tmp_cnt1 = GET_H_GR (FLD (f_operand1)); 11256 tmp_cnt2 = ((NESI (ANDSI (tmp_cnt1, 32), 0)) ? (31) : (ANDSI (tmp_cnt1, 31))); 11257 tmp_tmpd = SRASI (EXTSISI (TRUNCSISI (GET_H_GR (FLD (f_operand2)))), tmp_cnt2); 11258 { 11259 SI opval = tmp_tmpd; 11260 SET_H_GR (FLD (f_operand2), opval); 11261 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 11262 } 11263{ 11264 { 11265 BI opval = LTSI (tmp_tmpd, 0); 11266 CPU (h_nbit) = opval; 11267 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 11268 } 11269 { 11270 BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 11271 CPU (h_zbit) = opval; 11272 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 11273 } 11274SET_H_CBIT_MOVE (0); 11275SET_H_VBIT_MOVE (0); 11276{ 11277 { 11278 BI opval = 0; 11279 CPU (h_xbit) = opval; 11280 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 11281 } 11282 { 11283 BI opval = 0; 11284 SET_H_INSN_PREFIXED_P (opval); 11285 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 11286 } 11287} 11288} 11289} 11290 11291#undef FLD 11292} 11293 NEXT (vpc); 11294 11295 CASE (sem, INSN_ASRQ) : /* asrq $c,${Rd} */ 11296{ 11297 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 11298 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 11299#define FLD(f) abuf->fields.sfmt_asrq.f 11300 int UNUSED written = 0; 11301 IADDR UNUSED pc = abuf->addr; 11302 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 11303 11304{ 11305 SI tmp_tmpd; 11306 tmp_tmpd = SRASI (GET_H_GR (FLD (f_operand2)), FLD (f_u5)); 11307 { 11308 SI opval = tmp_tmpd; 11309 SET_H_GR (FLD (f_operand2), opval); 11310 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 11311 } 11312{ 11313 { 11314 BI opval = LTSI (tmp_tmpd, 0); 11315 CPU (h_nbit) = opval; 11316 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 11317 } 11318 { 11319 BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 11320 CPU (h_zbit) = opval; 11321 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 11322 } 11323SET_H_CBIT_MOVE (0); 11324SET_H_VBIT_MOVE (0); 11325{ 11326 { 11327 BI opval = 0; 11328 CPU (h_xbit) = opval; 11329 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 11330 } 11331 { 11332 BI opval = 0; 11333 SET_H_INSN_PREFIXED_P (opval); 11334 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 11335 } 11336} 11337} 11338} 11339 11340#undef FLD 11341} 11342 NEXT (vpc); 11343 11344 CASE (sem, INSN_LSRR_B_R) : /* lsrr.b $Rs,$Rd */ 11345{ 11346 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 11347 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 11348#define FLD(f) abuf->fields.sfmt_add_b_r.f 11349 int UNUSED written = 0; 11350 IADDR UNUSED pc = abuf->addr; 11351 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 11352 11353{ 11354 SI tmp_tmpd; 11355 SI tmp_cnt; 11356 tmp_cnt = ANDSI (GET_H_GR (FLD (f_operand1)), 63); 11357 tmp_tmpd = ((NESI (ANDSI (tmp_cnt, 32), 0)) ? (0) : (SRLSI (ZEXTQISI (TRUNCSIQI (GET_H_GR (FLD (f_operand2)))), ANDSI (tmp_cnt, 31)))); 11358{ 11359 SI tmp_oldregval; 11360 tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2)); 11361 { 11362 SI opval = ORSI (ANDSI (tmp_tmpd, 255), ANDSI (tmp_oldregval, 0xffffff00)); 11363 SET_H_GR (FLD (f_operand2), opval); 11364 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 11365 } 11366} 11367{ 11368 { 11369 BI opval = LTQI (tmp_tmpd, 0); 11370 CPU (h_nbit) = opval; 11371 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 11372 } 11373 { 11374 BI opval = ANDIF (EQQI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 11375 CPU (h_zbit) = opval; 11376 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 11377 } 11378SET_H_CBIT_MOVE (0); 11379SET_H_VBIT_MOVE (0); 11380{ 11381 { 11382 BI opval = 0; 11383 CPU (h_xbit) = opval; 11384 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 11385 } 11386 { 11387 BI opval = 0; 11388 SET_H_INSN_PREFIXED_P (opval); 11389 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 11390 } 11391} 11392} 11393} 11394 11395#undef FLD 11396} 11397 NEXT (vpc); 11398 11399 CASE (sem, INSN_LSRR_W_R) : /* lsrr.w $Rs,$Rd */ 11400{ 11401 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 11402 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 11403#define FLD(f) abuf->fields.sfmt_add_b_r.f 11404 int UNUSED written = 0; 11405 IADDR UNUSED pc = abuf->addr; 11406 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 11407 11408{ 11409 SI tmp_tmpd; 11410 SI tmp_cnt; 11411 tmp_cnt = ANDSI (GET_H_GR (FLD (f_operand1)), 63); 11412 tmp_tmpd = ((NESI (ANDSI (tmp_cnt, 32), 0)) ? (0) : (SRLSI (ZEXTHISI (TRUNCSIHI (GET_H_GR (FLD (f_operand2)))), ANDSI (tmp_cnt, 31)))); 11413{ 11414 SI tmp_oldregval; 11415 tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2)); 11416 { 11417 SI opval = ORSI (ANDSI (tmp_tmpd, 65535), ANDSI (tmp_oldregval, 0xffff0000)); 11418 SET_H_GR (FLD (f_operand2), opval); 11419 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 11420 } 11421} 11422{ 11423 { 11424 BI opval = LTHI (tmp_tmpd, 0); 11425 CPU (h_nbit) = opval; 11426 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 11427 } 11428 { 11429 BI opval = ANDIF (EQHI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 11430 CPU (h_zbit) = opval; 11431 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 11432 } 11433SET_H_CBIT_MOVE (0); 11434SET_H_VBIT_MOVE (0); 11435{ 11436 { 11437 BI opval = 0; 11438 CPU (h_xbit) = opval; 11439 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 11440 } 11441 { 11442 BI opval = 0; 11443 SET_H_INSN_PREFIXED_P (opval); 11444 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 11445 } 11446} 11447} 11448} 11449 11450#undef FLD 11451} 11452 NEXT (vpc); 11453 11454 CASE (sem, INSN_LSRR_D_R) : /* lsrr.d $Rs,$Rd */ 11455{ 11456 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 11457 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 11458#define FLD(f) abuf->fields.sfmt_add_b_r.f 11459 int UNUSED written = 0; 11460 IADDR UNUSED pc = abuf->addr; 11461 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 11462 11463{ 11464 SI tmp_tmpd; 11465 SI tmp_cnt; 11466 tmp_cnt = ANDSI (GET_H_GR (FLD (f_operand1)), 63); 11467 tmp_tmpd = ((NESI (ANDSI (tmp_cnt, 32), 0)) ? (0) : (SRLSI (ZEXTSISI (TRUNCSISI (GET_H_GR (FLD (f_operand2)))), ANDSI (tmp_cnt, 31)))); 11468 { 11469 SI opval = tmp_tmpd; 11470 SET_H_GR (FLD (f_operand2), opval); 11471 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 11472 } 11473{ 11474 { 11475 BI opval = LTSI (tmp_tmpd, 0); 11476 CPU (h_nbit) = opval; 11477 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 11478 } 11479 { 11480 BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 11481 CPU (h_zbit) = opval; 11482 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 11483 } 11484SET_H_CBIT_MOVE (0); 11485SET_H_VBIT_MOVE (0); 11486{ 11487 { 11488 BI opval = 0; 11489 CPU (h_xbit) = opval; 11490 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 11491 } 11492 { 11493 BI opval = 0; 11494 SET_H_INSN_PREFIXED_P (opval); 11495 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 11496 } 11497} 11498} 11499} 11500 11501#undef FLD 11502} 11503 NEXT (vpc); 11504 11505 CASE (sem, INSN_LSRQ) : /* lsrq $c,${Rd} */ 11506{ 11507 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 11508 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 11509#define FLD(f) abuf->fields.sfmt_asrq.f 11510 int UNUSED written = 0; 11511 IADDR UNUSED pc = abuf->addr; 11512 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 11513 11514{ 11515 SI tmp_tmpd; 11516 tmp_tmpd = SRLSI (GET_H_GR (FLD (f_operand2)), FLD (f_u5)); 11517 { 11518 SI opval = tmp_tmpd; 11519 SET_H_GR (FLD (f_operand2), opval); 11520 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 11521 } 11522{ 11523 { 11524 BI opval = LTSI (tmp_tmpd, 0); 11525 CPU (h_nbit) = opval; 11526 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 11527 } 11528 { 11529 BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 11530 CPU (h_zbit) = opval; 11531 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 11532 } 11533SET_H_CBIT_MOVE (0); 11534SET_H_VBIT_MOVE (0); 11535{ 11536 { 11537 BI opval = 0; 11538 CPU (h_xbit) = opval; 11539 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 11540 } 11541 { 11542 BI opval = 0; 11543 SET_H_INSN_PREFIXED_P (opval); 11544 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 11545 } 11546} 11547} 11548} 11549 11550#undef FLD 11551} 11552 NEXT (vpc); 11553 11554 CASE (sem, INSN_LSLR_B_R) : /* lslr.b $Rs,$Rd */ 11555{ 11556 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 11557 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 11558#define FLD(f) abuf->fields.sfmt_add_b_r.f 11559 int UNUSED written = 0; 11560 IADDR UNUSED pc = abuf->addr; 11561 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 11562 11563{ 11564 SI tmp_tmpd; 11565 SI tmp_cnt; 11566 tmp_cnt = ANDSI (GET_H_GR (FLD (f_operand1)), 63); 11567 tmp_tmpd = ((NESI (ANDSI (tmp_cnt, 32), 0)) ? (0) : (SLLSI (ZEXTQISI (TRUNCSIQI (GET_H_GR (FLD (f_operand2)))), ANDSI (tmp_cnt, 31)))); 11568{ 11569 SI tmp_oldregval; 11570 tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2)); 11571 { 11572 SI opval = ORSI (ANDSI (tmp_tmpd, 255), ANDSI (tmp_oldregval, 0xffffff00)); 11573 SET_H_GR (FLD (f_operand2), opval); 11574 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 11575 } 11576} 11577{ 11578 { 11579 BI opval = LTQI (tmp_tmpd, 0); 11580 CPU (h_nbit) = opval; 11581 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 11582 } 11583 { 11584 BI opval = ANDIF (EQQI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 11585 CPU (h_zbit) = opval; 11586 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 11587 } 11588SET_H_CBIT_MOVE (0); 11589SET_H_VBIT_MOVE (0); 11590{ 11591 { 11592 BI opval = 0; 11593 CPU (h_xbit) = opval; 11594 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 11595 } 11596 { 11597 BI opval = 0; 11598 SET_H_INSN_PREFIXED_P (opval); 11599 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 11600 } 11601} 11602} 11603} 11604 11605#undef FLD 11606} 11607 NEXT (vpc); 11608 11609 CASE (sem, INSN_LSLR_W_R) : /* lslr.w $Rs,$Rd */ 11610{ 11611 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 11612 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 11613#define FLD(f) abuf->fields.sfmt_add_b_r.f 11614 int UNUSED written = 0; 11615 IADDR UNUSED pc = abuf->addr; 11616 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 11617 11618{ 11619 SI tmp_tmpd; 11620 SI tmp_cnt; 11621 tmp_cnt = ANDSI (GET_H_GR (FLD (f_operand1)), 63); 11622 tmp_tmpd = ((NESI (ANDSI (tmp_cnt, 32), 0)) ? (0) : (SLLSI (ZEXTHISI (TRUNCSIHI (GET_H_GR (FLD (f_operand2)))), ANDSI (tmp_cnt, 31)))); 11623{ 11624 SI tmp_oldregval; 11625 tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2)); 11626 { 11627 SI opval = ORSI (ANDSI (tmp_tmpd, 65535), ANDSI (tmp_oldregval, 0xffff0000)); 11628 SET_H_GR (FLD (f_operand2), opval); 11629 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 11630 } 11631} 11632{ 11633 { 11634 BI opval = LTHI (tmp_tmpd, 0); 11635 CPU (h_nbit) = opval; 11636 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 11637 } 11638 { 11639 BI opval = ANDIF (EQHI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 11640 CPU (h_zbit) = opval; 11641 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 11642 } 11643SET_H_CBIT_MOVE (0); 11644SET_H_VBIT_MOVE (0); 11645{ 11646 { 11647 BI opval = 0; 11648 CPU (h_xbit) = opval; 11649 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 11650 } 11651 { 11652 BI opval = 0; 11653 SET_H_INSN_PREFIXED_P (opval); 11654 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 11655 } 11656} 11657} 11658} 11659 11660#undef FLD 11661} 11662 NEXT (vpc); 11663 11664 CASE (sem, INSN_LSLR_D_R) : /* lslr.d $Rs,$Rd */ 11665{ 11666 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 11667 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 11668#define FLD(f) abuf->fields.sfmt_add_b_r.f 11669 int UNUSED written = 0; 11670 IADDR UNUSED pc = abuf->addr; 11671 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 11672 11673{ 11674 SI tmp_tmpd; 11675 SI tmp_cnt; 11676 tmp_cnt = ANDSI (GET_H_GR (FLD (f_operand1)), 63); 11677 tmp_tmpd = ((NESI (ANDSI (tmp_cnt, 32), 0)) ? (0) : (SLLSI (ZEXTSISI (TRUNCSISI (GET_H_GR (FLD (f_operand2)))), ANDSI (tmp_cnt, 31)))); 11678 { 11679 SI opval = tmp_tmpd; 11680 SET_H_GR (FLD (f_operand2), opval); 11681 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 11682 } 11683{ 11684 { 11685 BI opval = LTSI (tmp_tmpd, 0); 11686 CPU (h_nbit) = opval; 11687 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 11688 } 11689 { 11690 BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 11691 CPU (h_zbit) = opval; 11692 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 11693 } 11694SET_H_CBIT_MOVE (0); 11695SET_H_VBIT_MOVE (0); 11696{ 11697 { 11698 BI opval = 0; 11699 CPU (h_xbit) = opval; 11700 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 11701 } 11702 { 11703 BI opval = 0; 11704 SET_H_INSN_PREFIXED_P (opval); 11705 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 11706 } 11707} 11708} 11709} 11710 11711#undef FLD 11712} 11713 NEXT (vpc); 11714 11715 CASE (sem, INSN_LSLQ) : /* lslq $c,${Rd} */ 11716{ 11717 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 11718 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 11719#define FLD(f) abuf->fields.sfmt_asrq.f 11720 int UNUSED written = 0; 11721 IADDR UNUSED pc = abuf->addr; 11722 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 11723 11724{ 11725 SI tmp_tmpd; 11726 tmp_tmpd = SLLSI (GET_H_GR (FLD (f_operand2)), FLD (f_u5)); 11727 { 11728 SI opval = tmp_tmpd; 11729 SET_H_GR (FLD (f_operand2), opval); 11730 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 11731 } 11732{ 11733 { 11734 BI opval = LTSI (tmp_tmpd, 0); 11735 CPU (h_nbit) = opval; 11736 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 11737 } 11738 { 11739 BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 11740 CPU (h_zbit) = opval; 11741 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 11742 } 11743SET_H_CBIT_MOVE (0); 11744SET_H_VBIT_MOVE (0); 11745{ 11746 { 11747 BI opval = 0; 11748 CPU (h_xbit) = opval; 11749 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 11750 } 11751 { 11752 BI opval = 0; 11753 SET_H_INSN_PREFIXED_P (opval); 11754 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 11755 } 11756} 11757} 11758} 11759 11760#undef FLD 11761} 11762 NEXT (vpc); 11763 11764 CASE (sem, INSN_BTST) : /* $Rs,$Rd */ 11765{ 11766 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 11767 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 11768#define FLD(f) abuf->fields.sfmt_add_b_r.f 11769 int UNUSED written = 0; 11770 IADDR UNUSED pc = abuf->addr; 11771 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 11772 11773{ 11774 SI tmp_tmpd; 11775 SI tmp_cnt; 11776 tmp_tmpd = SLLSI (GET_H_GR (FLD (f_operand2)), SUBSI (31, ANDSI (GET_H_GR (FLD (f_operand1)), 31))); 11777{ 11778 { 11779 BI opval = LTSI (tmp_tmpd, 0); 11780 CPU (h_nbit) = opval; 11781 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 11782 } 11783 { 11784 BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 11785 CPU (h_zbit) = opval; 11786 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 11787 } 11788SET_H_CBIT_MOVE (0); 11789SET_H_VBIT_MOVE (0); 11790{ 11791 { 11792 BI opval = 0; 11793 CPU (h_xbit) = opval; 11794 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 11795 } 11796 { 11797 BI opval = 0; 11798 SET_H_INSN_PREFIXED_P (opval); 11799 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 11800 } 11801} 11802} 11803} 11804 11805#undef FLD 11806} 11807 NEXT (vpc); 11808 11809 CASE (sem, INSN_BTSTQ) : /* btstq $c,${Rd} */ 11810{ 11811 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 11812 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 11813#define FLD(f) abuf->fields.sfmt_asrq.f 11814 int UNUSED written = 0; 11815 IADDR UNUSED pc = abuf->addr; 11816 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 11817 11818{ 11819 SI tmp_tmpd; 11820 tmp_tmpd = SLLSI (GET_H_GR (FLD (f_operand2)), SUBSI (31, FLD (f_u5))); 11821{ 11822 { 11823 BI opval = LTSI (tmp_tmpd, 0); 11824 CPU (h_nbit) = opval; 11825 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 11826 } 11827 { 11828 BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 11829 CPU (h_zbit) = opval; 11830 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 11831 } 11832SET_H_CBIT_MOVE (0); 11833SET_H_VBIT_MOVE (0); 11834{ 11835 { 11836 BI opval = 0; 11837 CPU (h_xbit) = opval; 11838 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 11839 } 11840 { 11841 BI opval = 0; 11842 SET_H_INSN_PREFIXED_P (opval); 11843 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 11844 } 11845} 11846} 11847} 11848 11849#undef FLD 11850} 11851 NEXT (vpc); 11852 11853 CASE (sem, INSN_SETF) : /* setf ${list-of-flags} */ 11854{ 11855 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 11856 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 11857#define FLD(f) abuf->fields.sfmt_setf.f 11858 int UNUSED written = 0; 11859 IADDR UNUSED pc = abuf->addr; 11860 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 11861 11862{ 11863 SI tmp_tmp; 11864 tmp_tmp = FLD (f_dstsrc); 11865if (NESI (ANDSI (tmp_tmp, SLLSI (1, 0)), 0)) { 11866 { 11867 BI opval = 1; 11868 CPU (h_cbit) = opval; 11869 written |= (1 << 1); 11870 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 11871 } 11872} 11873if (NESI (ANDSI (tmp_tmp, SLLSI (1, 1)), 0)) { 11874 { 11875 BI opval = 1; 11876 CPU (h_vbit) = opval; 11877 written |= (1 << 7); 11878 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 11879 } 11880} 11881if (NESI (ANDSI (tmp_tmp, SLLSI (1, 2)), 0)) { 11882 { 11883 BI opval = 1; 11884 CPU (h_zbit) = opval; 11885 written |= (1 << 9); 11886 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 11887 } 11888} 11889if (NESI (ANDSI (tmp_tmp, SLLSI (1, 3)), 0)) { 11890 { 11891 BI opval = 1; 11892 CPU (h_nbit) = opval; 11893 written |= (1 << 3); 11894 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 11895 } 11896} 11897if (NESI (ANDSI (tmp_tmp, SLLSI (1, 4)), 0)) { 11898 { 11899 BI opval = 1; 11900 CPU (h_xbit) = opval; 11901 written |= (1 << 8); 11902 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 11903 } 11904} 11905if (NESI (ANDSI (tmp_tmp, SLLSI (1, 5)), 0)) { 11906 { 11907 BI opval = 1; 11908 SET_H_IBIT (opval); 11909 written |= (1 << 2); 11910 TRACE_RESULT (current_cpu, abuf, "ibit", 'x', opval); 11911 } 11912} 11913if (NESI (ANDSI (tmp_tmp, SLLSI (1, 6)), 0)) { 11914 { 11915 BI opval = 1; 11916 SET_H_UBIT (opval); 11917 written |= (1 << 6); 11918 TRACE_RESULT (current_cpu, abuf, "ubit", 'x', opval); 11919 } 11920} 11921if (NESI (ANDSI (tmp_tmp, SLLSI (1, 7)), 0)) { 11922 { 11923 BI opval = 1; 11924 CPU (h_pbit) = opval; 11925 written |= (1 << 4); 11926 TRACE_RESULT (current_cpu, abuf, "pbit", 'x', opval); 11927 } 11928} 11929 { 11930 BI opval = 0; 11931 SET_H_INSN_PREFIXED_P (opval); 11932 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 11933 } 11934if (EQSI (ANDSI (tmp_tmp, SLLSI (1, 4)), 0)) { 11935 { 11936 BI opval = 0; 11937 CPU (h_xbit) = opval; 11938 written |= (1 << 8); 11939 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 11940 } 11941} 11942} 11943 11944 abuf->written = written; 11945#undef FLD 11946} 11947 NEXT (vpc); 11948 11949 CASE (sem, INSN_CLEARF) : /* clearf ${list-of-flags} */ 11950{ 11951 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 11952 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 11953#define FLD(f) abuf->fields.sfmt_setf.f 11954 int UNUSED written = 0; 11955 IADDR UNUSED pc = abuf->addr; 11956 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 11957 11958{ 11959 SI tmp_tmp; 11960 tmp_tmp = FLD (f_dstsrc); 11961if (NESI (ANDSI (tmp_tmp, SLLSI (1, 0)), 0)) { 11962 { 11963 BI opval = 0; 11964 CPU (h_cbit) = opval; 11965 written |= (1 << 1); 11966 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 11967 } 11968} 11969if (NESI (ANDSI (tmp_tmp, SLLSI (1, 1)), 0)) { 11970 { 11971 BI opval = 0; 11972 CPU (h_vbit) = opval; 11973 written |= (1 << 7); 11974 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 11975 } 11976} 11977if (NESI (ANDSI (tmp_tmp, SLLSI (1, 2)), 0)) { 11978 { 11979 BI opval = 0; 11980 CPU (h_zbit) = opval; 11981 written |= (1 << 9); 11982 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 11983 } 11984} 11985if (NESI (ANDSI (tmp_tmp, SLLSI (1, 3)), 0)) { 11986 { 11987 BI opval = 0; 11988 CPU (h_nbit) = opval; 11989 written |= (1 << 3); 11990 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 11991 } 11992} 11993if (NESI (ANDSI (tmp_tmp, SLLSI (1, 4)), 0)) { 11994 { 11995 BI opval = 0; 11996 CPU (h_xbit) = opval; 11997 written |= (1 << 8); 11998 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 11999 } 12000} 12001if (NESI (ANDSI (tmp_tmp, SLLSI (1, 5)), 0)) { 12002 { 12003 BI opval = 0; 12004 SET_H_IBIT (opval); 12005 written |= (1 << 2); 12006 TRACE_RESULT (current_cpu, abuf, "ibit", 'x', opval); 12007 } 12008} 12009if (NESI (ANDSI (tmp_tmp, SLLSI (1, 6)), 0)) { 12010 { 12011 BI opval = 0; 12012 SET_H_UBIT (opval); 12013 written |= (1 << 6); 12014 TRACE_RESULT (current_cpu, abuf, "ubit", 'x', opval); 12015 } 12016} 12017if (NESI (ANDSI (tmp_tmp, SLLSI (1, 7)), 0)) { 12018 { 12019 BI opval = 0; 12020 CPU (h_pbit) = opval; 12021 written |= (1 << 4); 12022 TRACE_RESULT (current_cpu, abuf, "pbit", 'x', opval); 12023 } 12024} 12025{ 12026 { 12027 BI opval = 0; 12028 CPU (h_xbit) = opval; 12029 written |= (1 << 8); 12030 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 12031 } 12032 { 12033 BI opval = 0; 12034 SET_H_INSN_PREFIXED_P (opval); 12035 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 12036 } 12037} 12038} 12039 12040 abuf->written = written; 12041#undef FLD 12042} 12043 NEXT (vpc); 12044 12045 CASE (sem, INSN_BCC_B) : /* b${cc} ${o-pcrel} */ 12046{ 12047 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 12048 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 12049#define FLD(f) abuf->fields.sfmt_bcc_b.f 12050 int UNUSED written = 0; 12051 IADDR UNUSED pc = abuf->addr; 12052 SEM_BRANCH_INIT 12053 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 12054 12055{ 12056 BI tmp_truthval; 12057 tmp_truthval = ({ SI tmp_tmpcond; 12058 BI tmp_condres; 12059 tmp_tmpcond = FLD (f_operand2); 12060; if (EQSI (tmp_tmpcond, 0)) { 12061 tmp_condres = NOTBI (CPU (h_cbit)); 12062} 12063 else if (EQSI (tmp_tmpcond, 1)) { 12064 tmp_condres = CPU (h_cbit); 12065} 12066 else if (EQSI (tmp_tmpcond, 2)) { 12067 tmp_condres = NOTBI (CPU (h_zbit)); 12068} 12069 else if (EQSI (tmp_tmpcond, 3)) { 12070 tmp_condres = CPU (h_zbit); 12071} 12072 else if (EQSI (tmp_tmpcond, 4)) { 12073 tmp_condres = NOTBI (CPU (h_vbit)); 12074} 12075 else if (EQSI (tmp_tmpcond, 5)) { 12076 tmp_condres = CPU (h_vbit); 12077} 12078 else if (EQSI (tmp_tmpcond, 6)) { 12079 tmp_condres = NOTBI (CPU (h_nbit)); 12080} 12081 else if (EQSI (tmp_tmpcond, 7)) { 12082 tmp_condres = CPU (h_nbit); 12083} 12084 else if (EQSI (tmp_tmpcond, 8)) { 12085 tmp_condres = ORBI (CPU (h_cbit), CPU (h_zbit)); 12086} 12087 else if (EQSI (tmp_tmpcond, 9)) { 12088 tmp_condres = NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit))); 12089} 12090 else if (EQSI (tmp_tmpcond, 10)) { 12091 tmp_condres = NOTBI (XORBI (CPU (h_vbit), CPU (h_nbit))); 12092} 12093 else if (EQSI (tmp_tmpcond, 11)) { 12094 tmp_condres = XORBI (CPU (h_vbit), CPU (h_nbit)); 12095} 12096 else if (EQSI (tmp_tmpcond, 12)) { 12097 tmp_condres = NOTBI (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit))); 12098} 12099 else if (EQSI (tmp_tmpcond, 13)) { 12100 tmp_condres = ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit)); 12101} 12102 else if (EQSI (tmp_tmpcond, 14)) { 12103 tmp_condres = 1; 12104} 12105 else if (EQSI (tmp_tmpcond, 15)) { 12106 tmp_condres = CPU (h_pbit); 12107} 12108; tmp_condres; }); 12109crisv10f_branch_taken (current_cpu, pc, FLD (i_o_pcrel), tmp_truthval); 12110{ 12111 { 12112 BI opval = 0; 12113 CPU (h_xbit) = opval; 12114 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 12115 } 12116 { 12117 BI opval = 0; 12118 SET_H_INSN_PREFIXED_P (opval); 12119 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 12120 } 12121} 12122if (tmp_truthval) { 12123{ 12124 { 12125 USI opval = FLD (i_o_pcrel); 12126 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 12127 written |= (1 << 8); 12128 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 12129 } 12130} 12131} 12132} 12133 12134 abuf->written = written; 12135 SEM_BRANCH_FINI (vpc); 12136#undef FLD 12137} 12138 NEXT (vpc); 12139 12140 CASE (sem, INSN_BA_B) : /* ba ${o-pcrel} */ 12141{ 12142 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 12143 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 12144#define FLD(f) abuf->fields.sfmt_bcc_b.f 12145 int UNUSED written = 0; 12146 IADDR UNUSED pc = abuf->addr; 12147 SEM_BRANCH_INIT 12148 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 12149 12150{ 12151{ 12152 { 12153 BI opval = 0; 12154 CPU (h_xbit) = opval; 12155 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 12156 } 12157 { 12158 BI opval = 0; 12159 SET_H_INSN_PREFIXED_P (opval); 12160 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 12161 } 12162} 12163{ 12164 { 12165 USI opval = FLD (i_o_pcrel); 12166 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 12167 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 12168 } 12169} 12170} 12171 12172 SEM_BRANCH_FINI (vpc); 12173#undef FLD 12174} 12175 NEXT (vpc); 12176 12177 CASE (sem, INSN_BCC_W) : /* b${cc} ${o-word-pcrel} */ 12178{ 12179 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 12180 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 12181#define FLD(f) abuf->fields.sfmt_bcc_w.f 12182 int UNUSED written = 0; 12183 IADDR UNUSED pc = abuf->addr; 12184 SEM_BRANCH_INIT 12185 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 12186 12187{ 12188 BI tmp_truthval; 12189 tmp_truthval = ({ SI tmp_tmpcond; 12190 BI tmp_condres; 12191 tmp_tmpcond = FLD (f_operand2); 12192; if (EQSI (tmp_tmpcond, 0)) { 12193 tmp_condres = NOTBI (CPU (h_cbit)); 12194} 12195 else if (EQSI (tmp_tmpcond, 1)) { 12196 tmp_condres = CPU (h_cbit); 12197} 12198 else if (EQSI (tmp_tmpcond, 2)) { 12199 tmp_condres = NOTBI (CPU (h_zbit)); 12200} 12201 else if (EQSI (tmp_tmpcond, 3)) { 12202 tmp_condres = CPU (h_zbit); 12203} 12204 else if (EQSI (tmp_tmpcond, 4)) { 12205 tmp_condres = NOTBI (CPU (h_vbit)); 12206} 12207 else if (EQSI (tmp_tmpcond, 5)) { 12208 tmp_condres = CPU (h_vbit); 12209} 12210 else if (EQSI (tmp_tmpcond, 6)) { 12211 tmp_condres = NOTBI (CPU (h_nbit)); 12212} 12213 else if (EQSI (tmp_tmpcond, 7)) { 12214 tmp_condres = CPU (h_nbit); 12215} 12216 else if (EQSI (tmp_tmpcond, 8)) { 12217 tmp_condres = ORBI (CPU (h_cbit), CPU (h_zbit)); 12218} 12219 else if (EQSI (tmp_tmpcond, 9)) { 12220 tmp_condres = NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit))); 12221} 12222 else if (EQSI (tmp_tmpcond, 10)) { 12223 tmp_condres = NOTBI (XORBI (CPU (h_vbit), CPU (h_nbit))); 12224} 12225 else if (EQSI (tmp_tmpcond, 11)) { 12226 tmp_condres = XORBI (CPU (h_vbit), CPU (h_nbit)); 12227} 12228 else if (EQSI (tmp_tmpcond, 12)) { 12229 tmp_condres = NOTBI (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit))); 12230} 12231 else if (EQSI (tmp_tmpcond, 13)) { 12232 tmp_condres = ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit)); 12233} 12234 else if (EQSI (tmp_tmpcond, 14)) { 12235 tmp_condres = 1; 12236} 12237 else if (EQSI (tmp_tmpcond, 15)) { 12238 tmp_condres = CPU (h_pbit); 12239} 12240; tmp_condres; }); 12241crisv10f_branch_taken (current_cpu, pc, FLD (i_o_word_pcrel), tmp_truthval); 12242{ 12243 { 12244 BI opval = 0; 12245 CPU (h_xbit) = opval; 12246 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 12247 } 12248 { 12249 BI opval = 0; 12250 SET_H_INSN_PREFIXED_P (opval); 12251 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 12252 } 12253} 12254if (tmp_truthval) { 12255{ 12256 { 12257 USI opval = FLD (i_o_word_pcrel); 12258 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 12259 written |= (1 << 8); 12260 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 12261 } 12262} 12263} 12264} 12265 12266 abuf->written = written; 12267 SEM_BRANCH_FINI (vpc); 12268#undef FLD 12269} 12270 NEXT (vpc); 12271 12272 CASE (sem, INSN_BA_W) : /* ba ${o-word-pcrel} */ 12273{ 12274 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 12275 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 12276#define FLD(f) abuf->fields.sfmt_bcc_w.f 12277 int UNUSED written = 0; 12278 IADDR UNUSED pc = abuf->addr; 12279 SEM_BRANCH_INIT 12280 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 12281 12282{ 12283{ 12284 { 12285 BI opval = 0; 12286 CPU (h_xbit) = opval; 12287 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 12288 } 12289 { 12290 BI opval = 0; 12291 SET_H_INSN_PREFIXED_P (opval); 12292 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 12293 } 12294} 12295{ 12296 { 12297 USI opval = FLD (i_o_word_pcrel); 12298 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 12299 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 12300 } 12301} 12302} 12303 12304 SEM_BRANCH_FINI (vpc); 12305#undef FLD 12306} 12307 NEXT (vpc); 12308 12309 CASE (sem, INSN_JUMP_R) : /* jump/jsr/jir ${Rs} */ 12310{ 12311 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 12312 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 12313#define FLD(f) abuf->fields.sfmt_move_m_sprv10.f 12314 int UNUSED written = 0; 12315 IADDR UNUSED pc = abuf->addr; 12316 SEM_BRANCH_INIT 12317 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 12318 12319{ 12320 { 12321 SI opval = ADDSI (pc, 2); 12322 SET_H_SR (FLD (f_operand2), opval); 12323 TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval); 12324 } 12325 { 12326 USI opval = GET_H_GR (FLD (f_operand1)); 12327 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); 12328 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 12329 } 12330{ 12331 { 12332 BI opval = 0; 12333 CPU (h_xbit) = opval; 12334 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 12335 } 12336 { 12337 BI opval = 0; 12338 SET_H_INSN_PREFIXED_P (opval); 12339 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 12340 } 12341} 12342} 12343 12344 SEM_BRANCH_FINI (vpc); 12345#undef FLD 12346} 12347 NEXT (vpc); 12348 12349 CASE (sem, INSN_JUMP_M) : /* jump/jsr/jir [${Rs}${inc}] */ 12350{ 12351 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 12352 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 12353#define FLD(f) abuf->fields.sfmt_move_m_sprv10.f 12354 int UNUSED written = 0; 12355 IADDR UNUSED pc = abuf->addr; 12356 SEM_BRANCH_INIT 12357 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 12358 12359{ 12360 { 12361 SI opval = ADDSI (pc, 2); 12362 SET_H_SR (FLD (f_operand2), opval); 12363 TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval); 12364 } 12365 { 12366 USI opval = ({ SI tmp_addr; 12367 SI tmp_tmp_mem; 12368 BI tmp_postinc; 12369 tmp_postinc = FLD (f_memmode); 12370; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32))); 12371; tmp_tmp_mem = GETMEMSI (current_cpu, pc, tmp_addr); 12372; if (NEBI (tmp_postinc, 0)) { 12373{ 12374if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 12375 tmp_addr = ADDSI (tmp_addr, 4); 12376} 12377 { 12378 SI opval = tmp_addr; 12379 SET_H_GR (FLD (f_operand1), opval); 12380 written |= (1 << 7); 12381 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 12382 } 12383} 12384} 12385; tmp_tmp_mem; }); 12386 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); 12387 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 12388 } 12389{ 12390 { 12391 BI opval = 0; 12392 CPU (h_xbit) = opval; 12393 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 12394 } 12395 { 12396 BI opval = 0; 12397 SET_H_INSN_PREFIXED_P (opval); 12398 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 12399 } 12400} 12401} 12402 12403 abuf->written = written; 12404 SEM_BRANCH_FINI (vpc); 12405#undef FLD 12406} 12407 NEXT (vpc); 12408 12409 CASE (sem, INSN_JUMP_C) : /* jump/jsr/jir ${const32} */ 12410{ 12411 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 12412 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 12413#define FLD(f) abuf->fields.sfmt_move_c_sprv10_p9.f 12414 int UNUSED written = 0; 12415 IADDR UNUSED pc = abuf->addr; 12416 SEM_BRANCH_INIT 12417 vpc = SEM_NEXT_VPC (sem_arg, pc, 6); 12418 12419{ 12420 { 12421 SI opval = ADDSI (pc, 6); 12422 SET_H_SR (FLD (f_operand2), opval); 12423 TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval); 12424 } 12425 { 12426 USI opval = FLD (f_indir_pc__dword); 12427 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 12428 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 12429 } 12430{ 12431 { 12432 BI opval = 0; 12433 CPU (h_xbit) = opval; 12434 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 12435 } 12436 { 12437 BI opval = 0; 12438 SET_H_INSN_PREFIXED_P (opval); 12439 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 12440 } 12441} 12442} 12443 12444 SEM_BRANCH_FINI (vpc); 12445#undef FLD 12446} 12447 NEXT (vpc); 12448 12449 CASE (sem, INSN_BREAK) : /* break $n */ 12450{ 12451 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 12452 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 12453#define FLD(f) abuf->fields.sfmt_break.f 12454 int UNUSED written = 0; 12455 IADDR UNUSED pc = abuf->addr; 12456 SEM_BRANCH_INIT 12457 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 12458 12459{ 12460{ 12461 { 12462 BI opval = 0; 12463 CPU (h_xbit) = opval; 12464 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 12465 } 12466 { 12467 BI opval = 0; 12468 SET_H_INSN_PREFIXED_P (opval); 12469 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 12470 } 12471} 12472 { 12473 USI opval = crisv10f_break_handler (current_cpu, FLD (f_u4), pc); 12474 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); 12475 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 12476 } 12477} 12478 12479 SEM_BRANCH_FINI (vpc); 12480#undef FLD 12481} 12482 NEXT (vpc); 12483 12484 CASE (sem, INSN_BOUND_R_B_R) : /* bound-r.b ${Rs},${Rd} */ 12485{ 12486 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 12487 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 12488#define FLD(f) abuf->fields.sfmt_muls_b.f 12489 int UNUSED written = 0; 12490 IADDR UNUSED pc = abuf->addr; 12491 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 12492 12493{ 12494 SI tmp_tmpopd; 12495 SI tmp_tmpops; 12496 SI tmp_newval; 12497 tmp_tmpops = ZEXTQISI (TRUNCSIQI (GET_H_GR (FLD (f_operand1)))); 12498 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 12499 tmp_newval = ((LTUSI (tmp_tmpops, tmp_tmpopd)) ? (tmp_tmpops) : (tmp_tmpopd)); 12500 { 12501 SI opval = tmp_newval; 12502 SET_H_GR (FLD (f_operand2), opval); 12503 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 12504 } 12505{ 12506 { 12507 BI opval = LTSI (tmp_newval, 0); 12508 CPU (h_nbit) = opval; 12509 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 12510 } 12511 { 12512 BI opval = ANDIF (EQSI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 12513 CPU (h_zbit) = opval; 12514 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 12515 } 12516SET_H_CBIT_MOVE (0); 12517SET_H_VBIT_MOVE (0); 12518{ 12519 { 12520 BI opval = 0; 12521 CPU (h_xbit) = opval; 12522 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 12523 } 12524 { 12525 BI opval = 0; 12526 SET_H_INSN_PREFIXED_P (opval); 12527 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 12528 } 12529} 12530} 12531} 12532 12533#undef FLD 12534} 12535 NEXT (vpc); 12536 12537 CASE (sem, INSN_BOUND_R_W_R) : /* bound-r.w ${Rs},${Rd} */ 12538{ 12539 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 12540 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 12541#define FLD(f) abuf->fields.sfmt_muls_b.f 12542 int UNUSED written = 0; 12543 IADDR UNUSED pc = abuf->addr; 12544 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 12545 12546{ 12547 SI tmp_tmpopd; 12548 SI tmp_tmpops; 12549 SI tmp_newval; 12550 tmp_tmpops = ZEXTHISI (TRUNCSIHI (GET_H_GR (FLD (f_operand1)))); 12551 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 12552 tmp_newval = ((LTUSI (tmp_tmpops, tmp_tmpopd)) ? (tmp_tmpops) : (tmp_tmpopd)); 12553 { 12554 SI opval = tmp_newval; 12555 SET_H_GR (FLD (f_operand2), opval); 12556 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 12557 } 12558{ 12559 { 12560 BI opval = LTSI (tmp_newval, 0); 12561 CPU (h_nbit) = opval; 12562 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 12563 } 12564 { 12565 BI opval = ANDIF (EQSI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 12566 CPU (h_zbit) = opval; 12567 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 12568 } 12569SET_H_CBIT_MOVE (0); 12570SET_H_VBIT_MOVE (0); 12571{ 12572 { 12573 BI opval = 0; 12574 CPU (h_xbit) = opval; 12575 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 12576 } 12577 { 12578 BI opval = 0; 12579 SET_H_INSN_PREFIXED_P (opval); 12580 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 12581 } 12582} 12583} 12584} 12585 12586#undef FLD 12587} 12588 NEXT (vpc); 12589 12590 CASE (sem, INSN_BOUND_R_D_R) : /* bound-r.d ${Rs},${Rd} */ 12591{ 12592 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 12593 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 12594#define FLD(f) abuf->fields.sfmt_muls_b.f 12595 int UNUSED written = 0; 12596 IADDR UNUSED pc = abuf->addr; 12597 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 12598 12599{ 12600 SI tmp_tmpopd; 12601 SI tmp_tmpops; 12602 SI tmp_newval; 12603 tmp_tmpops = TRUNCSISI (GET_H_GR (FLD (f_operand1))); 12604 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 12605 tmp_newval = ((LTUSI (tmp_tmpops, tmp_tmpopd)) ? (tmp_tmpops) : (tmp_tmpopd)); 12606 { 12607 SI opval = tmp_newval; 12608 SET_H_GR (FLD (f_operand2), opval); 12609 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 12610 } 12611{ 12612 { 12613 BI opval = LTSI (tmp_newval, 0); 12614 CPU (h_nbit) = opval; 12615 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 12616 } 12617 { 12618 BI opval = ANDIF (EQSI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 12619 CPU (h_zbit) = opval; 12620 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 12621 } 12622SET_H_CBIT_MOVE (0); 12623SET_H_VBIT_MOVE (0); 12624{ 12625 { 12626 BI opval = 0; 12627 CPU (h_xbit) = opval; 12628 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 12629 } 12630 { 12631 BI opval = 0; 12632 SET_H_INSN_PREFIXED_P (opval); 12633 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 12634 } 12635} 12636} 12637} 12638 12639#undef FLD 12640} 12641 NEXT (vpc); 12642 12643 CASE (sem, INSN_BOUND_M_B_M) : /* bound-m.b [${Rs}${inc}],${Rd} */ 12644{ 12645 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 12646 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 12647#define FLD(f) abuf->fields.sfmt_bound_m_b_m.f 12648 int UNUSED written = 0; 12649 IADDR UNUSED pc = abuf->addr; 12650 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 12651 12652{ 12653 SI tmp_tmpopd; 12654 SI tmp_tmpops; 12655 SI tmp_newval; 12656 tmp_tmpops = ZEXTQISI (({ SI tmp_addr; 12657 QI tmp_tmp_mem; 12658 BI tmp_postinc; 12659 tmp_postinc = FLD (f_memmode); 12660; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32))); 12661; tmp_tmp_mem = GETMEMQI (current_cpu, pc, tmp_addr); 12662; if (NEBI (tmp_postinc, 0)) { 12663{ 12664if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 12665 tmp_addr = ADDSI (tmp_addr, 1); 12666} 12667 { 12668 SI opval = tmp_addr; 12669 SET_H_GR (FLD (f_operand1), opval); 12670 written |= (1 << 9); 12671 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 12672 } 12673} 12674} 12675; tmp_tmp_mem; })); 12676 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 12677 tmp_newval = ((LTUSI (tmp_tmpops, tmp_tmpopd)) ? (tmp_tmpops) : (tmp_tmpopd)); 12678if (ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) { 12679 { 12680 SI opval = tmp_newval; 12681 SET_H_GR (FLD (f_operand1), opval); 12682 written |= (1 << 9); 12683 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 12684 } 12685} else { 12686 { 12687 SI opval = tmp_newval; 12688 SET_H_GR (FLD (f_operand2), opval); 12689 written |= (1 << 8); 12690 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 12691 } 12692} 12693{ 12694 { 12695 BI opval = LTSI (tmp_newval, 0); 12696 CPU (h_nbit) = opval; 12697 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 12698 } 12699 { 12700 BI opval = ANDIF (EQSI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 12701 CPU (h_zbit) = opval; 12702 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 12703 } 12704SET_H_CBIT_MOVE (0); 12705SET_H_VBIT_MOVE (0); 12706{ 12707 { 12708 BI opval = 0; 12709 CPU (h_xbit) = opval; 12710 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 12711 } 12712 { 12713 BI opval = 0; 12714 SET_H_INSN_PREFIXED_P (opval); 12715 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 12716 } 12717} 12718} 12719} 12720 12721 abuf->written = written; 12722#undef FLD 12723} 12724 NEXT (vpc); 12725 12726 CASE (sem, INSN_BOUND_M_W_M) : /* bound-m.w [${Rs}${inc}],${Rd} */ 12727{ 12728 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 12729 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 12730#define FLD(f) abuf->fields.sfmt_bound_m_b_m.f 12731 int UNUSED written = 0; 12732 IADDR UNUSED pc = abuf->addr; 12733 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 12734 12735{ 12736 SI tmp_tmpopd; 12737 SI tmp_tmpops; 12738 SI tmp_newval; 12739 tmp_tmpops = ZEXTHISI (({ SI tmp_addr; 12740 HI tmp_tmp_mem; 12741 BI tmp_postinc; 12742 tmp_postinc = FLD (f_memmode); 12743; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32))); 12744; tmp_tmp_mem = GETMEMHI (current_cpu, pc, tmp_addr); 12745; if (NEBI (tmp_postinc, 0)) { 12746{ 12747if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 12748 tmp_addr = ADDSI (tmp_addr, 2); 12749} 12750 { 12751 SI opval = tmp_addr; 12752 SET_H_GR (FLD (f_operand1), opval); 12753 written |= (1 << 9); 12754 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 12755 } 12756} 12757} 12758; tmp_tmp_mem; })); 12759 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 12760 tmp_newval = ((LTUSI (tmp_tmpops, tmp_tmpopd)) ? (tmp_tmpops) : (tmp_tmpopd)); 12761if (ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) { 12762 { 12763 SI opval = tmp_newval; 12764 SET_H_GR (FLD (f_operand1), opval); 12765 written |= (1 << 9); 12766 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 12767 } 12768} else { 12769 { 12770 SI opval = tmp_newval; 12771 SET_H_GR (FLD (f_operand2), opval); 12772 written |= (1 << 8); 12773 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 12774 } 12775} 12776{ 12777 { 12778 BI opval = LTSI (tmp_newval, 0); 12779 CPU (h_nbit) = opval; 12780 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 12781 } 12782 { 12783 BI opval = ANDIF (EQSI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 12784 CPU (h_zbit) = opval; 12785 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 12786 } 12787SET_H_CBIT_MOVE (0); 12788SET_H_VBIT_MOVE (0); 12789{ 12790 { 12791 BI opval = 0; 12792 CPU (h_xbit) = opval; 12793 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 12794 } 12795 { 12796 BI opval = 0; 12797 SET_H_INSN_PREFIXED_P (opval); 12798 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 12799 } 12800} 12801} 12802} 12803 12804 abuf->written = written; 12805#undef FLD 12806} 12807 NEXT (vpc); 12808 12809 CASE (sem, INSN_BOUND_M_D_M) : /* bound-m.d [${Rs}${inc}],${Rd} */ 12810{ 12811 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 12812 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 12813#define FLD(f) abuf->fields.sfmt_bound_m_b_m.f 12814 int UNUSED written = 0; 12815 IADDR UNUSED pc = abuf->addr; 12816 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 12817 12818{ 12819 SI tmp_tmpopd; 12820 SI tmp_tmpops; 12821 SI tmp_newval; 12822 tmp_tmpops = ({ SI tmp_addr; 12823 SI tmp_tmp_mem; 12824 BI tmp_postinc; 12825 tmp_postinc = FLD (f_memmode); 12826; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32))); 12827; tmp_tmp_mem = GETMEMSI (current_cpu, pc, tmp_addr); 12828; if (NEBI (tmp_postinc, 0)) { 12829{ 12830if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 12831 tmp_addr = ADDSI (tmp_addr, 4); 12832} 12833 { 12834 SI opval = tmp_addr; 12835 SET_H_GR (FLD (f_operand1), opval); 12836 written |= (1 << 9); 12837 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 12838 } 12839} 12840} 12841; tmp_tmp_mem; }); 12842 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 12843 tmp_newval = ((LTUSI (tmp_tmpops, tmp_tmpopd)) ? (tmp_tmpops) : (tmp_tmpopd)); 12844if (ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) { 12845 { 12846 SI opval = tmp_newval; 12847 SET_H_GR (FLD (f_operand1), opval); 12848 written |= (1 << 9); 12849 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 12850 } 12851} else { 12852 { 12853 SI opval = tmp_newval; 12854 SET_H_GR (FLD (f_operand2), opval); 12855 written |= (1 << 8); 12856 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 12857 } 12858} 12859{ 12860 { 12861 BI opval = LTSI (tmp_newval, 0); 12862 CPU (h_nbit) = opval; 12863 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 12864 } 12865 { 12866 BI opval = ANDIF (EQSI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 12867 CPU (h_zbit) = opval; 12868 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 12869 } 12870SET_H_CBIT_MOVE (0); 12871SET_H_VBIT_MOVE (0); 12872{ 12873 { 12874 BI opval = 0; 12875 CPU (h_xbit) = opval; 12876 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 12877 } 12878 { 12879 BI opval = 0; 12880 SET_H_INSN_PREFIXED_P (opval); 12881 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 12882 } 12883} 12884} 12885} 12886 12887 abuf->written = written; 12888#undef FLD 12889} 12890 NEXT (vpc); 12891 12892 CASE (sem, INSN_BOUND_CB) : /* bound.b [PC+],${Rd} */ 12893{ 12894 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 12895 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 12896#define FLD(f) abuf->fields.sfmt_bound_cb.f 12897 int UNUSED written = 0; 12898 IADDR UNUSED pc = abuf->addr; 12899 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 12900 12901{ 12902 SI tmp_tmpopd; 12903 SI tmp_tmpops; 12904 SI tmp_newval; 12905 tmp_tmpops = ZEXTQISI (TRUNCSIQI (FLD (f_indir_pc__byte))); 12906 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 12907 tmp_newval = ((LTUSI (tmp_tmpops, tmp_tmpopd)) ? (tmp_tmpops) : (tmp_tmpopd)); 12908 { 12909 SI opval = tmp_newval; 12910 SET_H_GR (FLD (f_operand2), opval); 12911 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 12912 } 12913{ 12914 { 12915 BI opval = LTSI (tmp_newval, 0); 12916 CPU (h_nbit) = opval; 12917 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 12918 } 12919 { 12920 BI opval = ANDIF (EQSI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 12921 CPU (h_zbit) = opval; 12922 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 12923 } 12924SET_H_CBIT_MOVE (0); 12925SET_H_VBIT_MOVE (0); 12926{ 12927 { 12928 BI opval = 0; 12929 CPU (h_xbit) = opval; 12930 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 12931 } 12932 { 12933 BI opval = 0; 12934 SET_H_INSN_PREFIXED_P (opval); 12935 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 12936 } 12937} 12938} 12939} 12940 12941#undef FLD 12942} 12943 NEXT (vpc); 12944 12945 CASE (sem, INSN_BOUND_CW) : /* bound.w [PC+],${Rd} */ 12946{ 12947 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 12948 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 12949#define FLD(f) abuf->fields.sfmt_bound_cw.f 12950 int UNUSED written = 0; 12951 IADDR UNUSED pc = abuf->addr; 12952 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 12953 12954{ 12955 SI tmp_tmpopd; 12956 SI tmp_tmpops; 12957 SI tmp_newval; 12958 tmp_tmpops = ZEXTSISI (FLD (f_indir_pc__word)); 12959 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 12960 tmp_newval = ((LTUSI (tmp_tmpops, tmp_tmpopd)) ? (tmp_tmpops) : (tmp_tmpopd)); 12961 { 12962 SI opval = tmp_newval; 12963 SET_H_GR (FLD (f_operand2), opval); 12964 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 12965 } 12966{ 12967 { 12968 BI opval = LTSI (tmp_newval, 0); 12969 CPU (h_nbit) = opval; 12970 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 12971 } 12972 { 12973 BI opval = ANDIF (EQSI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 12974 CPU (h_zbit) = opval; 12975 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 12976 } 12977SET_H_CBIT_MOVE (0); 12978SET_H_VBIT_MOVE (0); 12979{ 12980 { 12981 BI opval = 0; 12982 CPU (h_xbit) = opval; 12983 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 12984 } 12985 { 12986 BI opval = 0; 12987 SET_H_INSN_PREFIXED_P (opval); 12988 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 12989 } 12990} 12991} 12992} 12993 12994#undef FLD 12995} 12996 NEXT (vpc); 12997 12998 CASE (sem, INSN_BOUND_CD) : /* bound.d [PC+],${Rd} */ 12999{ 13000 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 13001 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 13002#define FLD(f) abuf->fields.sfmt_bound_cd.f 13003 int UNUSED written = 0; 13004 IADDR UNUSED pc = abuf->addr; 13005 vpc = SEM_NEXT_VPC (sem_arg, pc, 6); 13006 13007{ 13008 SI tmp_tmpopd; 13009 SI tmp_tmpops; 13010 SI tmp_newval; 13011 tmp_tmpops = FLD (f_indir_pc__dword); 13012 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 13013 tmp_newval = ((LTUSI (tmp_tmpops, tmp_tmpopd)) ? (tmp_tmpops) : (tmp_tmpopd)); 13014 { 13015 SI opval = tmp_newval; 13016 SET_H_GR (FLD (f_operand2), opval); 13017 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 13018 } 13019{ 13020 { 13021 BI opval = LTSI (tmp_newval, 0); 13022 CPU (h_nbit) = opval; 13023 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 13024 } 13025 { 13026 BI opval = ANDIF (EQSI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 13027 CPU (h_zbit) = opval; 13028 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 13029 } 13030SET_H_CBIT_MOVE (0); 13031SET_H_VBIT_MOVE (0); 13032{ 13033 { 13034 BI opval = 0; 13035 CPU (h_xbit) = opval; 13036 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 13037 } 13038 { 13039 BI opval = 0; 13040 SET_H_INSN_PREFIXED_P (opval); 13041 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 13042 } 13043} 13044} 13045} 13046 13047#undef FLD 13048} 13049 NEXT (vpc); 13050 13051 CASE (sem, INSN_SCC) : /* s${cc} ${Rd-sfield} */ 13052{ 13053 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 13054 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 13055#define FLD(f) abuf->fields.sfmt_move_spr_mv10.f 13056 int UNUSED written = 0; 13057 IADDR UNUSED pc = abuf->addr; 13058 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 13059 13060{ 13061 BI tmp_truthval; 13062 tmp_truthval = ({ SI tmp_tmpcond; 13063 BI tmp_condres; 13064 tmp_tmpcond = FLD (f_operand2); 13065; if (EQSI (tmp_tmpcond, 0)) { 13066 tmp_condres = NOTBI (CPU (h_cbit)); 13067} 13068 else if (EQSI (tmp_tmpcond, 1)) { 13069 tmp_condres = CPU (h_cbit); 13070} 13071 else if (EQSI (tmp_tmpcond, 2)) { 13072 tmp_condres = NOTBI (CPU (h_zbit)); 13073} 13074 else if (EQSI (tmp_tmpcond, 3)) { 13075 tmp_condres = CPU (h_zbit); 13076} 13077 else if (EQSI (tmp_tmpcond, 4)) { 13078 tmp_condres = NOTBI (CPU (h_vbit)); 13079} 13080 else if (EQSI (tmp_tmpcond, 5)) { 13081 tmp_condres = CPU (h_vbit); 13082} 13083 else if (EQSI (tmp_tmpcond, 6)) { 13084 tmp_condres = NOTBI (CPU (h_nbit)); 13085} 13086 else if (EQSI (tmp_tmpcond, 7)) { 13087 tmp_condres = CPU (h_nbit); 13088} 13089 else if (EQSI (tmp_tmpcond, 8)) { 13090 tmp_condres = ORBI (CPU (h_cbit), CPU (h_zbit)); 13091} 13092 else if (EQSI (tmp_tmpcond, 9)) { 13093 tmp_condres = NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit))); 13094} 13095 else if (EQSI (tmp_tmpcond, 10)) { 13096 tmp_condres = NOTBI (XORBI (CPU (h_vbit), CPU (h_nbit))); 13097} 13098 else if (EQSI (tmp_tmpcond, 11)) { 13099 tmp_condres = XORBI (CPU (h_vbit), CPU (h_nbit)); 13100} 13101 else if (EQSI (tmp_tmpcond, 12)) { 13102 tmp_condres = NOTBI (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit))); 13103} 13104 else if (EQSI (tmp_tmpcond, 13)) { 13105 tmp_condres = ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit)); 13106} 13107 else if (EQSI (tmp_tmpcond, 14)) { 13108 tmp_condres = 1; 13109} 13110 else if (EQSI (tmp_tmpcond, 15)) { 13111 tmp_condres = CPU (h_pbit); 13112} 13113; tmp_condres; }); 13114 { 13115 SI opval = ZEXTBISI (tmp_truthval); 13116 SET_H_GR (FLD (f_operand1), opval); 13117 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 13118 } 13119{ 13120 { 13121 BI opval = 0; 13122 CPU (h_xbit) = opval; 13123 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 13124 } 13125 { 13126 BI opval = 0; 13127 SET_H_INSN_PREFIXED_P (opval); 13128 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 13129 } 13130} 13131} 13132 13133#undef FLD 13134} 13135 NEXT (vpc); 13136 13137 CASE (sem, INSN_LZ) : /* lz ${Rs},${Rd} */ 13138{ 13139 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 13140 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 13141#define FLD(f) abuf->fields.sfmt_muls_b.f 13142 int UNUSED written = 0; 13143 IADDR UNUSED pc = abuf->addr; 13144 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 13145 13146{ 13147 SI tmp_tmpd; 13148 SI tmp_tmp; 13149 tmp_tmp = GET_H_GR (FLD (f_operand1)); 13150 tmp_tmpd = 0; 13151{ 13152if (GESI (tmp_tmp, 0)) { 13153{ 13154 tmp_tmp = SLLSI (tmp_tmp, 1); 13155 tmp_tmpd = ADDSI (tmp_tmpd, 1); 13156} 13157} 13158if (GESI (tmp_tmp, 0)) { 13159{ 13160 tmp_tmp = SLLSI (tmp_tmp, 1); 13161 tmp_tmpd = ADDSI (tmp_tmpd, 1); 13162} 13163} 13164if (GESI (tmp_tmp, 0)) { 13165{ 13166 tmp_tmp = SLLSI (tmp_tmp, 1); 13167 tmp_tmpd = ADDSI (tmp_tmpd, 1); 13168} 13169} 13170if (GESI (tmp_tmp, 0)) { 13171{ 13172 tmp_tmp = SLLSI (tmp_tmp, 1); 13173 tmp_tmpd = ADDSI (tmp_tmpd, 1); 13174} 13175} 13176if (GESI (tmp_tmp, 0)) { 13177{ 13178 tmp_tmp = SLLSI (tmp_tmp, 1); 13179 tmp_tmpd = ADDSI (tmp_tmpd, 1); 13180} 13181} 13182if (GESI (tmp_tmp, 0)) { 13183{ 13184 tmp_tmp = SLLSI (tmp_tmp, 1); 13185 tmp_tmpd = ADDSI (tmp_tmpd, 1); 13186} 13187} 13188if (GESI (tmp_tmp, 0)) { 13189{ 13190 tmp_tmp = SLLSI (tmp_tmp, 1); 13191 tmp_tmpd = ADDSI (tmp_tmpd, 1); 13192} 13193} 13194if (GESI (tmp_tmp, 0)) { 13195{ 13196 tmp_tmp = SLLSI (tmp_tmp, 1); 13197 tmp_tmpd = ADDSI (tmp_tmpd, 1); 13198} 13199} 13200if (GESI (tmp_tmp, 0)) { 13201{ 13202 tmp_tmp = SLLSI (tmp_tmp, 1); 13203 tmp_tmpd = ADDSI (tmp_tmpd, 1); 13204} 13205} 13206if (GESI (tmp_tmp, 0)) { 13207{ 13208 tmp_tmp = SLLSI (tmp_tmp, 1); 13209 tmp_tmpd = ADDSI (tmp_tmpd, 1); 13210} 13211} 13212if (GESI (tmp_tmp, 0)) { 13213{ 13214 tmp_tmp = SLLSI (tmp_tmp, 1); 13215 tmp_tmpd = ADDSI (tmp_tmpd, 1); 13216} 13217} 13218if (GESI (tmp_tmp, 0)) { 13219{ 13220 tmp_tmp = SLLSI (tmp_tmp, 1); 13221 tmp_tmpd = ADDSI (tmp_tmpd, 1); 13222} 13223} 13224if (GESI (tmp_tmp, 0)) { 13225{ 13226 tmp_tmp = SLLSI (tmp_tmp, 1); 13227 tmp_tmpd = ADDSI (tmp_tmpd, 1); 13228} 13229} 13230if (GESI (tmp_tmp, 0)) { 13231{ 13232 tmp_tmp = SLLSI (tmp_tmp, 1); 13233 tmp_tmpd = ADDSI (tmp_tmpd, 1); 13234} 13235} 13236if (GESI (tmp_tmp, 0)) { 13237{ 13238 tmp_tmp = SLLSI (tmp_tmp, 1); 13239 tmp_tmpd = ADDSI (tmp_tmpd, 1); 13240} 13241} 13242if (GESI (tmp_tmp, 0)) { 13243{ 13244 tmp_tmp = SLLSI (tmp_tmp, 1); 13245 tmp_tmpd = ADDSI (tmp_tmpd, 1); 13246} 13247} 13248if (GESI (tmp_tmp, 0)) { 13249{ 13250 tmp_tmp = SLLSI (tmp_tmp, 1); 13251 tmp_tmpd = ADDSI (tmp_tmpd, 1); 13252} 13253} 13254if (GESI (tmp_tmp, 0)) { 13255{ 13256 tmp_tmp = SLLSI (tmp_tmp, 1); 13257 tmp_tmpd = ADDSI (tmp_tmpd, 1); 13258} 13259} 13260if (GESI (tmp_tmp, 0)) { 13261{ 13262 tmp_tmp = SLLSI (tmp_tmp, 1); 13263 tmp_tmpd = ADDSI (tmp_tmpd, 1); 13264} 13265} 13266if (GESI (tmp_tmp, 0)) { 13267{ 13268 tmp_tmp = SLLSI (tmp_tmp, 1); 13269 tmp_tmpd = ADDSI (tmp_tmpd, 1); 13270} 13271} 13272if (GESI (tmp_tmp, 0)) { 13273{ 13274 tmp_tmp = SLLSI (tmp_tmp, 1); 13275 tmp_tmpd = ADDSI (tmp_tmpd, 1); 13276} 13277} 13278if (GESI (tmp_tmp, 0)) { 13279{ 13280 tmp_tmp = SLLSI (tmp_tmp, 1); 13281 tmp_tmpd = ADDSI (tmp_tmpd, 1); 13282} 13283} 13284if (GESI (tmp_tmp, 0)) { 13285{ 13286 tmp_tmp = SLLSI (tmp_tmp, 1); 13287 tmp_tmpd = ADDSI (tmp_tmpd, 1); 13288} 13289} 13290if (GESI (tmp_tmp, 0)) { 13291{ 13292 tmp_tmp = SLLSI (tmp_tmp, 1); 13293 tmp_tmpd = ADDSI (tmp_tmpd, 1); 13294} 13295} 13296if (GESI (tmp_tmp, 0)) { 13297{ 13298 tmp_tmp = SLLSI (tmp_tmp, 1); 13299 tmp_tmpd = ADDSI (tmp_tmpd, 1); 13300} 13301} 13302if (GESI (tmp_tmp, 0)) { 13303{ 13304 tmp_tmp = SLLSI (tmp_tmp, 1); 13305 tmp_tmpd = ADDSI (tmp_tmpd, 1); 13306} 13307} 13308if (GESI (tmp_tmp, 0)) { 13309{ 13310 tmp_tmp = SLLSI (tmp_tmp, 1); 13311 tmp_tmpd = ADDSI (tmp_tmpd, 1); 13312} 13313} 13314if (GESI (tmp_tmp, 0)) { 13315{ 13316 tmp_tmp = SLLSI (tmp_tmp, 1); 13317 tmp_tmpd = ADDSI (tmp_tmpd, 1); 13318} 13319} 13320if (GESI (tmp_tmp, 0)) { 13321{ 13322 tmp_tmp = SLLSI (tmp_tmp, 1); 13323 tmp_tmpd = ADDSI (tmp_tmpd, 1); 13324} 13325} 13326if (GESI (tmp_tmp, 0)) { 13327{ 13328 tmp_tmp = SLLSI (tmp_tmp, 1); 13329 tmp_tmpd = ADDSI (tmp_tmpd, 1); 13330} 13331} 13332if (GESI (tmp_tmp, 0)) { 13333{ 13334 tmp_tmp = SLLSI (tmp_tmp, 1); 13335 tmp_tmpd = ADDSI (tmp_tmpd, 1); 13336} 13337} 13338if (GESI (tmp_tmp, 0)) { 13339{ 13340 tmp_tmp = SLLSI (tmp_tmp, 1); 13341 tmp_tmpd = ADDSI (tmp_tmpd, 1); 13342} 13343} 13344} 13345 { 13346 SI opval = tmp_tmpd; 13347 SET_H_GR (FLD (f_operand2), opval); 13348 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 13349 } 13350{ 13351 { 13352 BI opval = LTSI (tmp_tmpd, 0); 13353 CPU (h_nbit) = opval; 13354 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 13355 } 13356 { 13357 BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 13358 CPU (h_zbit) = opval; 13359 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 13360 } 13361SET_H_CBIT_MOVE (0); 13362SET_H_VBIT_MOVE (0); 13363{ 13364 { 13365 BI opval = 0; 13366 CPU (h_xbit) = opval; 13367 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 13368 } 13369 { 13370 BI opval = 0; 13371 SET_H_INSN_PREFIXED_P (opval); 13372 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 13373 } 13374} 13375} 13376} 13377 13378#undef FLD 13379} 13380 NEXT (vpc); 13381 13382 CASE (sem, INSN_ADDOQ) : /* addoq $o,$Rs,ACR */ 13383{ 13384 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 13385 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 13386#define FLD(f) abuf->fields.sfmt_addoq.f 13387 int UNUSED written = 0; 13388 IADDR UNUSED pc = abuf->addr; 13389 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 13390 13391{ 13392 { 13393 SI opval = ADDSI (GET_H_GR (FLD (f_operand2)), FLD (f_s8)); 13394 CPU (h_prefixreg_pre_v32) = opval; 13395 TRACE_RESULT (current_cpu, abuf, "prefixreg", 'x', opval); 13396 } 13397 { 13398 BI opval = 1; 13399 SET_H_INSN_PREFIXED_P (opval); 13400 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 13401 } 13402} 13403 13404#undef FLD 13405} 13406 NEXT (vpc); 13407 13408 CASE (sem, INSN_BDAPQPC) : /* bdapq $o,PC */ 13409{ 13410 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 13411 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 13412#define FLD(f) abuf->fields.sfmt_addoq.f 13413 int UNUSED written = 0; 13414 IADDR UNUSED pc = abuf->addr; 13415 SEM_BRANCH_INIT 13416 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 13417 13418{ 13419 { 13420 SI opval = ADDSI (ADDSI (pc, 2), FLD (f_s8)); 13421 CPU (h_prefixreg_pre_v32) = opval; 13422 TRACE_RESULT (current_cpu, abuf, "prefixreg", 'x', opval); 13423 } 13424 { 13425 BI opval = 1; 13426 SET_H_INSN_PREFIXED_P (opval); 13427 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 13428 } 13429cris_flush_simulator_decode_cache (current_cpu, pc); 13430} 13431 13432 SEM_BRANCH_FINI (vpc); 13433#undef FLD 13434} 13435 NEXT (vpc); 13436 13437 CASE (sem, INSN_BDAP_32_PC) : /* bdap ${sconst32},PC */ 13438{ 13439 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 13440 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 13441#define FLD(f) abuf->fields.sfmt_move_c_sprv10_p9.f 13442 int UNUSED written = 0; 13443 IADDR UNUSED pc = abuf->addr; 13444 vpc = SEM_NEXT_VPC (sem_arg, pc, 6); 13445 13446{ 13447 SI tmp_newpc; 13448 SI tmp_oldpc; 13449 SI tmp_offs; 13450 tmp_offs = FLD (f_indir_pc__dword); 13451 tmp_oldpc = ADDSI (pc, 6); 13452 tmp_newpc = ADDSI (tmp_oldpc, tmp_offs); 13453 { 13454 SI opval = tmp_newpc; 13455 CPU (h_prefixreg_pre_v32) = opval; 13456 TRACE_RESULT (current_cpu, abuf, "prefixreg", 'x', opval); 13457 } 13458 { 13459 BI opval = 1; 13460 SET_H_INSN_PREFIXED_P (opval); 13461 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 13462 } 13463} 13464 13465#undef FLD 13466} 13467 NEXT (vpc); 13468 13469 CASE (sem, INSN_MOVE_M_PCPLUS_P0) : /* move [PC+],P0 */ 13470{ 13471 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 13472 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 13473#define FLD(f) abuf->fields.sfmt_move_m_spplus_p8.f 13474 int UNUSED written = 0; 13475 IADDR UNUSED pc = abuf->addr; 13476 SEM_BRANCH_INIT 13477 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 13478 13479if (GET_H_INSN_PREFIXED_P ()) { 13480{ 13481 QI tmp_dummy; 13482 tmp_dummy = ({ SI tmp_addr; 13483 QI tmp_tmp_mem; 13484 BI tmp_postinc; 13485 tmp_postinc = FLD (f_memmode); 13486; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (pc) : (CPU (h_prefixreg_pre_v32))); 13487; tmp_tmp_mem = GETMEMQI (current_cpu, pc, tmp_addr); 13488; if (NEBI (tmp_postinc, 0)) { 13489{ 13490if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 13491 tmp_addr = ADDSI (tmp_addr, 1); 13492} 13493 { 13494 USI opval = tmp_addr; 13495 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); 13496 written |= (1 << 5); 13497 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 13498 } 13499} 13500} 13501; tmp_tmp_mem; }); 13502{ 13503 { 13504 BI opval = 0; 13505 CPU (h_xbit) = opval; 13506 written |= (1 << 7); 13507 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 13508 } 13509 { 13510 BI opval = 0; 13511 SET_H_INSN_PREFIXED_P (opval); 13512 written |= (1 << 6); 13513 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 13514 } 13515} 13516} 13517} else { 13518cgen_rtx_error (current_cpu, "move [PC+],P0 without prefix is not implemented"); 13519} 13520 13521 abuf->written = written; 13522 SEM_BRANCH_FINI (vpc); 13523#undef FLD 13524} 13525 NEXT (vpc); 13526 13527 CASE (sem, INSN_MOVE_M_SPPLUS_P8) : /* move [SP+],P8 */ 13528{ 13529 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 13530 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 13531#define FLD(f) abuf->fields.sfmt_move_m_spplus_p8.f 13532 int UNUSED written = 0; 13533 IADDR UNUSED pc = abuf->addr; 13534 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 13535 13536if (GET_H_INSN_PREFIXED_P ()) { 13537{ 13538 SI tmp_dummy; 13539 tmp_dummy = ({ SI tmp_addr; 13540 SI tmp_tmp_mem; 13541 BI tmp_postinc; 13542 tmp_postinc = FLD (f_memmode); 13543; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (((UINT) 14))) : (CPU (h_prefixreg_pre_v32))); 13544; tmp_tmp_mem = GETMEMSI (current_cpu, pc, tmp_addr); 13545; if (NEBI (tmp_postinc, 0)) { 13546{ 13547if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 13548 tmp_addr = ADDSI (tmp_addr, 4); 13549} 13550 { 13551 SI opval = tmp_addr; 13552 SET_H_GR (((UINT) 14), opval); 13553 written |= (1 << 5); 13554 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 13555 } 13556} 13557} 13558; tmp_tmp_mem; }); 13559{ 13560 { 13561 BI opval = 0; 13562 CPU (h_xbit) = opval; 13563 written |= (1 << 7); 13564 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 13565 } 13566 { 13567 BI opval = 0; 13568 SET_H_INSN_PREFIXED_P (opval); 13569 written |= (1 << 6); 13570 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 13571 } 13572} 13573} 13574} else { 13575cgen_rtx_error (current_cpu, "move [SP+],P8 without prefix is not implemented"); 13576} 13577 13578 abuf->written = written; 13579#undef FLD 13580} 13581 NEXT (vpc); 13582 13583 CASE (sem, INSN_ADDO_M_B_M) : /* addo-m.b [${Rs}${inc}],$Rd,ACR */ 13584{ 13585 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 13586 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 13587#define FLD(f) abuf->fields.sfmt_bound_m_b_m.f 13588 int UNUSED written = 0; 13589 IADDR UNUSED pc = abuf->addr; 13590 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 13591 13592{ 13593 QI tmp_tmps; 13594 tmp_tmps = ({ SI tmp_addr; 13595 QI tmp_tmp_mem; 13596 BI tmp_postinc; 13597 tmp_postinc = FLD (f_memmode); 13598; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32))); 13599; tmp_tmp_mem = GETMEMQI (current_cpu, pc, tmp_addr); 13600; if (NEBI (tmp_postinc, 0)) { 13601{ 13602if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 13603 tmp_addr = ADDSI (tmp_addr, 1); 13604} 13605 { 13606 SI opval = tmp_addr; 13607 SET_H_GR (FLD (f_operand1), opval); 13608 written |= (1 << 6); 13609 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 13610 } 13611} 13612} 13613; tmp_tmp_mem; }); 13614 { 13615 SI opval = ADDSI (GET_H_GR (FLD (f_operand2)), EXTQISI (tmp_tmps)); 13616 CPU (h_prefixreg_pre_v32) = opval; 13617 TRACE_RESULT (current_cpu, abuf, "prefixreg", 'x', opval); 13618 } 13619 { 13620 BI opval = 1; 13621 SET_H_INSN_PREFIXED_P (opval); 13622 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 13623 } 13624} 13625 13626 abuf->written = written; 13627#undef FLD 13628} 13629 NEXT (vpc); 13630 13631 CASE (sem, INSN_ADDO_M_W_M) : /* addo-m.w [${Rs}${inc}],$Rd,ACR */ 13632{ 13633 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 13634 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 13635#define FLD(f) abuf->fields.sfmt_bound_m_b_m.f 13636 int UNUSED written = 0; 13637 IADDR UNUSED pc = abuf->addr; 13638 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 13639 13640{ 13641 HI tmp_tmps; 13642 tmp_tmps = ({ SI tmp_addr; 13643 HI tmp_tmp_mem; 13644 BI tmp_postinc; 13645 tmp_postinc = FLD (f_memmode); 13646; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32))); 13647; tmp_tmp_mem = GETMEMHI (current_cpu, pc, tmp_addr); 13648; if (NEBI (tmp_postinc, 0)) { 13649{ 13650if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 13651 tmp_addr = ADDSI (tmp_addr, 2); 13652} 13653 { 13654 SI opval = tmp_addr; 13655 SET_H_GR (FLD (f_operand1), opval); 13656 written |= (1 << 6); 13657 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 13658 } 13659} 13660} 13661; tmp_tmp_mem; }); 13662 { 13663 SI opval = ADDSI (GET_H_GR (FLD (f_operand2)), EXTHISI (tmp_tmps)); 13664 CPU (h_prefixreg_pre_v32) = opval; 13665 TRACE_RESULT (current_cpu, abuf, "prefixreg", 'x', opval); 13666 } 13667 { 13668 BI opval = 1; 13669 SET_H_INSN_PREFIXED_P (opval); 13670 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 13671 } 13672} 13673 13674 abuf->written = written; 13675#undef FLD 13676} 13677 NEXT (vpc); 13678 13679 CASE (sem, INSN_ADDO_M_D_M) : /* addo-m.d [${Rs}${inc}],$Rd,ACR */ 13680{ 13681 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 13682 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 13683#define FLD(f) abuf->fields.sfmt_bound_m_b_m.f 13684 int UNUSED written = 0; 13685 IADDR UNUSED pc = abuf->addr; 13686 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 13687 13688{ 13689 SI tmp_tmps; 13690 tmp_tmps = ({ SI tmp_addr; 13691 SI tmp_tmp_mem; 13692 BI tmp_postinc; 13693 tmp_postinc = FLD (f_memmode); 13694; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32))); 13695; tmp_tmp_mem = GETMEMSI (current_cpu, pc, tmp_addr); 13696; if (NEBI (tmp_postinc, 0)) { 13697{ 13698if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 13699 tmp_addr = ADDSI (tmp_addr, 4); 13700} 13701 { 13702 SI opval = tmp_addr; 13703 SET_H_GR (FLD (f_operand1), opval); 13704 written |= (1 << 6); 13705 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 13706 } 13707} 13708} 13709; tmp_tmp_mem; }); 13710 { 13711 SI opval = ADDSI (GET_H_GR (FLD (f_operand2)), tmp_tmps); 13712 CPU (h_prefixreg_pre_v32) = opval; 13713 TRACE_RESULT (current_cpu, abuf, "prefixreg", 'x', opval); 13714 } 13715 { 13716 BI opval = 1; 13717 SET_H_INSN_PREFIXED_P (opval); 13718 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 13719 } 13720} 13721 13722 abuf->written = written; 13723#undef FLD 13724} 13725 NEXT (vpc); 13726 13727 CASE (sem, INSN_ADDO_CB) : /* addo.b [PC+],$Rd,ACR */ 13728{ 13729 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 13730 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 13731#define FLD(f) abuf->fields.sfmt_bound_cb.f 13732 int UNUSED written = 0; 13733 IADDR UNUSED pc = abuf->addr; 13734 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 13735 13736{ 13737 { 13738 SI opval = ADDSI (GET_H_GR (FLD (f_operand2)), EXTQISI (TRUNCSIQI (FLD (f_indir_pc__byte)))); 13739 CPU (h_prefixreg_pre_v32) = opval; 13740 TRACE_RESULT (current_cpu, abuf, "prefixreg", 'x', opval); 13741 } 13742 { 13743 BI opval = 1; 13744 SET_H_INSN_PREFIXED_P (opval); 13745 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 13746 } 13747} 13748 13749#undef FLD 13750} 13751 NEXT (vpc); 13752 13753 CASE (sem, INSN_ADDO_CW) : /* addo.w [PC+],$Rd,ACR */ 13754{ 13755 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 13756 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 13757#define FLD(f) abuf->fields.sfmt_bound_cw.f 13758 int UNUSED written = 0; 13759 IADDR UNUSED pc = abuf->addr; 13760 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 13761 13762{ 13763 { 13764 SI opval = ADDSI (GET_H_GR (FLD (f_operand2)), EXTHISI (TRUNCSIHI (FLD (f_indir_pc__word)))); 13765 CPU (h_prefixreg_pre_v32) = opval; 13766 TRACE_RESULT (current_cpu, abuf, "prefixreg", 'x', opval); 13767 } 13768 { 13769 BI opval = 1; 13770 SET_H_INSN_PREFIXED_P (opval); 13771 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 13772 } 13773} 13774 13775#undef FLD 13776} 13777 NEXT (vpc); 13778 13779 CASE (sem, INSN_ADDO_CD) : /* addo.d [PC+],$Rd,ACR */ 13780{ 13781 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 13782 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 13783#define FLD(f) abuf->fields.sfmt_bound_cd.f 13784 int UNUSED written = 0; 13785 IADDR UNUSED pc = abuf->addr; 13786 vpc = SEM_NEXT_VPC (sem_arg, pc, 6); 13787 13788{ 13789 { 13790 SI opval = ADDSI (GET_H_GR (FLD (f_operand2)), FLD (f_indir_pc__dword)); 13791 CPU (h_prefixreg_pre_v32) = opval; 13792 TRACE_RESULT (current_cpu, abuf, "prefixreg", 'x', opval); 13793 } 13794 { 13795 BI opval = 1; 13796 SET_H_INSN_PREFIXED_P (opval); 13797 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 13798 } 13799} 13800 13801#undef FLD 13802} 13803 NEXT (vpc); 13804 13805 CASE (sem, INSN_DIP_M) : /* dip [${Rs}${inc}] */ 13806{ 13807 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 13808 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 13809#define FLD(f) abuf->fields.sfmt_move_spr_mv10.f 13810 int UNUSED written = 0; 13811 IADDR UNUSED pc = abuf->addr; 13812 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 13813 13814{ 13815 SI tmp_tmps; 13816 tmp_tmps = ({ SI tmp_addr; 13817 SI tmp_tmp_mem; 13818 BI tmp_postinc; 13819 tmp_postinc = FLD (f_memmode); 13820; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32))); 13821; tmp_tmp_mem = GETMEMSI (current_cpu, pc, tmp_addr); 13822; if (NEBI (tmp_postinc, 0)) { 13823{ 13824if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 13825 tmp_addr = ADDSI (tmp_addr, 4); 13826} 13827 { 13828 SI opval = tmp_addr; 13829 SET_H_GR (FLD (f_operand1), opval); 13830 written |= (1 << 5); 13831 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 13832 } 13833} 13834} 13835; tmp_tmp_mem; }); 13836 { 13837 SI opval = tmp_tmps; 13838 CPU (h_prefixreg_pre_v32) = opval; 13839 TRACE_RESULT (current_cpu, abuf, "prefixreg", 'x', opval); 13840 } 13841 { 13842 BI opval = 1; 13843 SET_H_INSN_PREFIXED_P (opval); 13844 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 13845 } 13846} 13847 13848 abuf->written = written; 13849#undef FLD 13850} 13851 NEXT (vpc); 13852 13853 CASE (sem, INSN_DIP_C) : /* dip [PC+] */ 13854{ 13855 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 13856 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 13857#define FLD(f) abuf->fields.sfmt_move_c_sprv10_p9.f 13858 int UNUSED written = 0; 13859 IADDR UNUSED pc = abuf->addr; 13860 vpc = SEM_NEXT_VPC (sem_arg, pc, 6); 13861 13862{ 13863 { 13864 SI opval = FLD (f_indir_pc__dword); 13865 CPU (h_prefixreg_pre_v32) = opval; 13866 TRACE_RESULT (current_cpu, abuf, "prefixreg", 'x', opval); 13867 } 13868 { 13869 BI opval = 1; 13870 SET_H_INSN_PREFIXED_P (opval); 13871 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 13872 } 13873} 13874 13875#undef FLD 13876} 13877 NEXT (vpc); 13878 13879 CASE (sem, INSN_ADDI_ACR_B_R) : /* addi-acr.b ${Rs-dfield}.m,${Rd-sfield},ACR */ 13880{ 13881 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 13882 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 13883#define FLD(f) abuf->fields.sfmt_add_b_r.f 13884 int UNUSED written = 0; 13885 IADDR UNUSED pc = abuf->addr; 13886 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 13887 13888{ 13889 { 13890 SI opval = ADDSI (GET_H_GR (FLD (f_operand1)), MULSI (GET_H_GR (FLD (f_operand2)), 1)); 13891 CPU (h_prefixreg_pre_v32) = opval; 13892 TRACE_RESULT (current_cpu, abuf, "prefixreg", 'x', opval); 13893 } 13894 { 13895 BI opval = 1; 13896 SET_H_INSN_PREFIXED_P (opval); 13897 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 13898 } 13899} 13900 13901#undef FLD 13902} 13903 NEXT (vpc); 13904 13905 CASE (sem, INSN_ADDI_ACR_W_R) : /* addi-acr.w ${Rs-dfield}.m,${Rd-sfield},ACR */ 13906{ 13907 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 13908 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 13909#define FLD(f) abuf->fields.sfmt_add_b_r.f 13910 int UNUSED written = 0; 13911 IADDR UNUSED pc = abuf->addr; 13912 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 13913 13914{ 13915 { 13916 SI opval = ADDSI (GET_H_GR (FLD (f_operand1)), MULSI (GET_H_GR (FLD (f_operand2)), 2)); 13917 CPU (h_prefixreg_pre_v32) = opval; 13918 TRACE_RESULT (current_cpu, abuf, "prefixreg", 'x', opval); 13919 } 13920 { 13921 BI opval = 1; 13922 SET_H_INSN_PREFIXED_P (opval); 13923 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 13924 } 13925} 13926 13927#undef FLD 13928} 13929 NEXT (vpc); 13930 13931 CASE (sem, INSN_ADDI_ACR_D_R) : /* addi-acr.d ${Rs-dfield}.m,${Rd-sfield},ACR */ 13932{ 13933 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 13934 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 13935#define FLD(f) abuf->fields.sfmt_add_b_r.f 13936 int UNUSED written = 0; 13937 IADDR UNUSED pc = abuf->addr; 13938 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 13939 13940{ 13941 { 13942 SI opval = ADDSI (GET_H_GR (FLD (f_operand1)), MULSI (GET_H_GR (FLD (f_operand2)), 4)); 13943 CPU (h_prefixreg_pre_v32) = opval; 13944 TRACE_RESULT (current_cpu, abuf, "prefixreg", 'x', opval); 13945 } 13946 { 13947 BI opval = 1; 13948 SET_H_INSN_PREFIXED_P (opval); 13949 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 13950 } 13951} 13952 13953#undef FLD 13954} 13955 NEXT (vpc); 13956 13957 CASE (sem, INSN_BIAP_PC_B_R) : /* biap-pc.b ${Rs-dfield}.m,PC */ 13958{ 13959 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 13960 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 13961#define FLD(f) abuf->fields.sfmt_addoq.f 13962 int UNUSED written = 0; 13963 IADDR UNUSED pc = abuf->addr; 13964 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 13965 13966{ 13967 { 13968 SI opval = ADDSI (ADDSI (pc, 4), MULSI (GET_H_GR (FLD (f_operand2)), 1)); 13969 CPU (h_prefixreg_pre_v32) = opval; 13970 TRACE_RESULT (current_cpu, abuf, "prefixreg", 'x', opval); 13971 } 13972 { 13973 BI opval = 1; 13974 SET_H_INSN_PREFIXED_P (opval); 13975 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 13976 } 13977} 13978 13979#undef FLD 13980} 13981 NEXT (vpc); 13982 13983 CASE (sem, INSN_BIAP_PC_W_R) : /* biap-pc.w ${Rs-dfield}.m,PC */ 13984{ 13985 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 13986 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 13987#define FLD(f) abuf->fields.sfmt_addoq.f 13988 int UNUSED written = 0; 13989 IADDR UNUSED pc = abuf->addr; 13990 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 13991 13992{ 13993 { 13994 SI opval = ADDSI (ADDSI (pc, 4), MULSI (GET_H_GR (FLD (f_operand2)), 2)); 13995 CPU (h_prefixreg_pre_v32) = opval; 13996 TRACE_RESULT (current_cpu, abuf, "prefixreg", 'x', opval); 13997 } 13998 { 13999 BI opval = 1; 14000 SET_H_INSN_PREFIXED_P (opval); 14001 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 14002 } 14003} 14004 14005#undef FLD 14006} 14007 NEXT (vpc); 14008 14009 CASE (sem, INSN_BIAP_PC_D_R) : /* biap-pc.d ${Rs-dfield}.m,PC */ 14010{ 14011 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 14012 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 14013#define FLD(f) abuf->fields.sfmt_addoq.f 14014 int UNUSED written = 0; 14015 IADDR UNUSED pc = abuf->addr; 14016 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 14017 14018{ 14019 { 14020 SI opval = ADDSI (ADDSI (pc, 4), MULSI (GET_H_GR (FLD (f_operand2)), 4)); 14021 CPU (h_prefixreg_pre_v32) = opval; 14022 TRACE_RESULT (current_cpu, abuf, "prefixreg", 'x', opval); 14023 } 14024 { 14025 BI opval = 1; 14026 SET_H_INSN_PREFIXED_P (opval); 14027 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 14028 } 14029} 14030 14031#undef FLD 14032} 14033 NEXT (vpc); 14034 14035 14036 } 14037 ENDSWITCH (sem) /* End of semantic switch. */ 14038 14039 /* At this point `vpc' contains the next insn to execute. */ 14040} 14041 14042#undef DEFINE_SWITCH 14043#endif /* DEFINE_SWITCH */ 14044