Searched refs:uint64_t (Results 1 - 25 of 1749) sorted by last modified time

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/linux-master/tools/testing/selftests/kvm/aarch64/
H A Dvgic_init.c20 #define REG_OFFSET(vcpu, offset) (((uint64_t)vcpu << 32) | offset)
33 static uint64_t max_phys_size;
106 uint64_t attr;
107 uint64_t size;
108 uint64_t alignment;
146 uint64_t addr;
226 uint64_t addr, expected_addr;
411 uint64_t addr;
463 uint64_t addr;
549 uint64_t add
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/linux-master/tools/testing/selftests/mm/
H A Dsplit_huge_page_test.c23 uint64_t pagesize;
25 uint64_t pmd_pagesize;
39 uint64_t paddr;
40 uint64_t page_flags;
106 write_debugfs(PID_FMT, getpid(), (uint64_t)one_page,
107 (uint64_t)one_page + len, 0);
125 uint64_t thp_size;
181 write_debugfs(PID_FMT, getpid(), (uint64_t)pte_mapped,
182 (uint64_t)pte_mapped + pagesize * 4, 0);
212 uint64_t pgoff_star
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/linux-master/drivers/net/ethernet/marvell/octeontx2/af/
H A Drvu_npc.c1654 static int npc_fwdb_detect_load_prfl_img(struct rvu *rvu, uint64_t prfl_sz,
/linux-master/drivers/net/dsa/mv88e6xxx/
H A Dchip.c1080 static uint64_t _mv88e6xxx_get_ethtool_stat(struct mv88e6xxx_chip *chip,
1266 uint64_t *data)
1278 uint64_t *data)
1290 uint64_t *data)
1303 uint64_t *data)
1316 uint64_t *data)
1330 uint64_t *data)
1343 uint64_t *data)
1353 uint64_t *data)
1370 uint64_t *dat
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/linux-master/drivers/mtd/
H A Dmtdcore.c2236 int mtd_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
2256 int mtd_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
2276 int mtd_is_locked(struct mtd_info *mtd, loff_t ofs, uint64_t len)
/linux-master/drivers/gpu/drm/amd/pm/swsmu/smu13/
H A Dsmu_v13_0_6_ppt.c246 uint64_t PublicSerialNumber_AID;
1869 uint64_t *feature_mask)
1886 uint64_t feature_enabled;
2615 int idx, int reg_idx, uint64_t *val)
2628 *val = (uint64_t)data[1] << 32 | data[0];
2656 static int mca_decode_ipid_to_hwip(uint64_t val)
2681 uint64_t status0;
2739 uint64_t status0, misc0;
2763 uint64_t status0, misc0;
/linux-master/drivers/gpu/drm/amd/pm/
H A Damdgpu_pm.c918 uint64_t featuremask;
1602 uint64_t count0 = 0, count1 = 0;
4390 uint64_t value64 = 0;
/linux-master/drivers/gpu/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm.c611 refresh_hz = div_u64((uint64_t) stream->timing.pix_clk_100hz *
1347 pa_config->system_aperture.start_addr = (uint64_t)logical_addr_low << 18;
1348 pa_config->system_aperture.end_addr = (uint64_t)logical_addr_high << 18;
1350 pa_config->system_aperture.agp_base = (uint64_t)agp_base << 24;
1351 pa_config->system_aperture.agp_bot = (uint64_t)agp_bot << 24;
1352 pa_config->system_aperture.agp_top = (uint64_t)agp_top << 24;
6376 uint64_t val)
6428 uint64_t *val)
/linux-master/drivers/gpu/drm/amd/amdkfd/
H A Dkfd_svm.c64 static uint64_t max_svm_range_pages;
77 svm_range_check_vm(struct kfd_process *p, uint64_t start, uint64_t last,
78 uint64_t *bo_s, uint64_t *bo_l);
281 uint64_t size = (prange->last - prange->start + 1) << PAGE_SHIFT;
323 svm_range *svm_range_new(struct svm_range_list *svms, uint64_t start,
324 uint64_t last, bool update_mem_usage)
326 uint64_t size = last - start + 1;
879 svm_range_copy_array(void *psrc, size_t size, uint64_t num_element
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H A Dkfd_process.c89 uint64_t sdma_activity_counter;
93 uint64_t __user *rptr;
94 uint64_t sdma_val;
103 uint64_t val;
163 sdma_q->rptr = (uint64_t __user *)q->properties.read_ptr;
222 if (((uint64_t __user *)q->properties.read_ptr == sdma_q->rptr) &&
401 uint64_t evict_jiffies;
712 uint64_t gpu_va, uint32_t size,
1382 uint64_t tba_addr,
1383 uint64_t tma_add
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H A Dkfd_migrate.c42 static uint64_t
43 svm_migrate_direct_mapping_addr(struct amdgpu_device *adev, uint64_t addr)
49 svm_migrate_gart_map(struct amdgpu_ring *ring, uint64_t npages,
50 dma_addr_t *addr, uint64_t *gart_addr, uint64_t flags)
56 uint64_t src_addr, dst_addr;
57 uint64_t pte_flags;
125 uint64_t *vram, uint64_t npages,
129 const uint64_t GTT_MAX_PAGE
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/linux-master/drivers/gpu/drm/amd/amdgpu/
H A Dsdma_v5_2.c93 uint64_t addr)
116 static uint64_t sdma_v5_2_ring_get_rptr(struct amdgpu_ring *ring)
134 static uint64_t sdma_v5_2_ring_get_wptr(struct amdgpu_ring *ring)
223 uint64_t csa_mc_addr = amdgpu_sdma_get_csa_mc_addr(ring, vmid);
761 uint64_t wb_gpu_addr;
983 uint64_t pe, uint64_t src,
1010 static void sdma_v5_2_vm_write_pte(struct amdgpu_ib *ib, uint64_t pe,
1011 uint64_t value, unsigned count,
1041 uint64_t p
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H A Dsdma_v4_4_2.c158 static uint64_t sdma_v4_4_2_ring_get_rptr(struct amdgpu_ring *ring)
176 static uint64_t sdma_v4_4_2_ring_get_wptr(struct amdgpu_ring *ring)
245 static uint64_t sdma_v4_4_2_page_ring_get_wptr(struct amdgpu_ring *ring)
280 uint64_t wptr = ring->wptr << 2;
1078 uint64_t pe, uint64_t src,
1105 static void sdma_v4_4_2_vm_write_pte(struct amdgpu_ib *ib, uint64_t pe,
1106 uint64_t value, unsigned count,
1136 uint64_t pe,
1137 uint64_t add
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H A Dgfx_v9_0.c757 static uint64_t gfx_v9_0_get_gpu_clock_counter(struct amdgpu_device *adev);
769 uint64_t queue_mask)
789 uint64_t mqd_addr = amdgpu_bo_gpu_offset(ring->mqd_obj);
790 uint64_t wptr_addr = ring->wptr_gpu_addr;
1031 uint64_t gpu_addr;
3248 uint64_t hqd_gpu_addr, wb_gpu_addr, eop_base_addr;
3919 static uint64_t gfx_v9_0_kiq_read_clock(struct amdgpu_device *adev)
3924 uint64_t value = 0;
3977 value = (uint64_t)adev->wb.wb[reg_val_offs] |
3978 (uint64_t)ade
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H A Dgfx_v11_0.c128 static uint64_t gfx_v11_0_get_gpu_clock_counter(struct amdgpu_device *adev);
146 static void gfx11_kiq_set_resources(struct amdgpu_ring *kiq_ring, uint64_t queue_mask)
163 uint64_t mqd_addr = amdgpu_bo_gpu_offset(ring->mqd_obj);
164 uint64_t wptr_addr = ring->wptr_gpu_addr;
383 uint64_t gpu_addr;
1085 *(uint64_t *)fw_autoload_mask |= 1ULL << id;
1093 uint64_t *toc_ptr;
1095 *(uint64_t *)fw_autoload_mask |= 0x1;
1097 DRM_DEBUG("rlc autoload enabled fw: 0x%llx\n", *(uint64_t *)fw_autoload_mask);
1102 toc_ptr = (uint64_t *)dat
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H A Dgfx_v10_0.c3480 static uint64_t gfx_v10_0_get_gpu_clock_counter(struct amdgpu_device *adev);
3503 static void gfx10_kiq_set_resources(struct amdgpu_ring *kiq_ring, uint64_t queue_mask)
3519 uint64_t mqd_addr = amdgpu_bo_gpu_offset(ring->mqd_obj);
3520 uint64_t wptr_addr = ring->wptr_gpu_addr;
3820 uint64_t gpu_addr;
5447 uint64_t gpu_addr;
5482 uint64_t addr;
5519 uint64_t addr;
5556 uint64_t addr;
5593 uint64_t add
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H A Damdgpu_vpe.c457 static uint64_t vpe_get_csa_mc_addr(struct amdgpu_ring *ring, uint32_t vmid)
461 uint64_t csa_mc_addr;
490 uint64_t csa_mc_addr = vpe_get_csa_mc_addr(ring, vmid);
503 static void vpe_ring_emit_fence(struct amdgpu_ring *ring, uint64_t addr,
504 uint64_t seq, unsigned int flags)
530 uint64_t addr = ring->fence_drv.gpu_addr;
574 uint64_t pd_addr)
580 uint64_t addr)
662 static uint64_t vpe_ring_get_rptr(struct amdgpu_ring *ring)
666 uint64_t rpt
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H A Damdgpu_umsch_mm.c51 uint64_t mqd_addr;
52 uint64_t csa_addr;
60 uint64_t ctx_data_gpu_addr;
64 uint64_t mqd_data_gpu_addr;
68 uint64_t ring_data_gpu_addr;
81 uint64_t addr, uint32_t size)
147 uint64_t addr)
183 uint64_t ring_gpu_addr = test->ring_data_gpu_addr;
273 uint64_t ib_gpu_addr = test->ring_data_gpu_addr +
276 uint64_t fence_gpu_add
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H A Damdgpu_object.c374 uint64_t offset, uint64_t size,
755 uint64_t shadow_addr, parent_addr;
1168 u32 metadata_size, uint64_t flags)
1216 uint64_t *flags)
1282 uint64_t size = amdgpu_bo_size(bo);
1532 uint64_t offset = AMDGPU_BO_INVALID_OFFSET;
H A Damdgpu_mes.c44 int ip_type, uint64_t *doorbell_index)
177 (uint64_t *)&adev->wb.wb[adev->mes.sch_ctx_offs];
189 (uint64_t *)&adev->wb.wb[adev->mes.query_status_fence_offs];
905 uint64_t process_context_addr,
947 uint64_t process_context_addr)
1511 ((uint64_t)(le32_to_cpu(mes_hdr->mes_uc_start_addr_hi)) << 32);
1514 ((uint64_t)(le32_to_cpu(mes_hdr->mes_data_start_addr_hi)) << 32);
H A Damdgpu_amdkfd_gpuvm.c58 uint64_t max_system_mem_limit;
59 uint64_t max_ttm_mem_limit;
116 uint64_t mem;
138 void amdgpu_amdkfd_reserve_system_mem(uint64_t size)
171 uint64_t size, u32 alloc_flag, int8_t xcp_id)
173 uint64_t reserved_for_pt =
177 uint64_t vram_size = 0;
248 uint64_t size, u32 alloc_flag, int8_t xcp_id)
318 uint64_t flags = 0;
499 static uint64_t get_pte_flag
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/linux-master/arch/loongarch/kernel/
H A Dperf_event.c500 uint64_t counter;
/linux-master/drivers/hid/intel-ish-hid/ipc/
H A Dipc.c311 uint64_t usec_system, usec_utc;
580 uint64_t usec;
587 ipc_send_mng_msg(dev, MNG_SYNC_FW_CLOCK, &usec, sizeof(uint64_t));
/linux-master/tools/testing/selftests/kvm/x86_64/
H A Dvmx_dirty_log_test.c88 uint64_t *host_test_mem;
H A Dpmu_counters_test.c29 uint64_t perf_capabilities)
99 uint64_t count;
184 uint32_t ctrl_msr, uint64_t ctrl_msr_value)
250 uint64_t eventsel = ARCH_PERFMON_EVENTSEL_OS |
289 static void test_arch_events(uint8_t pmu_version, uint64_t perf_capabilities,
332 uint64_t expected_val)
335 uint64_t val;
362 const uint64_t test_val = 0xffff;
376 const uint64_t expected_val = expect_success ? test_val : 0;
381 uint64_t va
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