| /linux-master/arch/mips/include/asm/txx9/ |
| H A D | dmac.h | 35 * @rx_reg: physical address of data register used for
41 u64 rx_reg; member in struct:txx9dmac_slave
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| /linux-master/include/linux/ |
| H A D | pch_dma.h | 21 dma_addr_t rx_reg; member in struct:pch_dma_slave
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| /linux-master/drivers/dma/ |
| H A D | pch_dma.c | 586 reg = pd_slave->rx_reg;
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| H A D | txx9dmac.c | 845 desc->hwdesc.SAR = ds->rx_reg;
854 desc->hwdesc32.SAR = ds->rx_reg;
1011 (ds->tx_reg && ds->rx_reg) || (!ds->tx_reg && !ds->rx_reg))
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| /linux-master/drivers/mailbox/ |
| H A D | arm_mhu.c | 31 void __iomem *rx_reg; member in struct:mhu_link
47 val = readl_relaxed(mlink->rx_reg + INTR_STAT_OFS);
53 writel_relaxed(val, mlink->rx_reg + INTR_CLR_OFS);
132 mhu->mlink[i].rx_reg = mhu->base + mhu_reg[i];
133 mhu->mlink[i].tx_reg = mhu->mlink[i].rx_reg + TX_REG_OFFSET;
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| H A D | arm_mhu_db.c | 35 void __iomem *rx_reg; member in struct:mhu_db_link
78 void __iomem *base = chan_info->mhu->mlink[chan_info->pchan].rx_reg;
100 void __iomem *base = mhu->mlink[pchan].rx_reg;
314 mhu->mlink[i].rx_reg = mhu->base + mhu_reg[i];
315 mhu->mlink[i].tx_reg = mhu->mlink[i].rx_reg + TX_REG_OFFSET;
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| H A D | platform_mhu.c | 37 void __iomem *rx_reg; member in struct:platform_mhu_link
53 val = readl_relaxed(mlink->rx_reg + INTR_STAT_OFS);
59 writel_relaxed(val, mlink->rx_reg + INTR_CLR_OFS);
141 mhu->mlink[i].rx_reg = mhu->base + platform_mhu_reg[i];
142 mhu->mlink[i].tx_reg = mhu->mlink[i].rx_reg + TX_REG_OFFSET;
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| /linux-master/drivers/net/ethernet/intel/i40e/ |
| H A D | i40e_main.c | 4810 u32 rx_reg; local
4813 rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q));
4814 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
4838 u32 rx_reg; local
4842 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
4843 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) ==
4844 ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1))
4850 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
4855 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK;
4857 rx_reg
[all...] |
| /linux-master/drivers/net/ethernet/intel/ice/ |
| H A D | ice_base.c | 711 u32 rx_reg; local
713 rx_reg = rd32(hw, QRX_CTRL(pf_q));
716 if (ena == !!(rx_reg & QRX_CTRL_QENA_STAT_M))
721 rx_reg |= QRX_CTRL_QENA_REQ_M;
723 rx_reg &= ~QRX_CTRL_QENA_REQ_M;
724 wr32(hw, QRX_CTRL(pf_q), rx_reg);
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| H A D | ice_lib.c | 2010 u32 rx_reg; local
2014 rx_reg = rd32(hw, QRX_CTRL(pf_q));
2015 if (rx_reg & QRX_CTRL_QENA_STAT_M)
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| /linux-master/drivers/net/ethernet/marvell/ |
| H A D | sky2.c | 901 u32 rx_reg; local
985 rx_reg = GMF_OPER_ON | GMF_RX_F_FL_ON;
988 rx_reg |= GMF_RX_OVER_ON;
990 sky2_write32(hw, SK_REG(port, RX_GMF_CTRL_T), rx_reg);
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| /linux-master/drivers/net/phy/ |
| H A D | motorcomm.c | 795 u32 rx_reg, tx_reg; local
799 rx_reg = ytphy_get_delay_reg_value(phydev, "rx-internal-delay-ps",
812 val |= FIELD_PREP(YT8521_RC1R_RX_DELAY_MASK, rx_reg);
819 val |= FIELD_PREP(YT8521_RC1R_RX_DELAY_MASK, rx_reg) |
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| /linux-master/drivers/spi/ |
| H A D | spi-omap2-mcspi.c | 707 void __iomem *rx_reg; local
720 rx_reg = base + OMAP2_MCSPI_RX0;
755 *rx++ = readl_relaxed(rx_reg);
769 *rx++ = readl_relaxed(rx_reg);
804 *rx++ = readl_relaxed(rx_reg);
818 *rx++ = readl_relaxed(rx_reg);
853 *rx++ = readl_relaxed(rx_reg);
867 *rx++ = readl_relaxed(rx_reg);
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| H A D | spi-orion.c | 385 void __iomem *tx_reg, *rx_reg, *int_reg; local
397 rx_reg = spi_reg(orion_spi, ORION_SPI_DATA_IN_REG);
419 *(*rx_buf)++ = readl(rx_reg);
434 void __iomem *tx_reg, *rx_reg, *int_reg; local
444 rx_reg = spi_reg(orion_spi, ORION_SPI_DATA_IN_REG);
461 put_unaligned(__le16_to_cpu(readl(rx_reg)), (*rx_buf)++);
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| H A D | spi-topcliff-pch.c | 859 param->rx_reg = data->io_base_addr + PCH_SPDRR;
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| /linux-master/drivers/tty/serial/ |
| H A D | pch_uart.c | 702 param->rx_reg = port->mapbase + UART_RX;
|