History log of /linux-master/drivers/net/phy/motorcomm.c
Revision Date Author Comments
# 7a561e93 20-Jul-2023 Samin Guo <samin.guo@starfivetech.com>

net: phy: motorcomm: Add pad drive strength cfg support

The motorcomm phy (YT8531) supports the ability to adjust the drive
strength of the rx_clk/rx_data, and the default strength may not be
suitable for all boards. So add configurable options to better match
the boards.(e.g. StarFive VisionFive 2)

When we configure the drive strength, we need to read the current
LDO voltage value to ensure that it is a legal value at that LDO
voltage.

Reviewed-by: Hal Feng <hal.feng@starfivetech.com>
Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>


# 9753613f 14-Feb-2023 Dan Carpenter <error27@gmail.com>

net: phy: motorcomm: uninitialized variables in yt8531_link_change_notify()

These booleans are never set to false, but are just used without being
initialized.

Fixes: 4ac94f728a58 ("net: phy: Add driver for Motorcomm yt8531 gigabit ethernet phy")
Signed-off-by: Dan Carpenter <error27@gmail.com>
Reviewed-by: Frank Sae <Frank.Sae@motor-comm.com>
Link: https://lore.kernel.org/r/Y+xd2yJet2ImHLoQ@kili
Signed-off-by: Jakub Kicinski <kuba@kernel.org>


# 4ac94f72 01-Feb-2023 Frank Sae <Frank.Sae@motor-comm.com>

net: phy: Add driver for Motorcomm yt8531 gigabit ethernet phy

Add a driver for the motorcomm yt8531 gigabit ethernet phy. We have
verified the driver on AM335x platform with yt8531 board. On the
board, yt8531 gigabit ethernet phy works in utp mode, RGMII
interface, supports 1000M/100M/10M speeds, and wol(magic package).

Signed-off-by: Frank Sae <Frank.Sae@motor-comm.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>


# 36152f87 01-Feb-2023 Frank Sae <Frank.Sae@motor-comm.com>

net: phy: Add dts support for Motorcomm yt8531s gigabit ethernet phy

Add dts support for Motorcomm yt8531s gigabit ethernet phy.
Change yt8521_probe to support clk config of yt8531s. Becase
yt8521_probe does the things which yt8531s is needed, so
removed yt8531s function.
This patch has been verified on AM335x platform with yt8531s board.

Signed-off-by: Frank Sae <Frank.Sae@motor-comm.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>


# a6e68f0f 01-Feb-2023 Frank Sae <Frank.Sae@motor-comm.com>

net: phy: Add dts support for Motorcomm yt8521 gigabit ethernet phy

Add dts support for Motorcomm yt8521 gigabit ethernet phy.
Add ytphy_rgmii_clk_delay_config function to support dst config for
the delay of rgmii clk. This funciont is common for yt8521, yt8531s
and yt8531.
This patch has been verified on AM335x platform.

Signed-off-by: Frank Sae <Frank.Sae@motor-comm.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>


# 4869a146 01-Feb-2023 Frank Sae <Frank.Sae@motor-comm.com>

net: phy: Add BIT macro for Motorcomm yt8521/yt8531 gigabit ethernet phy

Add BIT macro for Motorcomm yt8521/yt8531 gigabit ethernet phy.
This is a preparatory patch. Add BIT macro for 0xA012 reg, and
supplement for 0xA001 and 0xA003 reg. These will be used to support dts.

Signed-off-by: Frank Sae <Frank.Sae@motor-comm.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>


# 3c1dc221 27-Jan-2023 Frank Sae <Frank.Sae@motor-comm.com>

net: phy: motorcomm: change the phy id of yt8521 and yt8531s to lowercase

The phy id is usually defined in lower case.

Signed-off-by: Frank Sae <Frank.Sae@motor-comm.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lore.kernel.org/r/20230128063558.5850-2-Frank.Sae@motor-comm.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>


# 4104a713 27-Jan-2023 Frank Sae <Frank.Sae@motor-comm.com>

net: phy: fix the spelling problem of Sentinel

CHECK: 'sentinal' may be misspelled - perhaps 'sentinel'?

Signed-off-by: Frank Sae <Frank.Sae@motor-comm.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lore.kernel.org/r/20230128063558.5850-1-Frank.Sae@motor-comm.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>


# 813abcd9 22-Nov-2022 Frank <Frank.Sae@motor-comm.com>

net: phy: add Motorcomm YT8531S phy id.

We added patch for motorcomm.c to support YT8531S. This patch has
been tested on AM335x platform which has one YT8531S interface
card and passed all test cases.
The tested cases indluding: YT8531S UTP function with support of
10M/100M/1000M; YT8531S Fiber function with support of 100M/1000M;
and YT8531S Combo function that supports auto detection of media type.

Since most functions of YT8531S are similar to YT8521 and we reuse some
codes for YT8521 in the patch file.

Signed-off-by: Frank <Frank.Sae@motor-comm.com>
Signed-off-by: David S. Miller <davem@davemloft.net>


# 4e0243e7 04-Nov-2022 Frank <Frank.Sae@motor-comm.com>

net: phy: fix yt8521 duplicated argument to & or |

cocci warnings: (new ones prefixed by >>)
>> drivers/net/phy/motorcomm.c:1122:8-35: duplicated argument to & or |
drivers/net/phy/motorcomm.c:1126:8-35: duplicated argument to & or |
drivers/net/phy/motorcomm.c:1130:8-34: duplicated argument to & or |
drivers/net/phy/motorcomm.c:1134:8-34: duplicated argument to & or |

The second YT8521_RC1R_GE_TX_DELAY_xx should be YT8521_RC1R_FE_TX_DELAY_xx.

Fixes: 70479a40954c ("net: phy: Add driver for Motorcomm yt8521 gigabit ethernet phy")
Reported-by: kernel test robot <lkp@intel.com>
Reported-by: Julia Lawall <julia.lawall@lip6.fr>
Signed-off-by: Frank <Frank.Sae@motor-comm.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>


# 70479a40 28-Oct-2022 Frank <Frank.Sae@motor-comm.com>

net: phy: Add driver for Motorcomm yt8521 gigabit ethernet phy

Add a driver for the motorcomm yt8521 gigabit ethernet phy. We have verified
the driver on StarFive VisionFive development board, which is developed by
Shanghai StarFive Technology Co., Ltd.. On the board, yt8521 gigabit ethernet
phy works in utp mode, RGMII interface, supports 1000M/100M/10M speeds, and
wol(magic package).

Signed-off-by: Frank <Frank.Sae@motor-comm.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>


# 0cc8bddb 29-May-2021 Peter Geis <pgwipeout@gmail.com>

net: phy: abort loading yt8511 driver in unsupported modes

While investigating the clang `ge` uninitialized variable report, it was
discovered the default switch would have unintended consequences. Due to
the switch to __phy_modify, the driver would modify the ID values in the
default scenario.

Fix this by promoting the interface mode switch and aborting when the
mode is not a supported RGMII mode.

This prevents the `ge` and `fe` variables from ever being used
uninitialized.

Fixes: 48e8c6f1612b ("net: phy: add driver for Motorcomm yt8511 phy")
Reported-by: kernel test robot <lkp@intel.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>


# 546d6bad 29-May-2021 Peter Geis <pgwipeout@gmail.com>

net: phy: fix yt8511 clang uninitialized variable warning

clang doesn't preinitialize variables. If phy_select_page failed and
returned an error, phy_restore_page would be called with `ret` being
uninitialized.
Even though phy_restore_page won't use `ret` in this scenario,
initialize `ret` to silence the warning.

Fixes: 48e8c6f1612b ("net: phy: add driver for Motorcomm yt8511 phy")
Reported-by: kernel test robot <lkp@intel.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>


# 48e8c6f1 19-May-2021 Peter Geis <pgwipeout@gmail.com>

net: phy: add driver for Motorcomm yt8511 phy

Add a driver for the Motorcomm yt8511 phy that will be used in the
production Pine64 rk3566-quartz64 development board.
It supports gigabit transfer speeds, rgmii, and 125mhz clk output.

Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>