| /linux-master/arch/arm/mach-sa1100/ |
| H A D | clock.c | 72 unsigned long prate)
71 clk_mpll_recalc_rate(struct clk_hw *hw, unsigned long prate) argument
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| /linux-master/drivers/clk/ |
| H A D | clk-vt8500.c | 132 unsigned long *prate)
140 divisor = *prate / rate;
142 /* If prate / rate would be decimal, incr the divisor */
143 if (rate * divisor < *prate)
154 return *prate / divisor;
598 unsigned long *prate)
607 ret = vt8500_find_pll_bits(rate, *prate, &mul, &div1);
609 round_rate = VT8500_BITS_TO_FREQ(*prate, mul, div1);
612 ret = wm8650_find_pll_bits(rate, *prate, &mul, &div1, &div2);
614 round_rate = WM8650_BITS_TO_FREQ(*prate, mu
131 vt8500_dclk_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *prate) argument
597 vtwm_pll_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *prate) argument
[all...] |
| H A D | clk-bm1880.c | 612 unsigned long *prate)
624 return divider_ro_round_rate(hw, rate, prate, div->table,
629 return divider_round_rate(hw, rate, prate, div->table,
611 bm1880_clk_div_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *prate) argument
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| H A D | clk-composite.c | 154 unsigned long *prate)
162 return rate_ops->round_rate(rate_hw, rate, prate);
153 clk_composite_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *prate) argument
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| H A D | clk-divider.c | 385 unsigned long rate, unsigned long *prate,
393 req.best_parent_rate = *prate;
400 *prate = req.best_parent_rate;
407 unsigned long rate, unsigned long *prate,
415 req.best_parent_rate = *prate;
422 *prate = req.best_parent_rate;
429 unsigned long *prate)
440 return divider_ro_round_rate(hw, rate, prate, divider->table,
445 return divider_round_rate(hw, rate, prate, divider->table,
384 divider_round_rate_parent(struct clk_hw *hw, struct clk_hw *parent, unsigned long rate, unsigned long *prate, const struct clk_div_table *table, u8 width, unsigned long flags) argument
406 divider_ro_round_rate_parent(struct clk_hw *hw, struct clk_hw *parent, unsigned long rate, unsigned long *prate, const struct clk_div_table *table, u8 width, unsigned long flags, unsigned int val) argument
428 clk_divider_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *prate) argument
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| H A D | clk-fixed-factor.c | 34 unsigned long *prate)
42 *prate = clk_hw_round_rate(clk_hw_get_parent(hw), best_parent);
45 return (*prate / fix->div) * fix->mult;
33 clk_factor_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *prate) argument
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| H A D | clk-gate_test.c | 153 unsigned long prate = clk_hw_get_rate(parent); local
156 KUNIT_EXPECT_EQ(test, prate, rate);
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| H A D | clk-gemini.c | 132 unsigned long *prate)
131 gemini_pci_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *prate) argument
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| H A D | clk-hsdk-pll.c | 201 unsigned long *prate)
200 hsdk_pll_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *prate) argument
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| /linux-master/drivers/clk/hisilicon/ |
| H A D | clk-hi3660-stub.c | 71 unsigned long *prate)
70 hi3660_stub_clk_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *prate) argument
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| H A D | clkdivider-hi6220.c | 59 unsigned long *prate)
63 return divider_round_rate(hw, rate, prate, dclk->table,
58 hi6220_clkdiv_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *prate) argument
|
| /linux-master/drivers/clk/mxs/ |
| H A D | clk-div.c | 44 unsigned long *prate)
48 return div->ops->round_rate(&div->divider.hw, rate, prate);
43 clk_div_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *prate) argument
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| H A D | clk-frac.c | 48 unsigned long *prate)
51 unsigned long parent_rate = *prate;
47 clk_frac_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *prate) argument
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| H A D | clk-ref.c | 61 unsigned long *prate)
63 unsigned long parent_rate = *prate;
60 clk_ref_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *prate) argument
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| /linux-master/drivers/clk/nxp/ |
| H A D | clk-lpc32xx.c | 959 unsigned long *prate)
971 return DIV_ROUND_UP(*prate, bestdiv);
974 return divider_round_rate(hw, rate, prate, divider->table,
958 clk_divider_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *prate) argument
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| /linux-master/drivers/clk/qcom/ |
| H A D | clk-pll.c | 301 clk_pll_sr2_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long prate) argument
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| H A D | clk-regmap-divider.c | 19 unsigned long *prate)
29 return divider_ro_round_rate(hw, rate, prate, NULL, divider->width,
34 unsigned long *prate)
38 return divider_round_rate(hw, rate, prate, NULL, divider->width,
18 div_round_ro_rate(struct clk_hw *hw, unsigned long rate, unsigned long *prate) argument
33 div_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *prate) argument
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| H A D | clk-regmap-mux-div.c | 125 unsigned long prate, u32 src)
187 unsigned long rate, unsigned long prate)
191 return __mux_div_set_rate_and_parent(hw, rate, prate, md->src);
195 unsigned long prate, u8 index)
199 return __mux_div_set_rate_and_parent(hw, rate, prate,
203 static unsigned long mux_div_recalc_rate(struct clk_hw *hw, unsigned long prate) argument
124 __mux_div_set_rate_and_parent(struct clk_hw *hw, unsigned long rate, unsigned long prate, u32 src) argument
186 mux_div_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long prate) argument
194 mux_div_set_rate_and_parent(struct clk_hw *hw, unsigned long rate, unsigned long prate, u8 index) argument
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| /linux-master/drivers/clk/tegra/ |
| H A D | clk-audio-sync.c | 21 unsigned long *prate)
20 clk_sync_source_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *prate) argument
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| /linux-master/drivers/media/dvb-frontends/ |
| H A D | stv0900_sw.c | 754 enum fe_stv0900_fec prate; local
759 prate = STV0900_FEC_1_2;
762 prate = STV0900_FEC_2_3;
765 prate = STV0900_FEC_3_4;
768 prate = STV0900_FEC_5_6;
771 prate = STV0900_FEC_6_7;
774 prate = STV0900_FEC_7_8;
777 prate = STV0900_FEC_UNKNOWN;
781 return prate;
|
| /linux-master/arch/mips/alchemy/common/ |
| H A D | clock.c | 376 static long alchemy_calc_div(unsigned long rate, unsigned long prate, argument
381 div1 = prate / rate;
382 if ((prate / div1) > rate)
387 div1++; /* stay <=prate */
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| /linux-master/arch/powerpc/platforms/powermac/ |
| H A D | low_i2c.c | 488 const u32 *psteps, *prate, *addrp; local
520 prate = of_get_property(np, "AAPL,i2c-rate", NULL);
521 if (prate) switch(*prate) {
|
| /linux-master/drivers/clk/axs10x/ |
| H A D | i2s_pll_clock.c | 86 static const struct i2s_pll_cfg *i2s_pll_get_cfg(unsigned long prate) argument
88 switch (prate) {
112 unsigned long *prate)
115 const struct i2s_pll_cfg *pll_cfg = i2s_pll_get_cfg(*prate);
119 dev_err(clk->dev, "invalid parent rate=%ld\n", *prate);
111 i2s_pll_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *prate) argument
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| H A D | pll_clock.c | 153 unsigned long *prate)
152 axs10x_pll_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *prate) argument
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| /linux-master/drivers/clk/bcm/ |
| H A D | clk-bcm2835.c | 1143 unsigned long *prate,
1156 *prate = clk_hw_get_rate(parent);
1157 *div = bcm2835_clock_choose_div(hw, rate, *prate);
1159 *avgrate = bcm2835_clock_rate_from_divisor(clock, *prate, *div);
1165 high = bcm2835_clock_rate_from_divisor(clock, *prate,
1168 low = bcm2835_clock_rate_from_divisor(clock, *prate,
1203 *prate = curdiv * best_rate;
1215 unsigned long prate, best_prate = 0; local
1241 &div, &prate,
1245 best_prate = prate;
1139 bcm2835_clock_choose_div_and_prate(struct clk_hw *hw, int parent_idx, unsigned long rate, u32 *div, unsigned long *prate, unsigned long *avgrate) argument
[all...] |