Searched refs:phy (Results 1 - 25 of 112) sorted by path

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/haiku/src/add-ons/kernel/bus_managers/firewire/
H A Dutil.c37 alloc_mem(void **virt, void **phy, size_t size, uint32 protection, argument
40 // TODO: phy should be phys_addr_t*!
66 if (phy)
67 *phy = (void*)(addr_t)pe.address;
68 TRACE("area = %" B_PRId32 ", size = %ld, virt = %p, phy = %" B_PRIxPHYSADDR "\n", area, size, virtadr,
75 map_mem(void **virt, void *phy, size_t size, uint32 protection, argument
83 TRACE("mapping physical address %p with %ld bytes for %s\n", phy, size,
86 offset = (intptr_t)phy & (B_PAGE_SIZE - 1);
87 phyadr = (char *)phy - offset;
100 "mapadr = %p, size = %ld, area = 0x%08" B_PRIx32 "\n", phy, *vir
[all...]
H A Dutil.h30 area_id alloc_mem(void **virt, void **phy, size_t size, uint32 protection, const char *name);
31 area_id map_mem(void **virt, void *phy, size_t size, uint32 protection, const char *name);
/haiku/src/add-ons/kernel/busses/scsi/ahci/
H A Dutil.h14 area_id alloc_mem(void **virt, phys_addr_t *phy, size_t size, uint32 protection,
16 area_id map_mem(void **virt, phys_addr_t phy, size_t size, uint32 protection,
H A Dutil.cpp25 alloc_mem(void **virt, phys_addr_t *phy, size_t size, uint32 protection, argument
50 if (phy)
51 *phy = pe.address;
52 TRACE("area = %" B_PRId32 ", size = %ld, virt = %p, phy = %#" B_PRIxPHYSADDR "\n",
59 map_mem(void **virt, phys_addr_t phy, size_t size, uint32 protection, argument
68 " bytes for %s\n", phy, size, name);
70 offset = phy & (B_PAGE_SIZE - 1);
71 phyadr = phy - offset;
85 B_PRIuSIZE ", area = 0x%08" B_PRIx32 "\n", phy, *virt, offset, phyadr,
/haiku/src/add-ons/kernel/drivers/audio/ice1712/
H A Dutil.cpp41 alloc_mem(physical_entry *phy, addr_t *log, size_t size, const char *name) argument
62 rv = get_memory_map(logadr, size, phy, 1);
73 B_PRIXADDR ", phy = 0x%" B_PRIXPHYSADDR "\n", areaid, size,
74 *log, phy->address);
H A Dutil.h15 area_id alloc_mem(physical_entry *phy, addr_t *log, size_t size,
/haiku/src/add-ons/kernel/drivers/dvb/cx23882/
H A Dutil.c40 map_mem(void **virt, phys_addr_t phy, size_t size, uint32 protection, argument
49 phy, size, name);
51 offset = (uint32)phy & (B_PAGE_SIZE - 1);
52 phyadr = phy - offset;
66 ", area = 0x%08" B_PRIx32 "\n", phy, *virt, offset, phyadr, mapadr,
74 alloc_mem(void **virt, phys_addr_t *phy, size_t size, uint32 protection, argument
101 if (phy)
102 *phy = pe.address;
103 TRACE("area = %" B_PRId32 ", size = %" B_PRIuSIZE ", virt = %p, phy = %"
H A Dutil.h30 area_id map_mem(void **virt, phys_addr_t phy, size_t size, uint32 protection,
32 area_id alloc_mem(void **virt, phys_addr_t *phy, size_t size, uint32 protection,
/haiku/src/add-ons/kernel/drivers/network/wlan/realtekwifi/dev/rtwn/rtl8188e/
H A Dr88e_rx.c180 struct r88e_rx_phystat *phy = (struct r88e_rx_phystat *)physt; local
183 lna_idx = (phy->agc_rpt & 0xe0) >> 5;
184 vga_idx = (phy->agc_rpt & 0x1f);
225 struct r88e_rx_phystat *phy = (struct r88e_rx_phystat *)physt; local
229 rssi = ((phy->sig_qual >> 1) & 0x7f) - 110;
/haiku/src/libs/compat/freebsd_network/compat/dev/mii/
H A Dmii_bitbang.h51 int phy, int reg);
54 int phy, int reg, int val);
H A Dmiivar.h186 int __haiku_miibus_readreg(device_t dev, int phy, int reg);
187 int __haiku_miibus_writereg(device_t dev, int phy, int reg, int data);
192 #define MIIBUS_READREG(dev, phy, reg) \
193 __haiku_miibus_readreg((dev), (phy), (reg))
195 #define MIIBUS_WRITEREG(dev, phy, reg, value) \
196 __haiku_miibus_writereg((dev), (phy), (reg), (value))
/haiku/src/libs/compat/freebsd_network/
H A Dfbsd_mii.c240 device_t *children, phy; local
267 phy = device_add_child(dev, name, unit);
268 if (phy == NULL) {
278 device_set_ivars(phy, ma);
290 miibus_readreg(device_t dev, int phy, int reg) argument
295 return (MIIBUS_READREG(parent, phy, reg));
299 miibus_writereg(device_t dev, int phy, int reg, int data) argument
304 return (MIIBUS_WRITEREG(parent, phy, reg, data));
373 device_t *children, phy; local
497 phy
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H A Dfbsd_mii_bitbang.c118 mii_bitbang_readreg(device_t dev, mii_bitbang_ops_t ops, int phy, int reg) argument
126 mii_bitbang_sendbits(dev, ops, phy, 5);
166 mii_bitbang_writereg(device_t dev, mii_bitbang_ops_t ops, int phy, int reg, argument
174 mii_bitbang_sendbits(dev, ops, phy, 5);
H A Dmii.c19 __haiku_miibus_readreg(device_t device, int phy, int reg) argument
24 return device->methods.miibus_readreg(device, phy, reg);
29 __haiku_miibus_writereg(device_t device, int phy, int reg, int data) argument
34 return device->methods.miibus_writereg(device, phy, reg, data);
/haiku/headers/private/virtio/
H A Dvirtio.h97 status_t (*setup_queue)(void* cookie, uint16 queue, phys_addr_t phy, phys_addr_t phyAvail,
/haiku/src/add-ons/kernel/bus_managers/virtio/
H A DVirtioQueue.cpp18 alloc_mem(void **virt, phys_addr_t *phy, size_t size, uint32 protection, argument
43 if (phy)
44 *phy = pe.address;
45 TRACE("area = %" B_PRId32 ", size = %ld, virt = %p, phy = %#" B_PRIxPHYSADDR "\n",
/haiku/src/add-ons/kernel/busses/virtio/virtio_pci/
H A Dvirtio_pci.cpp415 setup_queue(void* cookie, uint16 queue, phys_addr_t phy, phys_addr_t phyAvail, argument
430 *queueDesc = phy;
447 (uint32)phy >> VIRTIO_PCI_QUEUE_ADDR_SHIFT);
/haiku/src/add-ons/kernel/drivers/audio/generic/
H A Dutil.c67 alloc_mem(phys_addr_t *phy, void **log, size_t size, const char *name, bool user) argument
101 if (phy)
102 *phy = pe.address;
103 LOG(("area = %d, size = %d, log = %#08X, phy = %#08X\n", area, size, logadr,
110 map_mem(void **log, phys_addr_t phy, size_t size, const char *name) argument
117 LOG(("mapping physical address %p with %#x bytes for %s\n",phy,size,name));
119 offset = (uint32)phy & (B_PAGE_SIZE - 1);
120 phyadr = phy - offset;
127 phy, *log, offset, phyadr, mapadr, size, area));
H A Dutil.h37 area_id alloc_mem(phys_addr_t *phy, void **log, size_t size, const char *name,
39 area_id map_mem(void **log, phys_addr_t phy, size_t size, const char *name);
/haiku/src/add-ons/kernel/drivers/network/ether/3com/dev/mii/
H A Dukphy_subr.c61 ukphy_status(struct mii_softc *phy) argument
63 struct mii_data *mii = phy->mii_pdata;
70 bmsr = PHY_READ(phy, MII_BMSR) | PHY_READ(phy, MII_BMSR);
74 bmcr = PHY_READ(phy, MII_BMCR);
96 anlpar = PHY_READ(phy, MII_ANAR) & PHY_READ(phy, MII_ANLPAR);
97 if ((phy->mii_flags & MIIF_HAVE_GTCR) != 0 &&
98 (phy->mii_extcapabilities &
100 gtcr = PHY_READ(phy, MII_100T2C
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/haiku/src/add-ons/kernel/drivers/network/ether/3com/dev/xl/
H A Dif_xl.c417 xl_miibus_readreg(device_t dev, int phy, int reg) argument
426 return (mii_bitbang_readreg(dev, &xl_mii_bitbang_ops, phy, reg));
430 xl_miibus_writereg(device_t dev, int phy, int reg, int data) argument
439 mii_bitbang_writereg(dev, &xl_mii_bitbang_ops, phy, reg, data);
1075 int error = 0, phy, rid, res, unit; local
1406 phy = MII_PHY_ANY;
1408 phy = 24;
1410 xl_ifmedia_sts, BMSR_DEFCAPMASK, phy, MII_OFFSET_ANY,
/haiku/src/add-ons/kernel/drivers/network/ether/atheros813x/dev/alc/
H A Dif_alc.c273 alc_miibus_readreg(device_t dev, int phy, int reg) argument
280 v = alc_mii_readreg_816x(sc, phy, reg);
282 v = alc_mii_readreg_813x(sc, phy, reg);
287 alc_mii_readreg_813x(struct alc_softc *sc, int phy, int reg) argument
312 device_printf(sc->alc_dev, "phy read timeout : %d\n", reg);
320 alc_mii_readreg_816x(struct alc_softc *sc, int phy, int reg) argument
339 device_printf(sc->alc_dev, "phy read timeout : %d\n", reg);
347 alc_miibus_writereg(device_t dev, int phy, int reg, int val) argument
354 v = alc_mii_writereg_816x(sc, phy, reg, val);
356 v = alc_mii_writereg_813x(sc, phy, re
361 alc_mii_writereg_813x(struct alc_softc *sc, int phy, int reg, int val) argument
383 alc_mii_writereg_816x(struct alc_softc *sc, int phy, int reg, int val) argument
[all...]
/haiku/src/add-ons/kernel/drivers/network/ether/atheros813x/dev/mii/
H A Dukphy_subr.c61 ukphy_status(struct mii_softc *phy) argument
63 struct mii_data *mii = phy->mii_pdata;
70 bmsr = PHY_READ(phy, MII_BMSR) | PHY_READ(phy, MII_BMSR);
74 bmcr = PHY_READ(phy, MII_BMCR);
96 anlpar = PHY_READ(phy, MII_ANAR) & PHY_READ(phy, MII_ANLPAR);
97 if ((phy->mii_flags & MIIF_HAVE_GTCR) != 0 &&
98 (phy->mii_extcapabilities &
100 gtcr = PHY_READ(phy, MII_100T2C
[all...]
/haiku/src/add-ons/kernel/drivers/network/ether/atheros81xx/dev/ale/
H A Dif_ale.c206 ale_miibus_readreg(device_t dev, int phy, int reg) argument
224 device_printf(sc->ale_dev, "phy read timeout : %d\n", reg);
232 ale_miibus_writereg(device_t dev, int phy, int reg, int val) argument
251 device_printf(sc->ale_dev, "phy write timeout : %d\n", reg);
1430 * handled in suspend method in phy driver.
/haiku/src/add-ons/kernel/drivers/network/ether/atheros81xx/dev/mii/
H A Dukphy_subr.c61 ukphy_status(struct mii_softc *phy) argument
63 struct mii_data *mii = phy->mii_pdata;
70 bmsr = PHY_READ(phy, MII_BMSR) | PHY_READ(phy, MII_BMSR);
74 bmcr = PHY_READ(phy, MII_BMCR);
96 anlpar = PHY_READ(phy, MII_ANAR) & PHY_READ(phy, MII_ANLPAR);
97 if ((phy->mii_flags & MIIF_HAVE_GTCR) != 0 &&
98 (phy->mii_extcapabilities &
100 gtcr = PHY_READ(phy, MII_100T2C
[all...]

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