Searched refs:pd_addr (Results 1 - 25 of 60) sorted by path

123

/linux-master/drivers/clk/mediatek/
H A Dclk-fhctl.c165 regval = readl(pll->pd_addr) >> pll->data->pd_shift;
175 regval = readl(pll->pd_addr);
178 writel(regval, pll->pd_addr);
H A Dclk-pll.c102 val = readl(pll->pd_addr);
107 if (pll->pd_addr != pll->pcw_addr) {
108 writel(val, pll->pd_addr);
194 postdiv = (readl(pll->pd_addr) >> pll->data->pd_shift) & POSTDIV_MASK;
297 pll->pd_addr = base + data->pd_reg;
H A Dclk-pll.h64 void __iomem *pd_addr; member in struct:mtk_clk_pll
/linux-master/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_gmc.c130 uint64_t pd_addr; local
136 amdgpu_gmc_get_pde_for_bo(bo, -1, &pd_addr, &flags);
137 pd_addr |= flags;
139 pd_addr = amdgpu_bo_gpu_offset(bo);
141 return pd_addr;
H A Damdgpu_gmc.h138 uint64_t pd_addr);
H A Damdgpu_ring.h197 uint64_t pd_addr);
H A Damdgpu_trace.h228 __field(u64, pd_addr)
237 __entry->pd_addr = job->vm_pd_addr;
240 TP_printk("pasid=%d, ring=%s, id=%u, hub=%u, pd_addr=%010Lx needs_flush=%u",
242 __entry->vm_hub, __entry->pd_addr, __entry->needs_flush)
418 uint64_t pd_addr),
419 TP_ARGS(ring, vmid, pd_addr),
424 __field(u64, pd_addr)
431 __entry->pd_addr = pd_addr;
433 TP_printk("ring=%s, id=%u, hub=%u, pd_addr
[all...]
H A Damdgpu_vpe.c574 uint64_t pd_addr)
576 amdgpu_gmc_emit_flush_gpu_tlb(ring, vmid, pd_addr);
573 vpe_ring_emit_vm_flush(struct amdgpu_ring *ring, unsigned int vmid, uint64_t pd_addr) argument
H A Dcik_sdma.c842 * @pd_addr: address
848 unsigned vmid, uint64_t pd_addr)
853 amdgpu_gmc_emit_flush_gpu_tlb(ring, vmid, pd_addr);
847 cik_sdma_ring_emit_vm_flush(struct amdgpu_ring *ring, unsigned vmid, uint64_t pd_addr) argument
H A Dgfx_v10_0.c8467 unsigned int vmid, uint64_t pd_addr)
8472 amdgpu_gmc_emit_flush_gpu_tlb(ring, vmid, pd_addr);
8466 gfx_v10_0_ring_emit_vm_flush(struct amdgpu_ring *ring, unsigned int vmid, uint64_t pd_addr) argument
H A Dgfx_v11_0.c5451 unsigned vmid, uint64_t pd_addr)
5456 amdgpu_gmc_emit_flush_gpu_tlb(ring, vmid, pd_addr);
5450 gfx_v11_0_ring_emit_vm_flush(struct amdgpu_ring *ring, unsigned vmid, uint64_t pd_addr) argument
H A Dgfx_v6_0.c2291 unsigned vmid, uint64_t pd_addr)
2295 amdgpu_gmc_emit_flush_gpu_tlb(ring, vmid, pd_addr);
2290 gfx_v6_0_ring_emit_vm_flush(struct amdgpu_ring *ring, unsigned vmid, uint64_t pd_addr) argument
H A Dgfx_v7_0.c3171 * @pd_addr: address
3177 unsigned vmid, uint64_t pd_addr)
3181 amdgpu_gmc_emit_flush_gpu_tlb(ring, vmid, pd_addr);
3176 gfx_v7_0_ring_emit_vm_flush(struct amdgpu_ring *ring, unsigned vmid, uint64_t pd_addr) argument
H A Dgfx_v8_0.c6205 unsigned vmid, uint64_t pd_addr)
6209 amdgpu_gmc_emit_flush_gpu_tlb(ring, vmid, pd_addr);
6204 gfx_v8_0_ring_emit_vm_flush(struct amdgpu_ring *ring, unsigned vmid, uint64_t pd_addr) argument
H A Dgfx_v9_0.c5342 unsigned vmid, uint64_t pd_addr)
5344 amdgpu_gmc_emit_flush_gpu_tlb(ring, vmid, pd_addr);
5341 gfx_v9_0_ring_emit_vm_flush(struct amdgpu_ring *ring, unsigned vmid, uint64_t pd_addr) argument
H A Dgfx_v9_4_3.c2652 unsigned vmid, uint64_t pd_addr)
2654 amdgpu_gmc_emit_flush_gpu_tlb(ring, vmid, pd_addr);
2651 gfx_v9_4_3_ring_emit_vm_flush(struct amdgpu_ring *ring, unsigned vmid, uint64_t pd_addr) argument
H A Dgmc_v10_0.c374 unsigned int vmid, uint64_t pd_addr)
397 lower_32_bits(pd_addr));
401 upper_32_bits(pd_addr));
418 return pd_addr;
373 gmc_v10_0_emit_flush_gpu_tlb(struct amdgpu_ring *ring, unsigned int vmid, uint64_t pd_addr) argument
H A Dgmc_v11_0.c340 unsigned int vmid, uint64_t pd_addr)
363 lower_32_bits(pd_addr));
367 upper_32_bits(pd_addr));
384 return pd_addr;
339 gmc_v11_0_emit_flush_gpu_tlb(struct amdgpu_ring *ring, unsigned int vmid, uint64_t pd_addr) argument
H A Dgmc_v6_0.c355 unsigned int vmid, uint64_t pd_addr)
364 amdgpu_ring_emit_wreg(ring, reg, pd_addr >> 12);
369 return pd_addr;
354 gmc_v6_0_emit_flush_gpu_tlb(struct amdgpu_ring *ring, unsigned int vmid, uint64_t pd_addr) argument
H A Dgmc_v7_0.c470 unsigned int vmid, uint64_t pd_addr)
478 amdgpu_ring_emit_wreg(ring, reg, pd_addr >> 12);
483 return pd_addr;
469 gmc_v7_0_emit_flush_gpu_tlb(struct amdgpu_ring *ring, unsigned int vmid, uint64_t pd_addr) argument
H A Dgmc_v8_0.c660 unsigned int vmid, uint64_t pd_addr)
668 amdgpu_ring_emit_wreg(ring, reg, pd_addr >> 12);
673 return pd_addr;
659 gmc_v8_0_emit_flush_gpu_tlb(struct amdgpu_ring *ring, unsigned int vmid, uint64_t pd_addr) argument
H A Dgmc_v9_0.c966 unsigned int vmid, uint64_t pd_addr)
990 lower_32_bits(pd_addr));
994 upper_32_bits(pd_addr));
1011 return pd_addr;
965 gmc_v9_0_emit_flush_gpu_tlb(struct amdgpu_ring *ring, unsigned int vmid, uint64_t pd_addr) argument
H A Djpeg_v1_0.c377 unsigned vmid, uint64_t pd_addr)
382 pd_addr = amdgpu_gmc_emit_flush_gpu_tlb(ring, vmid, pd_addr);
386 data1 = lower_32_bits(pd_addr);
376 jpeg_v1_0_decode_ring_emit_vm_flush(struct amdgpu_ring *ring, unsigned vmid, uint64_t pd_addr) argument
H A Djpeg_v2_0.c616 unsigned vmid, uint64_t pd_addr)
621 pd_addr = amdgpu_gmc_emit_flush_gpu_tlb(ring, vmid, pd_addr);
625 data1 = lower_32_bits(pd_addr);
615 jpeg_v2_0_dec_ring_emit_vm_flush(struct amdgpu_ring *ring, unsigned vmid, uint64_t pd_addr) argument
H A Djpeg_v2_0.h57 unsigned vmid, uint64_t pd_addr);

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