Searched refs:num_descs (Results 1 - 25 of 49) sorted by path

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/linux-master/drivers/dma/ioat/
H A Dprep.c110 int num_descs, idx, i; local
115 num_descs = ioat_xferlen_to_descs(ioat_chan, len);
116 if (likely(num_descs) &&
117 ioat_check_space_lock(ioat_chan, num_descs) == 0)
137 } while (++i < num_descs);
164 int num_descs, with_ext, idx, i; local
170 num_descs = ioat_xferlen_to_descs(ioat_chan, len);
176 num_descs *= 2;
185 if (likely(num_descs) &&
186 ioat_check_space_lock(ioat_chan, num_descs
355 int i, s, idx, with_ext, num_descs; local
475 int i, s, idx, num_descs; local
[all...]
H A Ddma.c461 * @num_descs: allocation length
463 int ioat_check_space_lock(struct ioatdma_chan *ioat_chan, int num_descs)
471 if (likely(ioat_ring_space(ioat_chan) > num_descs)) {
472 dev_dbg(to_dev(ioat_chan), "%s: num_descs: %d (%x:%x:%x)\n",
473 __func__, num_descs, ioat_chan->head, variable
475 ioat_chan->produce = num_descs;
481 "%s: ring full! num_descs: %d (%x:%x:%x)\n",
482 __func__, num_descs, ioat_chan->head, variable
H A Ddma.h334 u16 num_descs = len >> ioat_chan->xfercap_log; local
336 num_descs += !!(len & ((1 << ioat_chan->xfercap_log) - 1));
337 return num_descs;
397 int ioat_check_space_lock(struct ioatdma_chan *ioat_chan, int num_descs);
/linux-master/drivers/net/ethernet/cavium/liquidio/
H A Docteon_droq.h339 u32 num_descs,
403 u32 num_descs, u32 desc_size, void *app_ctx);
H A Docteon_iq.h350 u32 num_descs);
394 int q_index, union oct_txpciq iq_no, u32 num_descs,
H A Dlio_core.c538 * @num_descs: how many descriptors
542 static int octeon_setup_droq(struct octeon_device *oct, int q_no, int num_descs, argument
549 ret_val = octeon_create_droq(oct, q_no, num_descs, desc_size, app_ctx);
H A Docteon_device.c874 u32 num_descs = 0; local
880 num_descs =
883 num_descs = CFG_GET_NUM_DEF_TX_DESCS(CHIP_CONF(oct, cn23xx_pf));
885 num_descs = CFG_GET_NUM_DEF_TX_DESCS(CHIP_CONF(oct, cn23xx_vf));
905 if (octeon_init_instr_queue(oct, txpciq, num_descs)) {
919 u32 num_descs = 0; local
925 num_descs =
930 num_descs = CFG_GET_NUM_DEF_RX_DESCS(CHIP_CONF(oct, cn23xx_pf));
933 num_descs = CFG_GET_NUM_DEF_RX_DESCS(CHIP_CONF(oct, cn23xx_vf));
943 if (octeon_init_droq(oct, oq_no, num_descs, desc_siz
[all...]
H A Docteon_droq.c224 u32 num_descs,
245 c_num_descs = num_descs;
930 u32 q_no, u32 num_descs,
956 if (octeon_init_droq(oct, q_no, num_descs, desc_size, app_ctx)) {
222 octeon_init_droq(struct octeon_device *oct, u32 q_no, u32 num_descs, u32 desc_size, void *app_ctx) argument
929 octeon_create_droq(struct octeon_device *oct, u32 q_no, u32 num_descs, u32 desc_size, void *app_ctx) argument
H A Drequest_manager.c49 u32 num_descs)
71 q_size = (u32)conf->instr_type * num_descs;
84 iq->max_count = num_descs;
89 iq->request_list = vzalloc_node(array_size(num_descs, sizeof(*iq->request_list)),
92 iq->request_list = vzalloc(array_size(num_descs, sizeof(*iq->request_list)));
195 u32 num_descs,
221 if (octeon_init_instr_queue(oct, txpciq, num_descs)) {
47 octeon_init_instr_queue(struct octeon_device *oct, union oct_txpciq txpciq, u32 num_descs) argument
191 octeon_setup_iq(struct octeon_device *oct, int ifidx, int q_index, union oct_txpciq txpciq, u32 num_descs, void *app_ctx) argument
/linux-master/drivers/net/wireless/ti/wl1251/
H A Dacx.c893 mem_conf->rx_queue_config.num_descs = ACX_RX_DESC_DEF;
899 mem_conf->tx_queue_config[i].num_descs = ACX_TX_DESC_DEF;
/linux-master/drivers/dma/bestcomm/
H A Dbestcomm.c205 int num_descs; local
217 num_descs = bcom_task_num_descs(task);
219 for (i=0; i<num_descs; i++, desc++) {
H A Dfec.c169 int num_descs; local
173 num_descs = bcom_task_num_descs(tasknum);
174 desc = bcom_task_desc(tasknum) + num_descs - 1;
176 for (i=0; i<num_descs; i++, desc--)
/linux-master/drivers/dma/idxd/
H A Ddevice.c45 for (i = 0; i < wq->num_descs; i++)
78 for (i = 0; i < wq->num_descs; i++)
112 int rc, num_descs, i; local
117 num_descs = wq_dedicated(wq) ? wq->size : wq->threshold;
118 wq->num_descs = num_descs;
120 rc = alloc_hw_descs(wq, num_descs);
124 wq->compls_size = num_descs * idxd->data->compl_size;
131 rc = alloc_descs(wq, num_descs);
135 rc = sbitmap_queue_init_node(&wq->sbq, num_descs,
[all...]
H A Ddma.c265 for (i = 0; i < wq->num_descs; i++) {
H A Didxd.h222 int num_descs; member in struct:idxd_wq
/linux-master/drivers/gpio/
H A Dgpiolib-cdev.c73 * @num_descs: the number of descriptors held in the descs array
79 u32 num_descs; member in struct:linehandle_state
172 for (i = 0; i < lh->num_descs; i++) {
216 lh->num_descs, lh->descs,
222 for (i = 0; i < lh->num_descs; i++)
241 for (i = 0; i < lh->num_descs; i++)
247 lh->num_descs,
270 for (i = 0; i < lh->num_descs; i++)
329 lh->num_descs = handlereq.lines;
402 lh->num_descs);
[all...]
/linux-master/drivers/media/i2c/ccs/
H A Dccs-data.c731 pdgroup->num_descs = *__num_pixel_descs;
H A Dccs-data.h149 * @num_descs: Number of descriptors in @descs
153 u8 num_descs; member in struct:ccs_pdaf_pix_loc_pixel_desc_group
/linux-master/drivers/net/ethernet/amazon/ena/
H A Dena_eth_com.c234 u16 *num_descs)
268 *num_descs = count;
277 *num_descs = 0;
232 ena_com_cdesc_rx_pkt_get(struct ena_com_io_cq *io_cq, u16 *first_cdesc_idx, u16 *num_descs) argument
H A Dena_eth_com.h127 u16 num_descs; local
133 num_descs = ena_tx_ctx->num_bufs;
137 ++num_descs;
139 if (num_descs > llq_info->descs_num_before_header) {
140 descs_after_first_entry = num_descs - llq_info->descs_num_before_header;
146 "Queue: %d num_descs: %d num_entries_needed: %d\n", io_sq->qid, num_descs, local
H A Dena_netdev.c1171 static int ena_xdp_handle_buff(struct ena_ring *rx_ring, struct xdp_buff *xdp, u16 num_descs) argument
1177 if (unlikely(num_descs > 1)) {
/linux-master/drivers/net/ethernet/amd/pds_core/
H A Dadminq.c53 cq->tail_idx = (cq->tail_idx + 1) & (cq->num_descs - 1);
110 q->tail_idx = (q->tail_idx + 1) & (q->num_descs - 1);
117 if (cq->tail_idx == cq->num_descs - 1)
119 cq->tail_idx = (cq->tail_idx + 1) & (cq->num_descs - 1);
180 avail += q->num_descs - q->head_idx - 1;
218 q->head_idx = (q->head_idx + 1) & (q->num_descs - 1);
H A Dcore.c170 for (i = 0, cur = q->info; i < q->num_descs; i++, cur++)
182 for (i = 0, cur = cq->info; i < cq->num_descs; i++, cur++)
187 const char *name, unsigned int flags, unsigned int num_descs,
197 qcq->q.info = vcalloc(num_descs, sizeof(*qcq->q.info));
209 qcq->q.num_descs = num_descs;
220 qcq->cq.info = vcalloc(num_descs, sizeof(*qcq->cq.info));
226 qcq->cq.num_descs = num_descs;
234 ALIGN(num_descs * desc_siz
186 pdsc_qcq_alloc(struct pdsc *pdsc, unsigned int type, unsigned int index, const char *name, unsigned int flags, unsigned int num_descs, unsigned int desc_size, unsigned int cq_desc_size, unsigned int pid, struct pdsc_qcq *qcq) argument
[all...]
H A Dcore.h56 unsigned int num_descs; member in struct:pdsc_queue
109 unsigned int num_descs; member in struct:pdsc_cq
294 const char *name, unsigned int flags, unsigned int num_descs,
H A Ddebugfs.c130 debugfs_create_u32("num_descs", 0400, q_dentry, &q->num_descs);
142 debugfs_create_u32("num_descs", 0400, cq_dentry, &cq->num_descs);

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