Searched refs:interrupt (Results 1 - 25 of 4542) sorted by last modified time

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/linux-master/drivers/tee/optee/
H A Dsmc_abi.c13 #include <linux/interrupt.h>
843 * A foreign interrupt was raised while secure world was
845 * performed to let Linux take the interrupt through the normal
/linux-master/drivers/soc/ti/
H A Dwkup_m3_ipc.c15 #include <linux/interrupt.h>
326 * interrupt to alert the M3 that data is available in the IPC
/linux-master/drivers/soc/tegra/
H A Dpmc.c26 #include <linux/interrupt.h>
56 #include <dt-bindings/interrupt-controller/arm-gic.h>
4413 * Invert the interrupt polarity if a PMC device tree node
4414 * exists and contains the nvidia,invert-interrupt property.
4416 invert = of_property_read_bool(np, "nvidia,invert-interrupt");
/linux-master/drivers/soc/qcom/
H A Drpmh-rsc.c12 #include <linux/interrupt.h>
431 * tcs_tx_done() - TX Done interrupt handler.
459 * disable interrupt for this TCS
470 * Disable interrupt for WAKE TCS to avoid being
640 * the interrupt handler to run. If the interrupts is set to run on the
679 * to these registers until the interrupt goes off.
680 * - The interrupt can't go off until we trigger w/ the last line
H A Dicc-bwmon.c11 #include <linux/interrupt.h>
117 * be reached, to trigger interrupt in given zone.
273 * No concurrent access expected - driver has one interrupt handler,
293 * No concurrent access expected - driver has one interrupt handler,
360 * No concurrent access expected - driver has one interrupt handler,
437 * No concurrent access expected - driver has one interrupt handler,
484 * Synchronize the local interrupt clear in mon_irq_clear()
485 * with the global interrupt clear here. Otherwise, the CPU
486 * may reorder the two writes and clear the global interrupt
487 * before the local interrupt, causin
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/linux-master/drivers/s390/crypto/
H A Dap_queue.c41 * ap_queue_enable_irq(): Enable interrupt support on this AP queue.
661 static DEVICE_ATTR_RO(interrupt);
H A Dap_bus.c23 #include <linux/interrupt.h>
71 MODULE_PARM_DESC(useirq, "Use interrupt if available, default is 1 (on).");
145 /* Adapter interrupt definitions */
157 * ap_airq_ptr() - Get the address of the adapter interrupt indicator
160 * interrupt handler for AP, or NULL if adapter interrupts are not
427 * ap_interrupt_handler() - Schedule ap_tasklet on interrupt
428 * @airq: pointer to adapter interrupt descriptor
/linux-master/drivers/firmware/qcom/
H A Dqcom_scm.c17 #include <linux/interrupt.h>
427 * This is an end point to power down cpu. If there was a pending interrupt,
/linux-master/drivers/firmware/arm_ffa/
H A Ddriver.c31 #include <linux/interrupt.h>
/linux-master/drivers/edac/
H A Dsynopsys_edac.c13 #include <linux/interrupt.h>
568 * Return: IRQ_NONE, if interrupt not set or IRQ_HANDLED otherwise.
/linux-master/drivers/bus/
H A Dbrcmstb_gisb.c11 #include <linux/interrupt.h>
528 * do this before the GISB timeout interrupt handler has any chance to run.
/linux-master/arch/arm/mach-imx/
H A Dmmdc.c11 #include <linux/interrupt.h>
336 * hrtimer is required because mmdc does not provide an interrupt so
/linux-master/mm/
H A Dvmalloc.c18 #include <linux/interrupt.h>
3300 * May sleep if called *not* from interrupt context.
3356 * Must not be called in interrupt context.
/linux-master/drivers/spi/
H A Dspi-stm32.c13 #include <linux/interrupt.h>
263 * @irq_handler_thread: thread of interrupt handler for SPI controller
306 * @irq: SPI controller interrupt line
925 * @irq: interrupt line
939 * BSY flag is not handled in interrupt but it is normal behavior when
1012 * stm32fx_spi_irq_thread - Thread of interrupt handler for SPI controller
1013 * @irq: interrupt line
1026 * stm32h7_spi_irq_thread - Thread of interrupt handler for SPI controller
1027 * @irq: interrupt line
1297 * interrupt onl
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H A Dspi-microchip-core-qspi.c14 #include <linux/interrupt.h>
/linux-master/drivers/nvme/host/
H A Dpci.c15 #include <linux/interrupt.h>
1101 * Poll for completions for any interrupt driven queue
1308 * Did we miss an interrupt?
1588 wmb(); /* ensure the first interrupt sees the initialization */
2182 * queues. The core already reserved an interrupt for the admin queue.
2190 * If there is no interrupt available for queues, ensure that
2194 * If only one interrupt is available or 'write_queue' == 0, combine
2237 * Initialize for the single interrupt case, will be updated in
2328 /* Deregister the admin queue's interrupt */
2350 * more queues than interrupt vector
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/linux-master/drivers/gpu/drm/xe/
H A Dxe_guc_ct_types.h9 #include <linux/interrupt.h>
/linux-master/drivers/gpio/
H A Dgpiolib.c14 #include <linux/interrupt.h>
110 return "interrupt";
1183 * Annotate this function before anyone tries to use it in interrupt
1342 * @irqchip: the irqchip to handle this level of the hierarchy, the interrupt
1513 * @reserve: If set, only reserve an interrupt vector instead of assigning one
H A Dgpiolib-cdev.c17 #include <linux/interrupt.h>
419 * @irq: the interrupt triggered in response to events on this GPIO
884 * We may be running from a nested threaded interrupt in
1893 * @irq: the interrupt that trigger in response to events on this GPIO
2101 * We may be running from a nested threaded interrupt in which case
/linux-master/net/xfrm/
H A Dxfrm_input.c13 #include <linux/interrupt.h>
/linux-master/net/core/
H A Drtnetlink.c28 #include <linux/interrupt.h>
/linux-master/include/net/
H A Dxfrm.h29 #include <linux/interrupt.h>
/linux-master/drivers/net/ethernet/micrel/
H A Dks8851_common.c11 #include <linux/interrupt.h>
316 * ks8851_irq - IRQ handler for dealing with interrupt requests
324 * Read the interrupt status, work out what needs to be done and then clear
383 /* the datasheet says to disable the rx interrupt during
384 * packet read-out, however we're masking the interrupt
594 * then wait for the interrupt handler to be triggered once the RXQ shutdown is
595 * complete. The interrupt handler then writes the new values into the chip.
/linux-master/drivers/net/ethernet/hisilicon/hns3/hns3pf/
H A Dhclge_main.c8 #include <linux/interrupt.h>
3539 * interrupt from H/W just for the mailbox.
3544 dev_info(&hdev->pdev->dev, "IMP reset interrupt\n");
3553 dev_info(&hdev->pdev->dev, "global reset interrupt\n");
3632 /* vector 0 interrupt is shared with reset and mailbox source events. */
3653 * mbx messages reported by this interrupt.
3665 /* Enable interrupt if it is not caused by reset event or error event */
4062 /* For revision 0x20, the reset interrupt source
4173 "reset failed because new reset interrupt\n");
4481 /* enable interrupt afte
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/linux-master/drivers/net/dsa/mv88e6xxx/
H A Dchip.c19 #include <linux/interrupt.h>
321 /* Reading the interrupt status clears (most of) them */
3153 * loading EEPROM, the reset may interrupt the I2C transaction
7223 * the PHYs will link their interrupts to these interrupt

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