| /linux-master/arch/arm/include/asm/hardware/ |
| H A D | ssp.h | 11 unsigned int cr0; member in struct:ssp_state
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| /linux-master/arch/arm/mach-sa1100/ |
| H A D | ssp.c | 160 ssp->cr0 = Ser4SSCR0;
176 Ser4SSCR0 = ssp->cr0 & ~SSCR0_SSE;
178 Ser4SSCR0 = ssp->cr0;
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| /linux-master/arch/parisc/include/asm/ |
| H A D | asmregs.h | 117 rctr: .reg %cr0
144 cr0: .reg %cr0
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| H A D | kgdb.h | 52 unsigned long cr0; member in struct:parisc_gdb_regs
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| /linux-master/arch/parisc/include/uapi/asm/ |
| H A D | ptrace.h | 61 unsigned long cr0; member in struct:user_regs_struct
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| /linux-master/arch/powerpc/kvm/ |
| H A D | book3s_64_slb.S | 77 cmpd cr0, r11, r12
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| /linux-master/arch/powerpc/platforms/52xx/ |
| H A D | mpc52xx_sleep.S | 34 cmpi cr0, r10, 1
35 bne cr0, 1b
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| /linux-master/arch/arm/include/asm/ |
| H A D | vfp.h | 13 #define FPSID cr0
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| H A D | vfpmacros.h | 22 MRC\cond p10, 7, \rd, \sysreg, cr0, 0 @ FMRX \rd, \sysreg
26 MCR\cond p10, 7, \rd, \sysreg, cr0, 0 @ FMXR \sysreg, \rd
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| /linux-master/arch/arm/mach-mvebu/ |
| H A D | coherency_ll.S | 62 mrc p15, 0, r3, cr0, cr0, 5
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| H A D | pmsu_ll.S | 16 mrc p15, 0, r0, cr0, cr0, 5 @ get the CPU ID
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| /linux-master/arch/parisc/kernel/ |
| H A D | entry.S | 776 mtctl %r0, %cr0 /* Needed for single stepping */
1822 mtctl %r2,%cr0 /* for immediate trap */
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| H A D | ptrace.c | 460 case RI(cr0): return mfctl(0);
513 case cr0, cr24, cr25, cr26, cr27, cr28, cr29, cr30, cr31;
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| /linux-master/arch/powerpc/boot/ |
| H A D | 4xx.c | 334 u32 cr0 = mfdcr(DCRN_CPC0_CR0); local
364 if (cr0 & CPC0_CR0_U0EC)
369 uart0 = plb / CPC0_CR0_UDIV(cr0);
371 if (cr0 & CPC0_CR0_U1EC)
376 uart1 = plb / CPC0_CR0_UDIV(cr0);
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| H A D | crt0.S | 120 cmplw cr0,r9,r8
131 cmplw cr0,r9,r8
210 cmpld cr0,r9,r8
221 cmpld cr0,r9,r8
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| H A D | ppc_asm.h | 13 #define cr0 0 macro
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| /linux-master/arch/powerpc/include/asm/ |
| H A D | ppc_asm.h | 588 #define cr0 0 macro
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| /linux-master/arch/powerpc/kernel/ |
| H A D | cpu_setup_6xx.S | 214 cmpwi cr0,r10,7
217 cror 4*cr0+eq,4*cr0+eq,4*cr1+eq
218 cror 4*cr0+eq,4*cr0+eq,4*cr2+eq
362 cmplwi cr0,r3,0x8000 /* 7450 */
372 /* cr0 is 74xx */
373 cror 4*cr0+eq,4*cr0+eq,4*cr3+eq
374 cror 4*cr0
[all...] |
| H A D | entry_32.S | 139 cmplwi cr0,r5,0
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| H A D | exceptions-64e.S | 697 cmpld cr0,r10,r14
701 cmpld cr0, r10, r14
705 blt+ cr0,1f
768 cmpld cr0,r10,r14
772 cmpld cr0, r10, r14
776 blt+ cr0,1f
1474 cmpdi cr0,r28,0
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| H A D | exceptions-64s.S | 528 kuap_save_amr_and_lock r9, r10, cr1, cr0
1959 * inputs is: cr0, xer, ctr. We may use these as scratch regs upon entry
2241 cmpdi cr0,r3,0
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| H A D | head_44x.S | 811 cmplwi cr0,r3,PVR_476FPE@h
813 cmplwi cr0,r3,PVR_476@h
815 cmplwi cr0,r3,PVR_476_ISS@h
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| H A D | head_64.S | 541 cmpldi cr0,r5,0
630 cmplwi cr0,r7,1 /* flagged to stay where we are ? */
662 cmplwi cr0,r7,1
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| H A D | head_85xx.S | 790 mcrf cr0, cr5 /* Test for user page */
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| H A D | head_8xx.S | 49 cmpli cr0, \scratch, PAGE_OFFSET@h
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