Searched refs:base_reg (Results 1 - 25 of 56) sorted by last modified time

123

/linux-master/drivers/clk/
H A Dclk-en7523.c46 u32 base_reg; member in struct:en_clk_desc
84 .base_reg = REG_GSW_CLK_DIV_SEL,
97 .base_reg = REG_EMI_CLK_DIV_SEL,
110 .base_reg = REG_BUS_CLK_DIV_SEL,
123 .base_reg = REG_SPI_CLK_FREQ_SEL,
138 .base_reg = REG_SPI_CLK_DIV_SEL,
150 .base_reg = REG_NPU_CLK_DIV_SEL,
163 .base_reg = REG_CRYPTO_CLKSRC,
179 val = readl(base + desc->base_reg);
197 reg = desc->div_reg ? desc->div_reg : desc->base_reg;
[all...]
/linux-master/sound/soc/codecs/
H A Dwm5100.c396 #define WM5100_MIXER_ENUMS(name, base_reg) \
397 static WM5100_MUX_ENUM_DECL(name##_in1_enum, base_reg); \
398 static WM5100_MUX_ENUM_DECL(name##_in2_enum, base_reg + 2); \
399 static WM5100_MUX_ENUM_DECL(name##_in3_enum, base_reg + 4); \
400 static WM5100_MUX_ENUM_DECL(name##_in4_enum, base_reg + 6); \
H A Dwm2200.c1082 #define WM2200_MIXER_ENUMS(name, base_reg) \
1083 static WM2200_MUX_ENUM_DECL(name##_in1_enum, base_reg); \
1084 static WM2200_MUX_ENUM_DECL(name##_in2_enum, base_reg + 2); \
1085 static WM2200_MUX_ENUM_DECL(name##_in3_enum, base_reg + 4); \
1086 static WM2200_MUX_ENUM_DECL(name##_in4_enum, base_reg + 6); \
1092 #define WM2200_DSP_ENUMS(name, base_reg) \
1093 static WM2200_MUX_ENUM_DECL(name##_aux1_enum, base_reg); \
1094 static WM2200_MUX_ENUM_DECL(name##_aux2_enum, base_reg + 1); \
1095 static WM2200_MUX_ENUM_DECL(name##_aux3_enum, base_reg + 2); \
1096 static WM2200_MUX_ENUM_DECL(name##_aux4_enum, base_reg
[all...]
/linux-master/arch/x86/kvm/vmx/
H A Dnested.c5006 int base_reg = (vmx_instruction_info >> 23) & 0xf; local
5022 off += kvm_register_read(vcpu, base_reg);
/linux-master/drivers/net/wireless/intel/iwlwifi/pcie/
H A Dtrans.c978 iwl_write_prph(trans, le32_to_cpu(dest->base_reg),
3208 base = le32_to_cpu(trans->dbg.dest_tlv->base_reg);
3300 cfg_reg = le32_to_cpu(trans->dbg.dest_tlv->base_reg);
3312 base = le32_to_cpu(trans->dbg.dest_tlv->base_reg);
/linux-master/drivers/net/wireless/intel/iwlwifi/
H A Diwl-drv.c1594 * end shift. We now store these values in base_reg,
1598 dest_tlv->base_reg = pieces->dbg_dest_tlv->cfg_reg;
/linux-master/drivers/net/wireless/intel/iwlwifi/fw/
H A Dfile.h633 * @base_reg: addr of the base addr register (PRPH)
648 __le32 base_reg; member in struct:iwl_fw_dbg_dest_tlv_v1
/linux-master/drivers/base/regmap/
H A Dinternal.h26 unsigned int base_reg; member in struct:regmap_debugfs_off_cache
H A Dregmap-debugfs.c140 c->base_reg = i;
170 return c->base_reg + (reg_offset * map->reg_stride);
205 if (reg < c->base_reg) {
206 ret = c->base_reg;
403 c->base_reg, c->max_reg);
/linux-master/drivers/iio/imu/
H A Dkmx61.c786 u8 base_reg; local
793 base_reg = KMX61_ACC_XOUT_L;
796 base_reg = KMX61_MAG_XOUT_L;
809 ret = kmx61_read_measurement(data, base_reg, chan->scan_index);
/linux-master/drivers/media/platform/nxp/imx-jpeg/
H A Dmxc-jpeg.c836 void __iomem *reg = jpeg->base_reg;
884 void __iomem *reg = jpeg->base_reg;
1170 void __iomem *reg = jpeg->base_reg;
1236 void __iomem *reg = jpeg->base_reg;
1434 void __iomem *reg = jpeg->base_reg;
2777 jpeg->base_reg = devm_platform_ioremap_resource(pdev, 0);
2778 if (IS_ERR(jpeg->base_reg))
2779 return PTR_ERR(jpeg->base_reg);
H A Dmxc-jpeg.h130 void __iomem *base_reg; member in struct:mxc_jpeg_dev
/linux-master/arch/x86/kvm/
H A Demulate.c1170 static void adjust_modrm_seg(struct x86_emulate_ctxt *ctxt, int base_reg) argument
1172 if (base_reg == VCPU_REGS_RSP || base_reg == VCPU_REGS_RBP)
1180 int index_reg, base_reg, scale; local
1186 base_reg = (ctxt->rex_prefix << 3) & 8; /* REX.B */
1190 ctxt->modrm_rm = base_reg | (ctxt->modrm & 0x07);
1272 base_reg |= sib & 7;
1275 if ((base_reg & 7) == 5 && ctxt->modrm_mod == 0)
1278 modrm_ea += reg_read(ctxt, base_reg);
1279 adjust_modrm_seg(ctxt, base_reg);
[all...]
/linux-master/arch/mips/kernel/
H A Dmips-cm.c203 u32 base_reg; local
209 base_reg = read_gcr_l2_only_sync_base();
210 if (base_reg & CM_GCR_L2_ONLY_SYNC_BASE_SYNCEN)
211 return base_reg & CM_GCR_L2_ONLY_SYNC_BASE_SYNCBASE;
243 u32 base_reg; local
263 base_reg = read_gcr_base();
264 if ((base_reg & CM_GCR_BASE_GCRBASE) != addr) {
/linux-master/sound/soc/meson/
H A Daxg-spdifin.c118 unsigned int base_reg,
126 reg = offset * regmap_get_reg_stride(map) + base_reg;
115 axg_spdifin_write_mode_param(struct regmap *map, int mode, unsigned int val, unsigned int num_per_reg, unsigned int base_reg, unsigned int width) argument
/linux-master/drivers/media/dvb-frontends/
H A Dcx24117.c764 u8 base_reg = (state->demod == 0) ? local
768 ret = cx24117_readregN(state, base_reg, buf, 4);
/linux-master/drivers/gpu/drm/imx/dcss/
H A Ddcss-scaler.c69 void __iomem *base_reg; member in struct:dcss_scaler_ch
305 ch->base_reg = devm_ioremap(scl->dev, ch->base_ofs, SZ_4K);
306 if (!ch->base_reg) {
343 dcss_writel(0, ch->base_reg + DCSS_SCALER_CTRL);
H A Ddcss-dtg.c80 void __iomem *base_reg; member in struct:dcss_dtg
101 dcss_writel(val, dtg->base_reg + ofs);
112 status = dcss_readl(dtg->base_reg + DCSS_DTG_INT_STATUS);
119 dcss_writel(status & LINE0_IRQ, dtg->base_reg + DCSS_DTG_INT_CONTROL);
134 dtg->base_reg + DCSS_DTG_INT_MASK);
163 dtg->base_reg = devm_ioremap(dtg->dev, dtg_base, SZ_4K);
164 if (!dtg->base_reg) {
314 dtg->base_reg + DCSS_DTG_TC_CONTROL_STATUS);
347 status = dcss_readl(dtg->base_reg + DCSS_DTG_INT_STATUS);
349 dtg->base_reg
[all...]
H A Ddcss-ss.c64 void __iomem *base_reg; member in struct:dcss_ss
76 dcss_writel(val, ss->base_reg + ofs);
94 ss->base_reg = devm_ioremap(ss->dev, ss_base, SZ_4K);
95 if (!ss->base_reg) {
109 dcss_writel(0, ss->base_reg + DCSS_SS_SYS_CTRL);
172 dcss_writel(0, ss->base_reg + DCSS_SS_SYS_CTRL);
H A Ddcss-dpr.c93 void __iomem *base_reg; member in struct:dcss_dpr_ch
138 ch->base_reg = devm_ioremap(dpr->dev, ch->base_ofs, SZ_4K);
139 if (!ch->base_reg) {
148 dcss_writel(0xff, ch->base_reg + DCSS_DPR_IRQ_MASK);
181 dcss_writel(0, ch->base_reg + DCSS_DPR_SYSTEM_CTRL0);
H A Ddcss-blkctl.c26 void __iomem *base_reg; member in struct:dcss_blkctl
32 dcss_writel(0, blkctl->base_reg + DCSS_BLKCTL_CONTROL0);
35 blkctl->base_reg + DCSS_BLKCTL_CONTROL0);
38 blkctl->base_reg + DCSS_BLKCTL_RESET_CTRL);
49 blkctl->base_reg = devm_ioremap(dcss->dev, blkctl_base, SZ_4K);
50 if (!blkctl->base_reg) {
/linux-master/drivers/accel/habanalabs/goya/
H A Dgoya_coresight.c232 u64 base_reg; local
241 base_reg = debug_stm_regs[params->reg_idx] - CFG_BASE;
243 WREG32(base_reg + 0xFB0, CORESIGHT_UNLOCK);
251 WREG32(base_reg + 0xE80, 0x80004);
252 WREG32(base_reg + 0xD64, 7);
253 WREG32(base_reg + 0xD60, 0);
254 WREG32(base_reg + 0xD00, lower_32_bits(input->he_mask));
255 WREG32(base_reg + 0xD20, lower_32_bits(input->sp_mask));
256 WREG32(base_reg + 0xD60, 1);
257 WREG32(base_reg
305 u64 base_reg; local
487 u64 base_reg; local
507 u64 base_reg; local
578 u64 base_reg; local
[all...]
/linux-master/drivers/net/dsa/mv88e6xxx/
H A Dglobal2_scratch.c47 * @base_reg: base of scratch bits
52 int base_reg, unsigned int offset,
55 int reg = base_reg + (offset / 8);
72 * @base_reg: base of scratch bits
79 int base_reg, unsigned int offset,
82 int reg = base_reg + (offset / 8);
51 mv88e6xxx_g2_scratch_get_bit(struct mv88e6xxx_chip *chip, int base_reg, unsigned int offset, int *set) argument
78 mv88e6xxx_g2_scratch_set_bit(struct mv88e6xxx_chip *chip, int base_reg, unsigned int offset, int set) argument
/linux-master/drivers/edac/
H A Damd64_edac.c1450 u32 base_reg, base_reg_sec; local
1464 base_reg = umc_base_reg + (cs * 4);
1467 if (!amd_smn_read(pvt->mc_node_id, base_reg, base))
1469 umc, cs, *base, base_reg);
3667 u32 base_reg, mask_reg; local
3673 base_reg = gpu_get_umc_base(pvt, umc, cs) + UMCCH_BASE_ADDR;
3676 if (!amd_smn_read(pvt->mc_node_id, base_reg, base)) {
3678 umc, cs, *base, base_reg);
/linux-master/arch/powerpc/perf/
H A Dimc-pmu.c161 /* Add the base_reg value to the "reg" */
226 u32 handle, base_reg; local
257 of_property_read_u32(node, "reg", &base_reg);
269 ret = imc_parse_event(np, g_scale, g_unit, prefix, base_reg, &pmu->events[ct]);

Completed in 772 milliseconds

123