/linux-master/arch/arm/mach-orion5x/ |
H A D | terastation_pro2-setup.c | 279 writel(0x00, UART1_REG(IER));
|
H A D | tsx09-common.c | 36 writel(0x00, UART1_REG(IER));
|
H A D | kurobox_pro-setup.c | 301 writel(0x00, UART1_REG(IER));
|
/linux-master/arch/x86/boot/ |
H A D | early_serial_console.c | 14 #define IER 1 /* Interrupt Enable */ macro 32 outb(0, port + IER); /* no interrupt */
|
/linux-master/drivers/video/fbdev/ |
H A D | i740_reg.h | 229 #define IER 0x3030 macro
|
/linux-master/drivers/video/fbdev/i810/ |
H A D | i810_regs.h | 44 #define IER 0x020A0 macro
|
/linux-master/sound/pci/aw2/ |
H A D | saa7146.h | 27 #define IER 0xDC macro 50 /* PSR/ISR/IER */
|
/linux-master/arch/x86/kernel/ |
H A D | early_printk.c | 87 #define IER 1 /* Interrupt Enable */ macro 135 serial_out(early_serial_base, IER, 0); /* no interrupt */
|
/linux-master/drivers/clocksource/ |
H A D | timer-atmel-tcb.c | 101 writel(tcb_cache[i].imr, tcaddr + ATMEL_TC_REG(i, IER)); 186 writel(ATMEL_TC_CPCS, regs + ATMEL_TC_REG(2, IER)); 211 writel(ATMEL_TC_CPCS, regs + ATMEL_TC_REG(2, IER));
|
/linux-master/drivers/gpu/drm/gma500/ |
H A D | psb_intel_reg.h | 751 #define IER 0x020a0 macro
|
/linux-master/drivers/gpu/drm/i915/ |
H A D | i915_irq.h | 61 gen3_irq_reset((uncore), type##IMR, type##IIR, type##IER) 75 type##IER, ier_val, \
|
/linux-master/drivers/gpu/drm/xe/ |
H A D | xe_irq.c | 27 * ISR, IMR, IIR, IER. 31 #define IER(offset) XE_REG(offset + 0xc) macro 63 xe_mmio_write32(mmio, IER(irqregs), bits); 79 xe_mmio_write32(mmio, IER(irqregs), 0);
|
/linux-master/drivers/iio/adc/ |
H A D | at91-sama5d2_adc.c | 109 u16 IER; member in struct:at91_adc_reg_layout 263 .IER = 0x24, 298 .IER = 0x24, 837 at91_adc_writel(st, IER, BIT(channel)); 1009 at91_adc_writel(st, IER, AT91_SAMA5D2_IER_PEN); 1256 at91_adc_writel(st, IER, AT91_SAMA5D2_IER_GOVRE); 1332 at91_adc_writel(st, IER, AT91_SAMA5D2_IER_DRDY); 1650 at91_adc_writel(st, IER, AT91_SAMA5D2_IER_NOPEN | 1670 at91_adc_writel(st, IER, AT91_SAMA5D2_IER_PEN);
|
/linux-master/drivers/irqchip/ |
H A D | irq-xilinx-intc.c | 25 #define IER 0x08 /* Interrupt Enable Register */ macro 203 xintc_write(irqc, IER, 0);
|
/linux-master/drivers/macintosh/ |
H A D | via-cuda.c | 54 #define IER (14*RS) /* Interrupt enable register */ macro 84 /* Bits in IFR and IER */ 85 #define IER_SET 0x80 /* set bits in IER */ 86 #define IER_CLR 0 /* clear bits in IER */ 272 out_8(&via[IER], IER_SET|SR_INT); /* enable interrupt from SR */ 378 out_8(&via[IER], 0x7f); /* disable interrupts from VIA */ 379 (void)in_8(&via[IER]); 381 out_8(&via[IER], SR_INT); /* disable SR interrupt from VIA */
|
H A D | via-macii.c | 55 #define IER (14*RS) /* Interrupt enable register */ macro 67 /* Bits in IFR and IER */ 68 #define IER_SET 0x80 /* set bits in IER */ 69 #define IER_CLR 0 /* clear bits in IER */
|
H A D | via-pmu.c | 98 #define IER (14*RS) /* Interrupt enable register */ macro 115 /* Bits in IFR and IER */ 116 #define IER_SET 0x80 /* set bits in IER */ 117 #define IER_CLR 0 /* clear bits in IER */ 354 out_8(&via1[IER], IER_CLR | 0x7f); /* disable all intrs */ 465 out_8(&via1[IER], IER_SET | SR_INT | CB1_INT); 1316 out_8(&via1[IER], CB1_INT | IER_CLR); 1340 out_8(&via1[IER], CB1_INT | IER_SET); 1611 intr, in_8(&via1[IER]), pmu_state); 1852 out_8(&via1[IER], IER_CL [all...] |
/linux-master/drivers/media/common/saa7146/ |
H A D | saa7146_core.c | 384 saa7146_write(dev, IER, 0); 507 saa7146_write(dev, IER, 0);
|
/linux-master/drivers/mtd/nand/raw/ |
H A D | tegra_nand.c | 52 #define IER 0x0c macro 296 "IER", 1194 writel_relaxed(INT_MASK, ctrl->regs + IER);
|
/linux-master/drivers/net/ethernet/cadence/ |
H A D | macb.h | 389 /* Bitfields in ISR/IER/IDR/IMR */ 1209 unsigned int IER; member in struct:macb_queue
|
H A D | macb_main.c | 766 queue_writel(queue, IER, 1189 queue_writel(queue, IER, MACB_TX_INT_FLAGS); 1685 queue_writel(queue, IER, bp->rx_intr_mask); 1771 queue_writel(queue, IER, MACB_BIT(TCOMP)); 1822 queue_writel(queue, IER, 4100 queue->IER = GEM_IER(hw_q - 1); 4115 queue->IER = MACB_IER; 4328 macb_writel(lp, IER, MACB_BIT(RCOMP) | 5252 queue_writel(bp->queues, IER, GEM_BIT(WOL)); 5264 queue_writel(bp->queues, IER, MACB_BI [all...] |
/linux-master/drivers/net/ethernet/natsemi/ |
H A D | ns83820.c | 314 #define IER 0x18 macro 755 writel(1, dev->base + IER); 1376 writel(0, dev->base + IER); 1377 readl(dev->base + IER);
|
/linux-master/drivers/net/hamradio/ |
H A D | baycom_ser_fdx.c | 94 #define IER(iobase) (iobase+1) macro 408 outb(0, IER(dev->base_addr)); 425 outb(0x0a, IER(dev->base_addr)); 449 outb(0, IER(dev->base_addr));
|
H A D | baycom_ser_hdx.c | 80 #define IER(iobase) (iobase+1) macro 476 outb(0, IER(dev->base_addr)); 485 outb(2, IER(dev->base_addr)); 508 outb(0, IER(dev->base_addr));
|
H A D | yam.c | 151 #define IER(iobase) (iobase+1) macro 293 outb(0, IER(iobase)); 465 outb(0, IER(dev->base_addr)); 480 outb(ENABLE_RTXINT, IER(dev->base_addr)); 864 outb(0, IER(dev->base_addr)); 907 outb(0, IER(dev->base_addr));
|