1// SPDX-License-Identifier: GPL-2.0-or-later 2/*****************************************************************************/ 3 4/* 5 * yam.c -- YAM radio modem driver. 6 * 7 * Copyright (C) 1998 Frederic Rible F1OAT (frible@teaser.fr) 8 * Adapted from baycom.c driver written by Thomas Sailer (sailer@ife.ee.ethz.ch) 9 * 10 * Please note that the GPL allows you to use the driver, NOT the radio. 11 * In order to use the radio, you need a license from the communications 12 * authority of your country. 13 * 14 * History: 15 * 0.0 F1OAT 06.06.98 Begin of work with baycom.c source code V 0.3 16 * 0.1 F1OAT 07.06.98 Add timer polling routine for channel arbitration 17 * 0.2 F6FBB 08.06.98 Added delay after FPGA programming 18 * 0.3 F6FBB 29.07.98 Delayed PTT implementation for dupmode=2 19 * 0.4 F6FBB 30.07.98 Added TxTail, Slottime and Persistence 20 * 0.5 F6FBB 01.08.98 Shared IRQs, /proc/net and network statistics 21 * 0.6 F6FBB 25.08.98 Added 1200Bds format 22 * 0.7 F6FBB 12.09.98 Added to the kernel configuration 23 * 0.8 F6FBB 14.10.98 Fixed slottime/persistence timing bug 24 * OK1ZIA 2.09.01 Fixed "kfree_skb on hard IRQ" 25 * using dev_kfree_skb_any(). (important in 2.4 kernel) 26 */ 27 28/*****************************************************************************/ 29 30#include <linux/module.h> 31#include <linux/types.h> 32#include <linux/net.h> 33#include <linux/in.h> 34#include <linux/if.h> 35#include <linux/slab.h> 36#include <linux/errno.h> 37#include <linux/bitops.h> 38#include <linux/random.h> 39#include <asm/io.h> 40#include <linux/interrupt.h> 41#include <linux/ioport.h> 42#include <linux/firmware.h> 43#include <linux/platform_device.h> 44 45#include <linux/netdevice.h> 46#include <linux/if_arp.h> 47#include <linux/etherdevice.h> 48#include <linux/skbuff.h> 49#include <net/ax25.h> 50 51#include <linux/kernel.h> 52#include <linux/proc_fs.h> 53#include <linux/seq_file.h> 54#include <net/net_namespace.h> 55 56#include <linux/uaccess.h> 57#include <linux/init.h> 58 59#include <linux/yam.h> 60 61/* --------------------------------------------------------------------- */ 62 63static const char yam_drvname[] = "yam"; 64static const char yam_drvinfo[] __initconst = KERN_INFO \ 65 "YAM driver version 0.8 by F1OAT/F6FBB\n"; 66 67/* --------------------------------------------------------------------- */ 68 69#define FIRMWARE_9600 "yam/9600.bin" 70#define FIRMWARE_1200 "yam/1200.bin" 71 72#define YAM_9600 1 73#define YAM_1200 2 74 75#define NR_PORTS 4 76#define YAM_MAGIC 0xF10A7654 77 78/* Transmitter states */ 79 80#define TX_OFF 0 81#define TX_HEAD 1 82#define TX_DATA 2 83#define TX_CRC1 3 84#define TX_CRC2 4 85#define TX_TAIL 5 86 87#define YAM_MAX_FRAME 1024 88 89#define DEFAULT_BITRATE 9600 /* bps */ 90#define DEFAULT_HOLDD 10 /* sec */ 91#define DEFAULT_TXD 300 /* ms */ 92#define DEFAULT_TXTAIL 10 /* ms */ 93#define DEFAULT_SLOT 100 /* ms */ 94#define DEFAULT_PERS 64 /* 0->255 */ 95 96struct yam_port { 97 int magic; 98 int bitrate; 99 int baudrate; 100 int iobase; 101 int irq; 102 int dupmode; 103 104 struct net_device *dev; 105 106 int nb_rxint; 107 int nb_mdint; 108 109 /* Parameters section */ 110 111 int txd; /* tx delay */ 112 int holdd; /* duplex ptt delay */ 113 int txtail; /* txtail delay */ 114 int slot; /* slottime */ 115 int pers; /* persistence */ 116 117 /* Tx section */ 118 119 int tx_state; 120 int tx_count; 121 int slotcnt; 122 unsigned char tx_buf[YAM_MAX_FRAME]; 123 int tx_len; 124 int tx_crcl, tx_crch; 125 struct sk_buff_head send_queue; /* Packets awaiting transmission */ 126 127 /* Rx section */ 128 129 int dcd; 130 unsigned char rx_buf[YAM_MAX_FRAME]; 131 int rx_len; 132 int rx_crcl, rx_crch; 133}; 134 135struct yam_mcs { 136 unsigned char bits[YAM_FPGA_SIZE]; 137 int bitrate; 138 struct yam_mcs *next; 139}; 140 141static struct net_device *yam_devs[NR_PORTS]; 142 143static struct yam_mcs *yam_data; 144 145static DEFINE_TIMER(yam_timer, NULL); 146 147/* --------------------------------------------------------------------- */ 148 149#define RBR(iobase) (iobase+0) 150#define THR(iobase) (iobase+0) 151#define IER(iobase) (iobase+1) 152#define IIR(iobase) (iobase+2) 153#define FCR(iobase) (iobase+2) 154#define LCR(iobase) (iobase+3) 155#define MCR(iobase) (iobase+4) 156#define LSR(iobase) (iobase+5) 157#define MSR(iobase) (iobase+6) 158#define SCR(iobase) (iobase+7) 159#define DLL(iobase) (iobase+0) 160#define DLM(iobase) (iobase+1) 161 162#define YAM_EXTENT 8 163 164/* Interrupt Identification Register Bit Masks */ 165#define IIR_NOPEND 1 166#define IIR_MSR 0 167#define IIR_TX 2 168#define IIR_RX 4 169#define IIR_LSR 6 170#define IIR_TIMEOUT 12 /* Fifo mode only */ 171 172#define IIR_MASK 0x0F 173 174/* Interrupt Enable Register Bit Masks */ 175#define IER_RX 1 /* enable rx interrupt */ 176#define IER_TX 2 /* enable tx interrupt */ 177#define IER_LSR 4 /* enable line status interrupts */ 178#define IER_MSR 8 /* enable modem status interrupts */ 179 180/* Modem Control Register Bit Masks */ 181#define MCR_DTR 0x01 /* DTR output */ 182#define MCR_RTS 0x02 /* RTS output */ 183#define MCR_OUT1 0x04 /* OUT1 output (not accessible in RS232) */ 184#define MCR_OUT2 0x08 /* Master Interrupt enable (must be set on PCs) */ 185#define MCR_LOOP 0x10 /* Loopback enable */ 186 187/* Modem Status Register Bit Masks */ 188#define MSR_DCTS 0x01 /* Delta CTS input */ 189#define MSR_DDSR 0x02 /* Delta DSR */ 190#define MSR_DRIN 0x04 /* Delta RI */ 191#define MSR_DDCD 0x08 /* Delta DCD */ 192#define MSR_CTS 0x10 /* CTS input */ 193#define MSR_DSR 0x20 /* DSR input */ 194#define MSR_RING 0x40 /* RI input */ 195#define MSR_DCD 0x80 /* DCD input */ 196 197/* line status register bit mask */ 198#define LSR_RXC 0x01 199#define LSR_OE 0x02 200#define LSR_PE 0x04 201#define LSR_FE 0x08 202#define LSR_BREAK 0x10 203#define LSR_THRE 0x20 204#define LSR_TSRE 0x40 205 206/* Line Control Register Bit Masks */ 207#define LCR_DLAB 0x80 208#define LCR_BREAK 0x40 209#define LCR_PZERO 0x28 210#define LCR_PEVEN 0x18 211#define LCR_PODD 0x08 212#define LCR_STOP1 0x00 213#define LCR_STOP2 0x04 214#define LCR_BIT5 0x00 215#define LCR_BIT6 0x02 216#define LCR_BIT7 0x01 217#define LCR_BIT8 0x03 218 219/* YAM Modem <-> UART Port mapping */ 220 221#define TX_RDY MSR_DCTS /* transmitter ready to send */ 222#define RX_DCD MSR_DCD /* carrier detect */ 223#define RX_FLAG MSR_RING /* hdlc flag received */ 224#define FPGA_DONE MSR_DSR /* FPGA is configured */ 225#define PTT_ON (MCR_RTS|MCR_OUT2) /* activate PTT */ 226#define PTT_OFF (MCR_DTR|MCR_OUT2) /* release PTT */ 227 228#define ENABLE_RXINT IER_RX /* enable uart rx interrupt during rx */ 229#define ENABLE_TXINT IER_MSR /* enable uart ms interrupt during tx */ 230#define ENABLE_RTXINT (IER_RX|IER_MSR) /* full duplex operations */ 231 232 233/************************************************************************* 234* CRC Tables 235************************************************************************/ 236 237static const unsigned char chktabl[256] = 238{0x00, 0x89, 0x12, 0x9b, 0x24, 0xad, 0x36, 0xbf, 0x48, 0xc1, 0x5a, 0xd3, 0x6c, 0xe5, 0x7e, 239 0xf7, 0x81, 0x08, 0x93, 0x1a, 0xa5, 0x2c, 0xb7, 0x3e, 0xc9, 0x40, 0xdb, 0x52, 0xed, 0x64, 240 0xff, 0x76, 0x02, 0x8b, 0x10, 0x99, 0x26, 0xaf, 0x34, 0xbd, 0x4a, 0xc3, 0x58, 0xd1, 0x6e, 241 0xe7, 0x7c, 0xf5, 0x83, 0x0a, 0x91, 0x18, 0xa7, 0x2e, 0xb5, 0x3c, 0xcb, 0x42, 0xd9, 0x50, 242 0xef, 0x66, 0xfd, 0x74, 0x04, 0x8d, 0x16, 0x9f, 0x20, 0xa9, 0x32, 0xbb, 0x4c, 0xc5, 0x5e, 243 0xd7, 0x68, 0xe1, 0x7a, 0xf3, 0x85, 0x0c, 0x97, 0x1e, 0xa1, 0x28, 0xb3, 0x3a, 0xcd, 0x44, 244 0xdf, 0x56, 0xe9, 0x60, 0xfb, 0x72, 0x06, 0x8f, 0x14, 0x9d, 0x22, 0xab, 0x30, 0xb9, 0x4e, 245 0xc7, 0x5c, 0xd5, 0x6a, 0xe3, 0x78, 0xf1, 0x87, 0x0e, 0x95, 0x1c, 0xa3, 0x2a, 0xb1, 0x38, 246 0xcf, 0x46, 0xdd, 0x54, 0xeb, 0x62, 0xf9, 0x70, 0x08, 0x81, 0x1a, 0x93, 0x2c, 0xa5, 0x3e, 247 0xb7, 0x40, 0xc9, 0x52, 0xdb, 0x64, 0xed, 0x76, 0xff, 0x89, 0x00, 0x9b, 0x12, 0xad, 0x24, 248 0xbf, 0x36, 0xc1, 0x48, 0xd3, 0x5a, 0xe5, 0x6c, 0xf7, 0x7e, 0x0a, 0x83, 0x18, 0x91, 0x2e, 249 0xa7, 0x3c, 0xb5, 0x42, 0xcb, 0x50, 0xd9, 0x66, 0xef, 0x74, 0xfd, 0x8b, 0x02, 0x99, 0x10, 250 0xaf, 0x26, 0xbd, 0x34, 0xc3, 0x4a, 0xd1, 0x58, 0xe7, 0x6e, 0xf5, 0x7c, 0x0c, 0x85, 0x1e, 251 0x97, 0x28, 0xa1, 0x3a, 0xb3, 0x44, 0xcd, 0x56, 0xdf, 0x60, 0xe9, 0x72, 0xfb, 0x8d, 0x04, 252 0x9f, 0x16, 0xa9, 0x20, 0xbb, 0x32, 0xc5, 0x4c, 0xd7, 0x5e, 0xe1, 0x68, 0xf3, 0x7a, 0x0e, 253 0x87, 0x1c, 0x95, 0x2a, 0xa3, 0x38, 0xb1, 0x46, 0xcf, 0x54, 0xdd, 0x62, 0xeb, 0x70, 0xf9, 254 0x8f, 0x06, 0x9d, 0x14, 0xab, 0x22, 0xb9, 0x30, 0xc7, 0x4e, 0xd5, 0x5c, 0xe3, 0x6a, 0xf1, 255 0x78}; 256static const unsigned char chktabh[256] = 257{0x00, 0x11, 0x23, 0x32, 0x46, 0x57, 0x65, 0x74, 0x8c, 0x9d, 0xaf, 0xbe, 0xca, 0xdb, 0xe9, 258 0xf8, 0x10, 0x01, 0x33, 0x22, 0x56, 0x47, 0x75, 0x64, 0x9c, 0x8d, 0xbf, 0xae, 0xda, 0xcb, 259 0xf9, 0xe8, 0x21, 0x30, 0x02, 0x13, 0x67, 0x76, 0x44, 0x55, 0xad, 0xbc, 0x8e, 0x9f, 0xeb, 260 0xfa, 0xc8, 0xd9, 0x31, 0x20, 0x12, 0x03, 0x77, 0x66, 0x54, 0x45, 0xbd, 0xac, 0x9e, 0x8f, 261 0xfb, 0xea, 0xd8, 0xc9, 0x42, 0x53, 0x61, 0x70, 0x04, 0x15, 0x27, 0x36, 0xce, 0xdf, 0xed, 262 0xfc, 0x88, 0x99, 0xab, 0xba, 0x52, 0x43, 0x71, 0x60, 0x14, 0x05, 0x37, 0x26, 0xde, 0xcf, 263 0xfd, 0xec, 0x98, 0x89, 0xbb, 0xaa, 0x63, 0x72, 0x40, 0x51, 0x25, 0x34, 0x06, 0x17, 0xef, 264 0xfe, 0xcc, 0xdd, 0xa9, 0xb8, 0x8a, 0x9b, 0x73, 0x62, 0x50, 0x41, 0x35, 0x24, 0x16, 0x07, 265 0xff, 0xee, 0xdc, 0xcd, 0xb9, 0xa8, 0x9a, 0x8b, 0x84, 0x95, 0xa7, 0xb6, 0xc2, 0xd3, 0xe1, 266 0xf0, 0x08, 0x19, 0x2b, 0x3a, 0x4e, 0x5f, 0x6d, 0x7c, 0x94, 0x85, 0xb7, 0xa6, 0xd2, 0xc3, 267 0xf1, 0xe0, 0x18, 0x09, 0x3b, 0x2a, 0x5e, 0x4f, 0x7d, 0x6c, 0xa5, 0xb4, 0x86, 0x97, 0xe3, 268 0xf2, 0xc0, 0xd1, 0x29, 0x38, 0x0a, 0x1b, 0x6f, 0x7e, 0x4c, 0x5d, 0xb5, 0xa4, 0x96, 0x87, 269 0xf3, 0xe2, 0xd0, 0xc1, 0x39, 0x28, 0x1a, 0x0b, 0x7f, 0x6e, 0x5c, 0x4d, 0xc6, 0xd7, 0xe5, 270 0xf4, 0x80, 0x91, 0xa3, 0xb2, 0x4a, 0x5b, 0x69, 0x78, 0x0c, 0x1d, 0x2f, 0x3e, 0xd6, 0xc7, 271 0xf5, 0xe4, 0x90, 0x81, 0xb3, 0xa2, 0x5a, 0x4b, 0x79, 0x68, 0x1c, 0x0d, 0x3f, 0x2e, 0xe7, 272 0xf6, 0xc4, 0xd5, 0xa1, 0xb0, 0x82, 0x93, 0x6b, 0x7a, 0x48, 0x59, 0x2d, 0x3c, 0x0e, 0x1f, 273 0xf7, 0xe6, 0xd4, 0xc5, 0xb1, 0xa0, 0x92, 0x83, 0x7b, 0x6a, 0x58, 0x49, 0x3d, 0x2c, 0x1e, 274 0x0f}; 275 276/************************************************************************* 277* FPGA functions 278************************************************************************/ 279 280static void delay(int ms) 281{ 282 unsigned long timeout = jiffies + ((ms * HZ) / 1000); 283 while (time_before(jiffies, timeout)) 284 cpu_relax(); 285} 286 287/* 288 * reset FPGA 289 */ 290 291static void fpga_reset(int iobase) 292{ 293 outb(0, IER(iobase)); 294 outb(LCR_DLAB | LCR_BIT5, LCR(iobase)); 295 outb(1, DLL(iobase)); 296 outb(0, DLM(iobase)); 297 298 outb(LCR_BIT5, LCR(iobase)); 299 inb(LSR(iobase)); 300 inb(MSR(iobase)); 301 /* turn off FPGA supply voltage */ 302 outb(MCR_OUT1 | MCR_OUT2, MCR(iobase)); 303 delay(100); 304 /* turn on FPGA supply voltage again */ 305 outb(MCR_DTR | MCR_RTS | MCR_OUT1 | MCR_OUT2, MCR(iobase)); 306 delay(100); 307} 308 309/* 310 * send one byte to FPGA 311 */ 312 313static int fpga_write(int iobase, unsigned char wrd) 314{ 315 unsigned char bit; 316 int k; 317 unsigned long timeout = jiffies + HZ / 10; 318 319 for (k = 0; k < 8; k++) { 320 bit = (wrd & 0x80) ? (MCR_RTS | MCR_DTR) : MCR_DTR; 321 outb(bit | MCR_OUT1 | MCR_OUT2, MCR(iobase)); 322 wrd <<= 1; 323 outb(0xfc, THR(iobase)); 324 while ((inb(LSR(iobase)) & LSR_TSRE) == 0) 325 if (time_after(jiffies, timeout)) 326 return -1; 327 } 328 329 return 0; 330} 331 332/* 333 * predef should be 0 for loading user defined mcs 334 * predef should be YAM_1200 for loading predef 1200 mcs 335 * predef should be YAM_9600 for loading predef 9600 mcs 336 */ 337static unsigned char *add_mcs(unsigned char *bits, int bitrate, 338 unsigned int predef) 339{ 340 const char *fw_name[2] = {FIRMWARE_9600, FIRMWARE_1200}; 341 const struct firmware *fw; 342 struct platform_device *pdev; 343 struct yam_mcs *p; 344 int err; 345 346 switch (predef) { 347 case 0: 348 fw = NULL; 349 break; 350 case YAM_1200: 351 case YAM_9600: 352 predef--; 353 pdev = platform_device_register_simple("yam", 0, NULL, 0); 354 if (IS_ERR(pdev)) { 355 printk(KERN_ERR "yam: Failed to register firmware\n"); 356 return NULL; 357 } 358 err = request_firmware(&fw, fw_name[predef], &pdev->dev); 359 platform_device_unregister(pdev); 360 if (err) { 361 printk(KERN_ERR "Failed to load firmware \"%s\"\n", 362 fw_name[predef]); 363 return NULL; 364 } 365 if (fw->size != YAM_FPGA_SIZE) { 366 printk(KERN_ERR "Bogus length %zu in firmware \"%s\"\n", 367 fw->size, fw_name[predef]); 368 release_firmware(fw); 369 return NULL; 370 } 371 bits = (unsigned char *)fw->data; 372 break; 373 default: 374 printk(KERN_ERR "yam: Invalid predef number %u\n", predef); 375 return NULL; 376 } 377 378 /* If it already exists, replace the bit data */ 379 p = yam_data; 380 while (p) { 381 if (p->bitrate == bitrate) { 382 memcpy(p->bits, bits, YAM_FPGA_SIZE); 383 goto out; 384 } 385 p = p->next; 386 } 387 388 /* Allocate a new mcs */ 389 if ((p = kmalloc(sizeof(struct yam_mcs), GFP_KERNEL)) == NULL) { 390 release_firmware(fw); 391 return NULL; 392 } 393 memcpy(p->bits, bits, YAM_FPGA_SIZE); 394 p->bitrate = bitrate; 395 p->next = yam_data; 396 yam_data = p; 397 out: 398 release_firmware(fw); 399 return p->bits; 400} 401 402static unsigned char *get_mcs(int bitrate) 403{ 404 struct yam_mcs *p; 405 406 p = yam_data; 407 while (p) { 408 if (p->bitrate == bitrate) 409 return p->bits; 410 p = p->next; 411 } 412 413 /* Load predefined mcs data */ 414 switch (bitrate) { 415 case 1200: 416 /* setting predef as YAM_1200 for loading predef 1200 mcs */ 417 return add_mcs(NULL, bitrate, YAM_1200); 418 default: 419 /* setting predef as YAM_9600 for loading predef 9600 mcs */ 420 return add_mcs(NULL, bitrate, YAM_9600); 421 } 422} 423 424/* 425 * download bitstream to FPGA 426 * data is contained in bits[] array in yam1200.h resp. yam9600.h 427 */ 428 429static int fpga_download(int iobase, int bitrate) 430{ 431 int i, rc; 432 unsigned char *pbits; 433 434 pbits = get_mcs(bitrate); 435 if (pbits == NULL) 436 return -1; 437 438 fpga_reset(iobase); 439 for (i = 0; i < YAM_FPGA_SIZE; i++) { 440 if (fpga_write(iobase, pbits[i])) { 441 printk(KERN_ERR "yam: error in write cycle\n"); 442 return -1; /* write... */ 443 } 444 } 445 446 fpga_write(iobase, 0xFF); 447 rc = inb(MSR(iobase)); /* check DONE signal */ 448 449 /* Needed for some hardwares */ 450 delay(50); 451 452 return (rc & MSR_DSR) ? 0 : -1; 453} 454 455 456/************************************************************************ 457* Serial port init 458************************************************************************/ 459 460static void yam_set_uart(struct net_device *dev) 461{ 462 struct yam_port *yp = netdev_priv(dev); 463 int divisor = 115200 / yp->baudrate; 464 465 outb(0, IER(dev->base_addr)); 466 outb(LCR_DLAB | LCR_BIT8, LCR(dev->base_addr)); 467 outb(divisor, DLL(dev->base_addr)); 468 outb(0, DLM(dev->base_addr)); 469 outb(LCR_BIT8, LCR(dev->base_addr)); 470 outb(PTT_OFF, MCR(dev->base_addr)); 471 outb(0x00, FCR(dev->base_addr)); 472 473 /* Flush pending irq */ 474 475 inb(RBR(dev->base_addr)); 476 inb(MSR(dev->base_addr)); 477 478 /* Enable rx irq */ 479 480 outb(ENABLE_RTXINT, IER(dev->base_addr)); 481} 482 483 484/* --------------------------------------------------------------------- */ 485 486enum uart { 487 c_uart_unknown, c_uart_8250, 488 c_uart_16450, c_uart_16550, c_uart_16550A 489}; 490 491static const char *uart_str[] = 492{"unknown", "8250", "16450", "16550", "16550A"}; 493 494static enum uart yam_check_uart(unsigned int iobase) 495{ 496 unsigned char b1, b2, b3; 497 enum uart u; 498 enum uart uart_tab[] = 499 {c_uart_16450, c_uart_unknown, c_uart_16550, c_uart_16550A}; 500 501 b1 = inb(MCR(iobase)); 502 outb(b1 | 0x10, MCR(iobase)); /* loopback mode */ 503 b2 = inb(MSR(iobase)); 504 outb(0x1a, MCR(iobase)); 505 b3 = inb(MSR(iobase)) & 0xf0; 506 outb(b1, MCR(iobase)); /* restore old values */ 507 outb(b2, MSR(iobase)); 508 if (b3 != 0x90) 509 return c_uart_unknown; 510 inb(RBR(iobase)); 511 inb(RBR(iobase)); 512 outb(0x01, FCR(iobase)); /* enable FIFOs */ 513 u = uart_tab[(inb(IIR(iobase)) >> 6) & 3]; 514 if (u == c_uart_16450) { 515 outb(0x5a, SCR(iobase)); 516 b1 = inb(SCR(iobase)); 517 outb(0xa5, SCR(iobase)); 518 b2 = inb(SCR(iobase)); 519 if ((b1 != 0x5a) || (b2 != 0xa5)) 520 u = c_uart_8250; 521 } 522 return u; 523} 524 525/****************************************************************************** 526* Rx Section 527******************************************************************************/ 528static inline void yam_rx_flag(struct net_device *dev, struct yam_port *yp) 529{ 530 if (yp->dcd && yp->rx_len >= 3 && yp->rx_len < YAM_MAX_FRAME) { 531 int pkt_len = yp->rx_len - 2 + 1; /* -CRC + kiss */ 532 struct sk_buff *skb; 533 534 if ((yp->rx_crch & yp->rx_crcl) != 0xFF) { 535 /* Bad crc */ 536 } else { 537 if (!(skb = dev_alloc_skb(pkt_len))) { 538 printk(KERN_WARNING "%s: memory squeeze, dropping packet\n", dev->name); 539 ++dev->stats.rx_dropped; 540 } else { 541 unsigned char *cp; 542 cp = skb_put(skb, pkt_len); 543 *cp++ = 0; /* KISS kludge */ 544 memcpy(cp, yp->rx_buf, pkt_len - 1); 545 skb->protocol = ax25_type_trans(skb, dev); 546 netif_rx(skb); 547 ++dev->stats.rx_packets; 548 } 549 } 550 } 551 yp->rx_len = 0; 552 yp->rx_crcl = 0x21; 553 yp->rx_crch = 0xf3; 554} 555 556static inline void yam_rx_byte(struct net_device *dev, struct yam_port *yp, unsigned char rxb) 557{ 558 if (yp->rx_len < YAM_MAX_FRAME) { 559 unsigned char c = yp->rx_crcl; 560 yp->rx_crcl = (chktabl[c] ^ yp->rx_crch); 561 yp->rx_crch = (chktabh[c] ^ rxb); 562 yp->rx_buf[yp->rx_len++] = rxb; 563 } 564} 565 566/******************************************************************************** 567* TX Section 568********************************************************************************/ 569 570static void ptt_on(struct net_device *dev) 571{ 572 outb(PTT_ON, MCR(dev->base_addr)); 573} 574 575static void ptt_off(struct net_device *dev) 576{ 577 outb(PTT_OFF, MCR(dev->base_addr)); 578} 579 580static netdev_tx_t yam_send_packet(struct sk_buff *skb, 581 struct net_device *dev) 582{ 583 struct yam_port *yp = netdev_priv(dev); 584 585 if (skb->protocol == htons(ETH_P_IP)) 586 return ax25_ip_xmit(skb); 587 588 skb_queue_tail(&yp->send_queue, skb); 589 netif_trans_update(dev); 590 return NETDEV_TX_OK; 591} 592 593static void yam_start_tx(struct net_device *dev, struct yam_port *yp) 594{ 595 if ((yp->tx_state == TX_TAIL) || (yp->txd == 0)) 596 yp->tx_count = 1; 597 else 598 yp->tx_count = (yp->bitrate * yp->txd) / 8000; 599 yp->tx_state = TX_HEAD; 600 ptt_on(dev); 601} 602 603static void yam_arbitrate(struct net_device *dev) 604{ 605 struct yam_port *yp = netdev_priv(dev); 606 607 if (yp->magic != YAM_MAGIC || yp->tx_state != TX_OFF || 608 skb_queue_empty(&yp->send_queue)) 609 return; 610 /* tx_state is TX_OFF and there is data to send */ 611 612 if (yp->dupmode) { 613 /* Full duplex mode, don't wait */ 614 yam_start_tx(dev, yp); 615 return; 616 } 617 if (yp->dcd) { 618 /* DCD on, wait slotime ... */ 619 yp->slotcnt = yp->slot / 10; 620 return; 621 } 622 /* Is slottime passed ? */ 623 if ((--yp->slotcnt) > 0) 624 return; 625 626 yp->slotcnt = yp->slot / 10; 627 628 /* is random > persist ? */ 629 if (get_random_u8() > yp->pers) 630 return; 631 632 yam_start_tx(dev, yp); 633} 634 635static void yam_dotimer(struct timer_list *unused) 636{ 637 int i; 638 639 for (i = 0; i < NR_PORTS; i++) { 640 struct net_device *dev = yam_devs[i]; 641 if (dev && netif_running(dev)) 642 yam_arbitrate(dev); 643 } 644 yam_timer.expires = jiffies + HZ / 100; 645 add_timer(&yam_timer); 646} 647 648static void yam_tx_byte(struct net_device *dev, struct yam_port *yp) 649{ 650 struct sk_buff *skb; 651 unsigned char b, temp; 652 653 switch (yp->tx_state) { 654 case TX_OFF: 655 break; 656 case TX_HEAD: 657 if (--yp->tx_count <= 0) { 658 if (!(skb = skb_dequeue(&yp->send_queue))) { 659 ptt_off(dev); 660 yp->tx_state = TX_OFF; 661 break; 662 } 663 yp->tx_state = TX_DATA; 664 if (skb->data[0] != 0) { 665/* do_kiss_params(s, skb->data, skb->len); */ 666 dev_kfree_skb_any(skb); 667 break; 668 } 669 yp->tx_len = skb->len - 1; /* strip KISS byte */ 670 if (yp->tx_len >= YAM_MAX_FRAME || yp->tx_len < 2) { 671 dev_kfree_skb_any(skb); 672 break; 673 } 674 skb_copy_from_linear_data_offset(skb, 1, 675 yp->tx_buf, 676 yp->tx_len); 677 dev_kfree_skb_any(skb); 678 yp->tx_count = 0; 679 yp->tx_crcl = 0x21; 680 yp->tx_crch = 0xf3; 681 yp->tx_state = TX_DATA; 682 } 683 break; 684 case TX_DATA: 685 b = yp->tx_buf[yp->tx_count++]; 686 outb(b, THR(dev->base_addr)); 687 temp = yp->tx_crcl; 688 yp->tx_crcl = chktabl[temp] ^ yp->tx_crch; 689 yp->tx_crch = chktabh[temp] ^ b; 690 if (yp->tx_count >= yp->tx_len) { 691 yp->tx_state = TX_CRC1; 692 } 693 break; 694 case TX_CRC1: 695 yp->tx_crch = chktabl[yp->tx_crcl] ^ yp->tx_crch; 696 yp->tx_crcl = chktabh[yp->tx_crcl] ^ chktabl[yp->tx_crch] ^ 0xff; 697 outb(yp->tx_crcl, THR(dev->base_addr)); 698 yp->tx_state = TX_CRC2; 699 break; 700 case TX_CRC2: 701 outb(chktabh[yp->tx_crch] ^ 0xFF, THR(dev->base_addr)); 702 if (skb_queue_empty(&yp->send_queue)) { 703 yp->tx_count = (yp->bitrate * yp->txtail) / 8000; 704 if (yp->dupmode == 2) 705 yp->tx_count += (yp->bitrate * yp->holdd) / 8; 706 if (yp->tx_count == 0) 707 yp->tx_count = 1; 708 yp->tx_state = TX_TAIL; 709 } else { 710 yp->tx_count = 1; 711 yp->tx_state = TX_HEAD; 712 } 713 ++dev->stats.tx_packets; 714 break; 715 case TX_TAIL: 716 if (--yp->tx_count <= 0) { 717 yp->tx_state = TX_OFF; 718 ptt_off(dev); 719 } 720 break; 721 } 722} 723 724/*********************************************************************************** 725* ISR routine 726************************************************************************************/ 727 728static irqreturn_t yam_interrupt(int irq, void *dev_id) 729{ 730 struct net_device *dev; 731 struct yam_port *yp; 732 unsigned char iir; 733 int counter = 100; 734 int i; 735 int handled = 0; 736 737 for (i = 0; i < NR_PORTS; i++) { 738 dev = yam_devs[i]; 739 yp = netdev_priv(dev); 740 741 if (!netif_running(dev)) 742 continue; 743 744 while ((iir = IIR_MASK & inb(IIR(dev->base_addr))) != IIR_NOPEND) { 745 unsigned char msr = inb(MSR(dev->base_addr)); 746 unsigned char lsr = inb(LSR(dev->base_addr)); 747 unsigned char rxb; 748 749 handled = 1; 750 751 if (lsr & LSR_OE) 752 ++dev->stats.rx_fifo_errors; 753 754 yp->dcd = (msr & RX_DCD) ? 1 : 0; 755 756 if (--counter <= 0) { 757 printk(KERN_ERR "%s: too many irq iir=%d\n", 758 dev->name, iir); 759 goto out; 760 } 761 if (msr & TX_RDY) { 762 ++yp->nb_mdint; 763 yam_tx_byte(dev, yp); 764 } 765 if (lsr & LSR_RXC) { 766 ++yp->nb_rxint; 767 rxb = inb(RBR(dev->base_addr)); 768 if (msr & RX_FLAG) 769 yam_rx_flag(dev, yp); 770 else 771 yam_rx_byte(dev, yp, rxb); 772 } 773 } 774 } 775out: 776 return IRQ_RETVAL(handled); 777} 778 779#ifdef CONFIG_PROC_FS 780 781static void *yam_seq_start(struct seq_file *seq, loff_t *pos) 782{ 783 return (*pos < NR_PORTS) ? yam_devs[*pos] : NULL; 784} 785 786static void *yam_seq_next(struct seq_file *seq, void *v, loff_t *pos) 787{ 788 ++*pos; 789 return (*pos < NR_PORTS) ? yam_devs[*pos] : NULL; 790} 791 792static void yam_seq_stop(struct seq_file *seq, void *v) 793{ 794} 795 796static int yam_seq_show(struct seq_file *seq, void *v) 797{ 798 struct net_device *dev = v; 799 const struct yam_port *yp = netdev_priv(dev); 800 801 seq_printf(seq, "Device %s\n", dev->name); 802 seq_printf(seq, " Up %d\n", netif_running(dev)); 803 seq_printf(seq, " Speed %u\n", yp->bitrate); 804 seq_printf(seq, " IoBase 0x%x\n", yp->iobase); 805 seq_printf(seq, " BaudRate %u\n", yp->baudrate); 806 seq_printf(seq, " IRQ %u\n", yp->irq); 807 seq_printf(seq, " TxState %u\n", yp->tx_state); 808 seq_printf(seq, " Duplex %u\n", yp->dupmode); 809 seq_printf(seq, " HoldDly %u\n", yp->holdd); 810 seq_printf(seq, " TxDelay %u\n", yp->txd); 811 seq_printf(seq, " TxTail %u\n", yp->txtail); 812 seq_printf(seq, " SlotTime %u\n", yp->slot); 813 seq_printf(seq, " Persist %u\n", yp->pers); 814 seq_printf(seq, " TxFrames %lu\n", dev->stats.tx_packets); 815 seq_printf(seq, " RxFrames %lu\n", dev->stats.rx_packets); 816 seq_printf(seq, " TxInt %u\n", yp->nb_mdint); 817 seq_printf(seq, " RxInt %u\n", yp->nb_rxint); 818 seq_printf(seq, " RxOver %lu\n", dev->stats.rx_fifo_errors); 819 seq_printf(seq, "\n"); 820 return 0; 821} 822 823static const struct seq_operations yam_seqops = { 824 .start = yam_seq_start, 825 .next = yam_seq_next, 826 .stop = yam_seq_stop, 827 .show = yam_seq_show, 828}; 829#endif 830 831 832/* --------------------------------------------------------------------- */ 833 834static int yam_open(struct net_device *dev) 835{ 836 struct yam_port *yp = netdev_priv(dev); 837 enum uart u; 838 int i; 839 int ret=0; 840 841 printk(KERN_INFO "Trying %s at iobase 0x%lx irq %u\n", dev->name, dev->base_addr, dev->irq); 842 843 if (!yp->bitrate) 844 return -ENXIO; 845 if (!dev->base_addr || dev->base_addr > 0x1000 - YAM_EXTENT || 846 dev->irq < 2 || dev->irq > 15) { 847 return -ENXIO; 848 } 849 if (!request_region(dev->base_addr, YAM_EXTENT, dev->name)) 850 { 851 printk(KERN_ERR "%s: cannot 0x%lx busy\n", dev->name, dev->base_addr); 852 return -EACCES; 853 } 854 if ((u = yam_check_uart(dev->base_addr)) == c_uart_unknown) { 855 printk(KERN_ERR "%s: cannot find uart type\n", dev->name); 856 ret = -EIO; 857 goto out_release_base; 858 } 859 if (fpga_download(dev->base_addr, yp->bitrate)) { 860 printk(KERN_ERR "%s: cannot init FPGA\n", dev->name); 861 ret = -EIO; 862 goto out_release_base; 863 } 864 outb(0, IER(dev->base_addr)); 865 if (request_irq(dev->irq, yam_interrupt, IRQF_SHARED, dev->name, dev)) { 866 printk(KERN_ERR "%s: irq %d busy\n", dev->name, dev->irq); 867 ret = -EBUSY; 868 goto out_release_base; 869 } 870 871 yam_set_uart(dev); 872 873 netif_start_queue(dev); 874 875 yp->slotcnt = yp->slot / 10; 876 877 /* Reset overruns for all ports - FPGA programming makes overruns */ 878 for (i = 0; i < NR_PORTS; i++) { 879 struct net_device *yam_dev = yam_devs[i]; 880 881 inb(LSR(yam_dev->base_addr)); 882 yam_dev->stats.rx_fifo_errors = 0; 883 } 884 885 printk(KERN_INFO "%s at iobase 0x%lx irq %u uart %s\n", dev->name, dev->base_addr, dev->irq, 886 uart_str[u]); 887 return 0; 888 889out_release_base: 890 release_region(dev->base_addr, YAM_EXTENT); 891 return ret; 892} 893 894/* --------------------------------------------------------------------- */ 895 896static int yam_close(struct net_device *dev) 897{ 898 struct sk_buff *skb; 899 struct yam_port *yp = netdev_priv(dev); 900 901 if (!dev) 902 return -EINVAL; 903 904 /* 905 * disable interrupts 906 */ 907 outb(0, IER(dev->base_addr)); 908 outb(1, MCR(dev->base_addr)); 909 /* Remove IRQ handler if last */ 910 free_irq(dev->irq,dev); 911 release_region(dev->base_addr, YAM_EXTENT); 912 netif_stop_queue(dev); 913 while ((skb = skb_dequeue(&yp->send_queue))) 914 dev_kfree_skb(skb); 915 916 printk(KERN_INFO "%s: close yam at iobase 0x%lx irq %u\n", 917 yam_drvname, dev->base_addr, dev->irq); 918 return 0; 919} 920 921/* --------------------------------------------------------------------- */ 922 923static int yam_siocdevprivate(struct net_device *dev, struct ifreq *ifr, void __user *data, int cmd) 924{ 925 struct yam_port *yp = netdev_priv(dev); 926 struct yamdrv_ioctl_cfg yi; 927 struct yamdrv_ioctl_mcs *ym; 928 int ioctl_cmd; 929 930 if (copy_from_user(&ioctl_cmd, data, sizeof(int))) 931 return -EFAULT; 932 933 if (yp->magic != YAM_MAGIC) 934 return -EINVAL; 935 936 if (!capable(CAP_NET_ADMIN)) 937 return -EPERM; 938 939 if (cmd != SIOCDEVPRIVATE) 940 return -EINVAL; 941 942 switch (ioctl_cmd) { 943 944 case SIOCYAMRESERVED: 945 return -EINVAL; /* unused */ 946 947 case SIOCYAMSMCS: 948 if (netif_running(dev)) 949 return -EINVAL; /* Cannot change this parameter when up */ 950 ym = memdup_user(data, sizeof(struct yamdrv_ioctl_mcs)); 951 if (IS_ERR(ym)) 952 return PTR_ERR(ym); 953 if (ym->cmd != SIOCYAMSMCS || ym->bitrate > YAM_MAXBITRATE) { 954 kfree(ym); 955 return -EINVAL; 956 } 957 /* setting predef as 0 for loading userdefined mcs data */ 958 add_mcs(ym->bits, ym->bitrate, 0); 959 kfree(ym); 960 break; 961 962 case SIOCYAMSCFG: 963 if (!capable(CAP_SYS_RAWIO)) 964 return -EPERM; 965 if (copy_from_user(&yi, data, sizeof(struct yamdrv_ioctl_cfg))) 966 return -EFAULT; 967 968 if (yi.cmd != SIOCYAMSCFG) 969 return -EINVAL; 970 if ((yi.cfg.mask & YAM_IOBASE) && netif_running(dev)) 971 return -EINVAL; /* Cannot change this parameter when up */ 972 if ((yi.cfg.mask & YAM_IRQ) && netif_running(dev)) 973 return -EINVAL; /* Cannot change this parameter when up */ 974 if ((yi.cfg.mask & YAM_BITRATE) && netif_running(dev)) 975 return -EINVAL; /* Cannot change this parameter when up */ 976 if ((yi.cfg.mask & YAM_BAUDRATE) && netif_running(dev)) 977 return -EINVAL; /* Cannot change this parameter when up */ 978 979 if (yi.cfg.mask & YAM_IOBASE) { 980 yp->iobase = yi.cfg.iobase; 981 dev->base_addr = yi.cfg.iobase; 982 } 983 if (yi.cfg.mask & YAM_IRQ) { 984 if (yi.cfg.irq > 15) 985 return -EINVAL; 986 yp->irq = yi.cfg.irq; 987 dev->irq = yi.cfg.irq; 988 } 989 if (yi.cfg.mask & YAM_BITRATE) { 990 if (yi.cfg.bitrate > YAM_MAXBITRATE) 991 return -EINVAL; 992 yp->bitrate = yi.cfg.bitrate; 993 } 994 if (yi.cfg.mask & YAM_BAUDRATE) { 995 if (yi.cfg.baudrate > YAM_MAXBAUDRATE) 996 return -EINVAL; 997 yp->baudrate = yi.cfg.baudrate; 998 } 999 if (yi.cfg.mask & YAM_MODE) { 1000 if (yi.cfg.mode > YAM_MAXMODE) 1001 return -EINVAL; 1002 yp->dupmode = yi.cfg.mode; 1003 } 1004 if (yi.cfg.mask & YAM_HOLDDLY) { 1005 if (yi.cfg.holddly > YAM_MAXHOLDDLY) 1006 return -EINVAL; 1007 yp->holdd = yi.cfg.holddly; 1008 } 1009 if (yi.cfg.mask & YAM_TXDELAY) { 1010 if (yi.cfg.txdelay > YAM_MAXTXDELAY) 1011 return -EINVAL; 1012 yp->txd = yi.cfg.txdelay; 1013 } 1014 if (yi.cfg.mask & YAM_TXTAIL) { 1015 if (yi.cfg.txtail > YAM_MAXTXTAIL) 1016 return -EINVAL; 1017 yp->txtail = yi.cfg.txtail; 1018 } 1019 if (yi.cfg.mask & YAM_PERSIST) { 1020 if (yi.cfg.persist > YAM_MAXPERSIST) 1021 return -EINVAL; 1022 yp->pers = yi.cfg.persist; 1023 } 1024 if (yi.cfg.mask & YAM_SLOTTIME) { 1025 if (yi.cfg.slottime > YAM_MAXSLOTTIME) 1026 return -EINVAL; 1027 yp->slot = yi.cfg.slottime; 1028 yp->slotcnt = yp->slot / 10; 1029 } 1030 break; 1031 1032 case SIOCYAMGCFG: 1033 memset(&yi, 0, sizeof(yi)); 1034 yi.cfg.mask = 0xffffffff; 1035 yi.cfg.iobase = yp->iobase; 1036 yi.cfg.irq = yp->irq; 1037 yi.cfg.bitrate = yp->bitrate; 1038 yi.cfg.baudrate = yp->baudrate; 1039 yi.cfg.mode = yp->dupmode; 1040 yi.cfg.txdelay = yp->txd; 1041 yi.cfg.holddly = yp->holdd; 1042 yi.cfg.txtail = yp->txtail; 1043 yi.cfg.persist = yp->pers; 1044 yi.cfg.slottime = yp->slot; 1045 if (copy_to_user(data, &yi, sizeof(struct yamdrv_ioctl_cfg))) 1046 return -EFAULT; 1047 break; 1048 1049 default: 1050 return -EINVAL; 1051 1052 } 1053 1054 return 0; 1055} 1056 1057/* --------------------------------------------------------------------- */ 1058 1059static int yam_set_mac_address(struct net_device *dev, void *addr) 1060{ 1061 struct sockaddr *sa = (struct sockaddr *) addr; 1062 1063 /* addr is an AX.25 shifted ASCII mac address */ 1064 dev_addr_set(dev, sa->sa_data); 1065 return 0; 1066} 1067 1068/* --------------------------------------------------------------------- */ 1069 1070static const struct net_device_ops yam_netdev_ops = { 1071 .ndo_open = yam_open, 1072 .ndo_stop = yam_close, 1073 .ndo_start_xmit = yam_send_packet, 1074 .ndo_siocdevprivate = yam_siocdevprivate, 1075 .ndo_set_mac_address = yam_set_mac_address, 1076}; 1077 1078static void yam_setup(struct net_device *dev) 1079{ 1080 struct yam_port *yp = netdev_priv(dev); 1081 1082 yp->magic = YAM_MAGIC; 1083 yp->bitrate = DEFAULT_BITRATE; 1084 yp->baudrate = DEFAULT_BITRATE * 2; 1085 yp->iobase = 0; 1086 yp->irq = 0; 1087 yp->dupmode = 0; 1088 yp->holdd = DEFAULT_HOLDD; 1089 yp->txd = DEFAULT_TXD; 1090 yp->txtail = DEFAULT_TXTAIL; 1091 yp->slot = DEFAULT_SLOT; 1092 yp->pers = DEFAULT_PERS; 1093 yp->dev = dev; 1094 1095 dev->base_addr = yp->iobase; 1096 dev->irq = yp->irq; 1097 1098 skb_queue_head_init(&yp->send_queue); 1099 1100 dev->netdev_ops = &yam_netdev_ops; 1101 dev->header_ops = &ax25_header_ops; 1102 1103 dev->type = ARPHRD_AX25; 1104 dev->hard_header_len = AX25_MAX_HEADER_LEN; 1105 dev->mtu = AX25_MTU; 1106 dev->addr_len = AX25_ADDR_LEN; 1107 memcpy(dev->broadcast, &ax25_bcast, AX25_ADDR_LEN); 1108 dev_addr_set(dev, (u8 *)&ax25_defaddr); 1109} 1110 1111static int __init yam_init_driver(void) 1112{ 1113 struct net_device *dev; 1114 int i, err; 1115 char name[IFNAMSIZ]; 1116 1117 printk(yam_drvinfo); 1118 1119 for (i = 0; i < NR_PORTS; i++) { 1120 sprintf(name, "yam%d", i); 1121 1122 dev = alloc_netdev(sizeof(struct yam_port), name, 1123 NET_NAME_UNKNOWN, yam_setup); 1124 if (!dev) { 1125 pr_err("yam: cannot allocate net device\n"); 1126 err = -ENOMEM; 1127 goto error; 1128 } 1129 1130 err = register_netdev(dev); 1131 if (err) { 1132 printk(KERN_WARNING "yam: cannot register net device %s\n", dev->name); 1133 free_netdev(dev); 1134 goto error; 1135 } 1136 yam_devs[i] = dev; 1137 1138 } 1139 1140 timer_setup(&yam_timer, yam_dotimer, 0); 1141 yam_timer.expires = jiffies + HZ / 100; 1142 add_timer(&yam_timer); 1143 1144 proc_create_seq("yam", 0444, init_net.proc_net, &yam_seqops); 1145 return 0; 1146 error: 1147 while (--i >= 0) { 1148 unregister_netdev(yam_devs[i]); 1149 free_netdev(yam_devs[i]); 1150 } 1151 return err; 1152} 1153 1154/* --------------------------------------------------------------------- */ 1155 1156static void __exit yam_cleanup_driver(void) 1157{ 1158 struct yam_mcs *p; 1159 int i; 1160 1161 del_timer_sync(&yam_timer); 1162 for (i = 0; i < NR_PORTS; i++) { 1163 struct net_device *dev = yam_devs[i]; 1164 if (dev) { 1165 unregister_netdev(dev); 1166 free_netdev(dev); 1167 } 1168 } 1169 1170 while (yam_data) { 1171 p = yam_data; 1172 yam_data = yam_data->next; 1173 kfree(p); 1174 } 1175 1176 remove_proc_entry("yam", init_net.proc_net); 1177} 1178 1179/* --------------------------------------------------------------------- */ 1180 1181MODULE_AUTHOR("Frederic Rible F1OAT frible@teaser.fr"); 1182MODULE_DESCRIPTION("Yam amateur radio modem driver"); 1183MODULE_LICENSE("GPL"); 1184MODULE_FIRMWARE(FIRMWARE_1200); 1185MODULE_FIRMWARE(FIRMWARE_9600); 1186 1187module_init(yam_init_driver); 1188module_exit(yam_cleanup_driver); 1189 1190/* --------------------------------------------------------------------- */ 1191 1192