Searched refs:Configure (Results 1 - 12 of 12) sorted by path

/haiku/src/add-ons/kernel/bus_managers/ata/
H A DATAPIDevice.cpp209 ATAPIDevice::Configure() function in class:ATAPIDevice
H A DATAChannel.cpp237 if (device->Configure() != B_OK) {
H A DATADevice.cpp532 ATADevice::Configure() function in class:ATADevice
H A DATAPrivate.h205 virtual status_t Configure();
248 virtual status_t Configure();
/haiku/src/servers/app/drawing/
H A DOverlay.cpp263 Overlay::Configure(const BRect& source, const BRect& destination) function in class:Overlay
H A DOverlay.h54 void Configure(const BRect& source, const BRect& destination);
/haiku/headers/private/kernel/platform/efi/protocol/
H A Dmanaged-network.h73 efi_status (*Configure) (struct efi_managed_network_protocol* self,
/haiku/src/add-ons/accelerants/intel_extreme/
H A DPipes.cpp130 Pipe::Configure(display_mode* mode) function in class:Pipe
488 // Configure PLL while -keeping- it disabled
H A DPipes.h42 void Configure(display_mode* mode);
H A DPorts.cpp1049 fPipe->Configure(target);
1340 fPipe->Configure(target);
1498 fPipe->Configure(target);
2122 fPipe->Configure(target);
2687 fPipe->Configure(target);
H A Dmode.cpp409 // b. Configure and enable CPU DisplayPort PLL in the DisplayPort A
434 // 6. Configure CPU pipe timings, M/N/TU, and other pipe settings
443 8. Configure and enable CPU planes (VGA or hires)
457 c. Configure and enable PCH DPLL, wait for PCH DPLL warmup (Can be done anytime before enabling
459 d. [DevCPT] Configure DPLL SEL to set the DPLL to transcoder mapping and enable DPLL to the
461 e. [DevCPT] Configure DPLL_CTL DPLL_HDMI_multipler.
462 f. Configure PCH transcoder timings, M/N/TU, and other transcoder settings (should match CPU settings).
463 g. [DevCPT] Configure and enable Transcoder DisplayPort Control if DisplayPort will be used
/haiku/src/servers/app/
H A DView.cpp539 overlay->Configure(fBitmapSource, destination);

Completed in 197 milliseconds