Searched refs:wm_mask (Results 1 - 7 of 7) sorted by relevance

/linux-master/drivers/net/wireless/ath/ath10k/
H A Dhw.c254 .wm_mask = 0x0000001E,
408 .wm_mask = 0x0000001E,
H A Dce.c393 host_ie_addr & ~(wm_regs->wm_mask));
1247 wm_regs->cc_mask | wm_regs->wm_mask);
H A Dhw.h320 u32 wm_mask; member in struct:ath10k_hw_ce_host_wm_regs
/linux-master/drivers/gpu/drm/amd/amdgpu/
H A Ddce_v11_0.c1067 u32 tmp, wm_mask, lb_vblank_lead_lines = 0; local
1157 wm_mask = RREG32(mmDPG_WATERMARK_MASK_CONTROL + amdgpu_crtc->crtc_offset);
1158 tmp = REG_SET_FIELD(wm_mask, DPG_WATERMARK_MASK_CONTROL, URGENCY_WATERMARK_MASK, 1);
1165 tmp = REG_SET_FIELD(wm_mask, DPG_WATERMARK_MASK_CONTROL, URGENCY_WATERMARK_MASK, 2);
1172 WREG32(mmDPG_WATERMARK_MASK_CONTROL + amdgpu_crtc->crtc_offset, wm_mask);
H A Ddce_v10_0.c1035 u32 tmp, wm_mask, lb_vblank_lead_lines = 0; local
1125 wm_mask = RREG32(mmDPG_WATERMARK_MASK_CONTROL + amdgpu_crtc->crtc_offset);
1126 tmp = REG_SET_FIELD(wm_mask, DPG_WATERMARK_MASK_CONTROL, URGENCY_WATERMARK_MASK, 1);
1133 tmp = REG_SET_FIELD(wm_mask, DPG_WATERMARK_MASK_CONTROL, URGENCY_WATERMARK_MASK, 2);
1140 WREG32(mmDPG_WATERMARK_MASK_CONTROL + amdgpu_crtc->crtc_offset, wm_mask);
H A Ddce_v8_0.c988 u32 tmp, wm_mask, lb_vblank_lead_lines = 0; local
1078 wm_mask = RREG32(mmDPG_WATERMARK_MASK_CONTROL + amdgpu_crtc->crtc_offset);
1079 tmp = wm_mask;
1095 WREG32(mmDPG_WATERMARK_MASK_CONTROL + amdgpu_crtc->crtc_offset, wm_mask);
/linux-master/drivers/gpu/drm/radeon/
H A Dcik.c9238 u32 tmp, wm_mask; local
9332 wm_mask = RREG32(DPG_WATERMARK_MASK_CONTROL + radeon_crtc->crtc_offset);
9333 tmp = wm_mask;
9349 WREG32(DPG_WATERMARK_MASK_CONTROL + radeon_crtc->crtc_offset, wm_mask);

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