Searched refs:where (Results 1 - 20 of 20) sorted by last modified time

/u-boot/include/
H A Dpci.h515 #define PCIE_ECAM_OFFSET(bus, dev, func, where) \
519 PCIE_ECAM_REG(where))
697 pci_dev_t dev, int where, u8 *val);
699 pci_dev_t dev, int where, u16 *val);
701 pci_dev_t dev, int where, u32 *val);
703 pci_dev_t dev, int where, u8 val);
705 pci_dev_t dev, int where, u16 val);
707 pci_dev_t dev, int where, u32 val);
732 pci_dev_t dev, int where, u8 *val);
734 pci_dev_t dev, int where, u1
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/u-boot/drivers/pci/
H A Dpcie_rockchip.c102 int where = PCIE_ECAM_OFFSET(PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf), offset & ~0x3); local
106 value = readl(priv->apb_base + PCIE_RC_NORMAL_BASE + where);
112 value = readl(priv->axi_base + where);
129 int where = PCIE_ECAM_OFFSET(PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf), offset & ~0x3); local
133 old = readl(priv->apb_base + PCIE_RC_NORMAL_BASE + where);
135 writel(value, priv->apb_base + PCIE_RC_NORMAL_BASE + where);
140 old = readl(priv->axi_base + where);
142 writel(value, priv->axi_base + where);
H A Dpcie_plda_common.c38 int where = PCIE_ECAM_OFFSET(PCI_BUS(bdf) - dev_seq(udev), local
44 *paddr = (void *)(priv->cfg_base + where);
H A Dpcie_mediatek.c100 #define CFG_HEADER_DW1(where, size) \
101 (GENMASK(((size) - 1), 0) << ((where) & 0x3))
194 int where, int size, ulong *val)
200 writel(CFG_HEADER_DW1(where, size), port->base + PCIE_CFG_HEADER1);
201 writel(CFG_HEADER_DW2(where, PCI_FUNC(devfn), PCI_DEV(devfn), bus),
217 *val = (*val >> (8 * (where & 3))) & 0xff;
219 *val = (*val >> (8 * (where & 3))) & 0xffff;
225 int where, int size, u32 val)
230 writel(CFG_HEADER_DW1(where, size), port->base + PCIE_CFG_HEADER1);
231 writel(CFG_HEADER_DW2(where, PCI_FUN
193 mtk_pcie_hw_rd_cfg(struct mtk_pcie_port *port, u32 bus, pci_dev_t devfn, int where, int size, ulong *val) argument
224 mtk_pcie_hw_wr_cfg(struct mtk_pcie_port *port, u32 bus, pci_dev_t devfn, int where, int size, u32 val) argument
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H A Dpcie_iproc.c88 * window where the MSI posted writes are written, for the writes to be
95 * To hold the address of the register where the MSI writes are
438 uint where, void **paddress)
454 where & CFG_IND_ADDR_MASK);
467 val = (PCIE_ECAM_OFFSET(busno, slot, fn, where) & CFG_ADDR_CFG_ECAM_MASK)
481 static void iproc_pcie_fix_cap(struct iproc_pcie *pcie, int where, ulong *val) argument
485 switch (where & ~0x3) {
525 unsigned int devfn, int where,
531 ret = iproc_pcie_map_ep_cfg_reg(pcie->dev, devfn, where & ~0x3, &addr);
540 *val = (*val >> (8 * (where
437 iproc_pcie_map_ep_cfg_reg(const struct udevice *udev, pci_dev_t bdf, uint where, void **paddress) argument
524 iproc_pci_raw_config_read32(struct iproc_pcie *pcie, unsigned int devfn, int where, int size, u32 *val) argument
545 iproc_pci_raw_config_write32(struct iproc_pcie *pcie, unsigned int devfn, int where, int size, u32 val) argument
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H A Dpcie_imx.c338 pci_dev_t d, int where)
357 va_address += (where & ~0x3);
403 int where, u32 *val)
414 va_address = get_bus_address(priv, d, where);
432 int where, u32 val)
441 va_address = get_bus_address(priv, d, where);
478 * handling to get the core back into a state where it is safe to
337 get_bus_address(struct imx_pcie_priv *priv, pci_dev_t d, int where) argument
402 imx_pcie_read_cfg(struct imx_pcie_priv *priv, pci_dev_t d, int where, u32 *val) argument
431 imx_pcie_write_cfg(struct imx_pcie_priv *priv, pci_dev_t d, int where, u32 val) argument
H A Dpcie_dw_mvebu.c169 * @where: Offset in the configuration space
179 pci_dev_t d, uint where)
208 va_address += where & ~0x3;
178 set_cfg_address(struct pcie_dw_mvebu *pcie, pci_dev_t d, uint where) argument
H A Dpcie_dw_common.c108 * @where: Offset in the configuration space
118 pci_dev_t d, uint where)
158 va_address += where & ~0x3;
117 set_cfg_address(struct pcie_dw *pcie, pci_dev_t d, uint where) argument
H A Dpci_tegra.c279 int where, unsigned long *address)
289 *address = port->regs.start + (where & ~3);
303 PCI_FUNC(bdf), where) & ~PCI_CONF1_ENABLE);
278 tegra_pcie_conf_address(struct tegra_pcie *pcie, pci_dev_t bdf, int where, unsigned long *address) argument
H A Dpci-rcar-gen3.c130 static void rcar_rmw32(struct udevice *dev, int where, u32 mask, u32 data) argument
133 int shift = 8 * (where & 3);
135 clrsetbits_le32(priv->regs + (where & ~3),
139 static u32 rcar_read_conf(const struct udevice *dev, int where) argument
142 int shift = 8 * (where & 3);
144 return readl(priv->regs + (where & ~3)) >> shift;
149 pci_dev_t bdf, int where, ulong *data)
152 u32 reg = where & ~3;
157 *data = readl(priv->regs + PCICONF(where / 4));
159 writel(*data, priv->regs + PCICONF(where /
147 rcar_pcie_config_access(const struct udevice *udev, unsigned char access_type, pci_dev_t bdf, int where, ulong *data) argument
196 rcar_gen3_pcie_addr_valid(pci_dev_t d, uint where) argument
213 rcar_gen3_pcie_read_config(const struct udevice *dev, pci_dev_t bdf, uint where, ulong *val, enum pci_size_t size) argument
236 rcar_gen3_pcie_write_config(struct udevice *dev, pci_dev_t bdf, uint where, ulong val, enum pci_size_t size) argument
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H A Dpci_msc01.c30 int where, u32 *data)
43 __raw_writel((PCI_CONF1_ADDRESS(bus, dev, func, where) & ~PCI_CONF1_ENABLE),
63 uint where, ulong *val, enum pci_size_t size)
68 if (msc01_config_access(msc01, PCI_ACCESS_READ, bdf, where, &data)) {
73 *val = pci_conv_32_to_size(data, where, size);
79 uint where, ulong val, enum pci_size_t size)
89 if (msc01_config_access(msc01, PCI_ACCESS_READ, bdf, where, &old))
92 data = pci_conv_size_to_32(old, val, where, size);
95 msc01_config_access(msc01, PCI_ACCESS_WRITE, bdf, where, &data);
28 msc01_config_access(struct msc01_pci_controller *msc01, unsigned char access_type, pci_dev_t bdf, int where, u32 *data) argument
62 msc01_pci_read_config(const struct udevice *dev, pci_dev_t bdf, uint where, ulong *val, enum pci_size_t size) argument
78 msc01_pci_write_config(struct udevice *dev, pci_dev_t bdf, uint where, ulong val, enum pci_size_t size) argument
H A Dpci_gt64120.c47 int where, u32 *data)
63 PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf), where, *data);
68 addr = PCI_CONF1_ADDRESS(bus, dev, func, where);
109 PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf), where, *data);
115 uint where, ulong *val,
121 if (gt_config_access(gt, PCI_ACCESS_READ, bdf, where, &data)) {
126 *val = pci_conv_32_to_size(data, where, size);
132 uint where, ulong val,
143 if (gt_config_access(gt, PCI_ACCESS_READ, bdf, where, &old))
146 data = pci_conv_size_to_32(old, val, where, siz
45 gt_config_access(struct gt64120_pci_controller *gt, unsigned char access_type, pci_dev_t bdf, int where, u32 *data) argument
114 gt64120_pci_read_config(const struct udevice *dev, pci_dev_t bdf, uint where, ulong *val, enum pci_size_t size) argument
131 gt64120_pci_write_config(struct udevice *dev, pci_dev_t bdf, uint where, ulong val, enum pci_size_t size) argument
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/u-boot/drivers/mmc/
H A Docteontx_hsmmc.c352 * Print out all of the register values where mmc is optional
837 u8 where = (u8)(cmd_arg >> 16); local
848 switch (where) {
1842 * many cases where the HS200 tuning does not work for HS400 mode.
/u-boot/arch/x86/cpu/braswell/
H A Dearly_uart.c46 static void x86_pci_write_config32(int dev, unsigned int where, u32 value) argument
50 addr = CONFIG_PCIE_ECAM_BASE | dev | (where & ~3);
/u-boot/arch/x86/cpu/baytrail/
H A Dearly_uart.c51 static void x86_pci_write_config32(int dev, unsigned int where, u32 value) argument
55 addr = CONFIG_PCIE_ECAM_BASE | dev | (where & ~3);
/u-boot/tools/
H A Dfdtgrep.c72 static void report_error(const char *where, int err) argument
74 fprintf(stderr, "Error at '%s': %s\n", where, fdt_strerror(err));
557 * case where there is no specific type
568 * case where there is no specific type (inclusive)
/u-boot/scripts/
H A Dcheckpatch.pl119 --debug KEY=[0|1] turn on/off debugging of KEY, where KEY is one of
2624 "Use 'if (IS_ENABLED(CONFIG...))' instead of '#if or #ifdef' where possible\n" . $herecurr);
3449 # declined it, i.e defined some charset where it is missing.
3892 "code indent should use tabs where possible\n" . $herevet) &&
4095 # foo bar; where foo is some local typedef or #define
4109 # foo bar; where foo is some local typedef or #define
4372 # where necessary.
4703 # check for const <foo> const where <foo> is not a pointer or array type
5025 my ($where, $prefix) = ($-[1], $1);
5027 ($where !
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H A Dcleanpatch250 if ( !defined($where = tell(FILE)) ||
251 !truncate(FILE, $where) ) {
/u-boot/arch/arm/
H A Dconfig.mk112 # FIXME: binutils versions < 2.22 have a bug in the assembler where
151 # there are only two cases where it is generated
/u-boot/arch/mips/include/asm/
H A Dsystem.h256 extern void __die(const char *, struct pt_regs *, const char *where,
258 extern void __die_if_kernel(const char *, struct pt_regs *, const char *where,

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