/linux-master/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
H A D | hwmgr_ppt.h | 37 uint16_t vddc; member in struct:phm_ppt_v1_clock_voltage_dependency_record 66 uint16_t vddc; member in struct:phm_ppt_v1_mm_clock_voltage_dependency_record
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H A D | smu7_hwmgr.c | 956 entries[i].vddc = dep_sclk_table->entries[i].vddc; 968 entries[i].vddc = dep_mclk_table->entries[i].vddc; 994 || min_vddc > dep_sclk_table->entries[0].vddc) 995 min_vddc = dep_sclk_table->entries[0].vddc; 998 || max_vddc < dep_sclk_table->entries[dep_sclk_table->count-1].vddc) 999 max_vddc = dep_sclk_table->entries[dep_sclk_table->count-1].vddc; 1039 if (dep_table->entries[i].vddc != odn_dep_table->entries[i].vddc) { 2049 uint16_t vddc = 0; local 2186 smu7_patch_clock_voltage_limits_with_vddc_leakage( struct pp_hwmgr *hwmgr, struct smu7_leakage_voltage *leakage_table, uint16_t *vddc) argument 2751 uint32_t vddc, vddci; local 2771 uint32_t vddc; local 2896 uint16_t virtual_voltage_id, vddc, vddci, efuse_voltage_id; local [all...] |
H A D | vega10_hwmgr.c | 342 odn_table->max_vddc = dep_table[0]->entries[dep_table[0]->count - 1].vddc; 344 odn_table->min_vddc = dep_table[0]->entries[0].vddc; 350 od_table[2]->entries[i].vddc = odn_table->max_vddc > od_table[2]->entries[i].vddc ? 352 od_table[2]->entries[i].vddc; 555 uint32_t vddc = 0; local 580 VOLTAGE_TYPE_VDDC, sclk, vv_id, &vddc), 585 /* need to make sure vddc is less than 2v or else, it could burn the ASIC. */ 586 PP_ASSERT_WITH_CODE((vddc < 2000 && vddc ! 648 vega10_patch_clock_voltage_limits_with_vddc_leakage( struct pp_hwmgr *hwmgr, struct vega10_leakage_voltage *leakage_table, uint16_t *vddc) argument 1919 uint16_t clk = 0, vddc = 0; local [all...] |
H A D | smu_helper.c | 36 uint8_t convert_to_vid(uint16_t vddc) argument 38 return (uint8_t) ((6200 - (vddc * VOLTAGE_SCALE)) / 25); 569 if (req_vddc <= vddc_table->entries[i].vddc) { 570 req_volt = (((uint32_t)vddc_table->entries[i].vddc) * VOLTAGE_SCALE); 703 dep_table->entries[i].vddc = allowed_dep_table->entries[i].vddc;
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/linux-master/drivers/gpu/drm/radeon/ |
H A D | rv6xx_dpm.h | 39 u16 vddc[R600_PM_NUMBER_OF_VOLTAGE_LEVELS]; member in struct:rv6xx_pm_hw_state 81 u16 vddc; member in struct:rv6xx_pl
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H A D | btc_dpm.c | 1280 u16 *vddc, u16 *vddci) 1285 if ((0 == *vddc) || (0 == *vddci)) 1288 if (*vddc > *vddci) { 1289 if ((*vddc - *vddci) > rdev->pm.dpm.dyn_state.vddc_vddci_delta) { 1291 (*vddc - rdev->pm.dpm.dyn_state.vddc_vddci_delta)); 1295 if ((*vddci - *vddc) > rdev->pm.dpm.dyn_state.vddc_vddci_delta) { 1298 *vddc = (new_voltage < max_vddc) ? new_voltage : max_vddc; 1374 if (ulv_pl->vddc) { 2072 u16 vddc, vddci; local 2090 if (ps->high.vddc > max_limit 1278 btc_apply_voltage_delta_rules(struct radeon_device *rdev, u16 max_vddc, u16 max_vddci, u16 *vddc, u16 *vddci) argument [all...] |
H A D | rv6xx_dpm.c | 485 pi->hw.vddc[R600_POWER_LEVEL_CTXSW] = state->high.vddc; 486 pi->hw.vddc[R600_POWER_LEVEL_HIGH] = state->high.vddc; 487 pi->hw.vddc[R600_POWER_LEVEL_MEDIUM] = state->medium.vddc; 488 pi->hw.vddc[R600_POWER_LEVEL_LOW] = state->low.vddc; 508 if ((state->high.vddc == state->medium.vddc) 1822 u16 vddc; local 1864 u16 vddc, vddci, mvdd; local [all...] |
H A D | btc_dpm.h | 56 u16 *vddc, u16 *vddci);
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H A D | rv770_dpm.c | 567 int rv770_populate_vddc_value(struct radeon_device *rdev, u16 vddc, argument 580 if (vddc <= pi->vddc_table[i].vddc) { 582 voltage->value = cpu_to_be16(vddc); 665 ret = rv770_populate_vddc_value(rdev, pl->vddc, 666 &level->vddc); 944 &table->ACPIState.levels[0].vddc); 958 &table->ACPIState.levels[0].vddc); 1073 initial_state->low.vddc, 1074 &table->initialState.levels[0].vddc); 1694 u16 vddc; local 2251 u16 vddc, vddci, mvdd; local [all...] |
H A D | rv770_dpm.h | 66 u16 vddc; member in struct:vddc_table_entry 82 bool voltage_control; /* vddc */ 145 u16 vddc; member in struct:rv7xx_pl 218 int rv770_populate_vddc_value(struct radeon_device *rdev, u16 vddc,
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H A D | ni_dpm.c | 745 s64 kt, kv, leakage_w, i_leakage, vddc, temperature; local 748 vddc = div64_s64(drm_int2fixp(v), 1000); 754 drm_fixp_exp(drm_fixp_mul(div64_s64(drm_int2fixp(coeff->bv), 1000), vddc))); 756 leakage_w = drm_fixp_mul(drm_fixp_mul(drm_fixp_mul(i_leakage, kt), kv), vddc); 812 if (ps->performance_levels[i].vddc > max_limits->vddc) 813 ps->performance_levels[i].vddc = max_limits->vddc; 836 if (ps->performance_levels[i].vddc < ps->performance_levels[i - 1].vddc) 1392 NISLANDS_SMC_VOLTAGE_VALUE vddc; local 3968 u16 vddc, vddci, mvdd; local [all...] |
H A D | si_dpm.c | 1709 s64 kt, kv, leakage_w, i_leakage, vddc; local 1714 vddc = div64_s64(drm_int2fixp(v), 1000); 1723 tmp = drm_fixp_mul(t_slope, vddc) + t_intercept; 1726 kv = drm_fixp_mul(av, drm_fixp_exp(drm_fixp_mul(bv, vddc))); 1728 leakage_w = drm_fixp_mul(drm_fixp_mul(drm_fixp_mul(i_leakage, kt), kv), vddc); 1747 s64 kt, kv, leakage_w, i_leakage, vddc; local 1750 vddc = div64_s64(drm_int2fixp(v), 1000); 1754 drm_fixp_exp(drm_fixp_mul(div64_s64(drm_int2fixp(coeff->bv), 100000000), vddc))); 1756 leakage_w = drm_fixp_mul(drm_fixp_mul(drm_fixp_mul(i_leakage, kt), kv), vddc); 2229 SISLANDS_SMC_VOLTAGE_VALUE vddc; local 2910 u16 vddc, vddci, min_vce_voltage = 0; local 3172 u16 vddc, count = 0; local 6726 u16 vddc, vddci, mvdd; local [all...] |
H A D | rv730_dpm.c | 244 &table->ACPIState.levels[0].vddc); 251 &table->ACPIState.levels[0].vddc); 362 initial_state->low.vddc, 363 &table->initialState.levels[0].vddc);
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H A D | rv770_smc.h | 104 RV770_SMC_VOLTAGE_VALUE vddc; member in struct:RV770_SMC_HW_PERFORMANCE_LEVEL
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H A D | rv740_dpm.c | 337 &table->ACPIState.levels[0].vddc); 345 &table->ACPIState.levels[0].vddc);
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H A D | nislands_smc.h | 104 NISLANDS_SMC_VOLTAGE_VALUE vddc; member in struct:NISLANDS_SMC_HW_PERFORMANCE_LEVEL
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H A D | ci_dpm.c | 241 static u8 ci_convert_to_vid(u16 vddc) argument 243 return (6200 - (vddc * VOLTAGE_SCALE)) / 25; 268 lo_vid[i] = ci_convert_to_vid(rdev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc); 1312 u16 vddc, vddci; local 1321 if (radeon_atom_get_voltage_evv(rdev, virtual_voltage_id, &vddc) != 0) 1323 if (vddc != 0 && vddc != virtual_voltage_id) { 1324 pi->vddc_leakage.actual_voltage[pi->vddc_leakage.count] = vddc; 1332 if (radeon_atom_get_leakage_vddc_based_on_leakage_params(rdev, &vddc, &vddci, 1335 if (vddc ! 4916 ci_patch_with_vddc_leakage(struct radeon_device *rdev, u16 *vddc) argument [all...] |
/linux-master/drivers/gpu/drm/amd/pm/swsmu/smu11/ |
H A D | cyan_skillfish_ppt.c | 58 uint32_t vddc; member in struct:gfx_user_settings 461 dev_err(smu->adev->dev, "Invalid vddc! Valid vddc range: %umV - %umV\n", 467 cyan_skillfish_user_settings.vddc = input[2]; 477 cyan_skillfish_user_settings.vddc = CYAN_SKILLFISH_VDDC_MAGIC; 493 if ((cyan_skillfish_user_settings.vddc != CYAN_SKILLFISH_VDDC_MAGIC) && 494 (cyan_skillfish_user_settings.vddc < CYAN_SKILLFISH_VDDC_MIN || 495 cyan_skillfish_user_settings.vddc > CYAN_SKILLFISH_VDDC_MAX)) { 496 dev_err(smu->adev->dev, "Invalid vddc! Valid vddc rang [all...] |
/linux-master/drivers/gpu/drm/amd/pm/legacy-dpm/ |
H A D | si_dpm.c | 1861 s64 kt, kv, leakage_w, i_leakage, vddc; local 1866 vddc = div64_s64(drm_int2fixp(v), 1000); 1875 tmp = drm_fixp_mul(t_slope, vddc) + t_intercept; 1878 kv = drm_fixp_mul(av, drm_fixp_exp(drm_fixp_mul(bv, vddc))); 1880 leakage_w = drm_fixp_mul(drm_fixp_mul(drm_fixp_mul(i_leakage, kt), kv), vddc); 1899 s64 kt, kv, leakage_w, i_leakage, vddc; local 1902 vddc = div64_s64(drm_int2fixp(v), 1000); 1906 drm_fixp_exp(drm_fixp_mul(div64_s64(drm_int2fixp(coeff->bv), 100000000), vddc))); 1908 leakage_w = drm_fixp_mul(drm_fixp_mul(drm_fixp_mul(i_leakage, kt), kv), vddc); 2387 SISLANDS_SMC_VOLTAGE_VALUE vddc; local 3309 btc_apply_voltage_delta_rules(struct amdgpu_device *adev, u16 max_vddc, u16 max_vddci, u16 *vddc, u16 *vddci) argument 3397 u16 vddc; local 3430 u16 vddc, vddci, min_vce_voltage = 0; local 3689 u16 vddc, count = 0; local 7237 u16 vddc, vddci, mvdd; local [all...] |
H A D | si_dpm.h | 441 RV770_SMC_VOLTAGE_VALUE vddc; member in struct:RV770_SMC_HW_PERFORMANCE_LEVEL 489 u16 vddc; member in struct:vddc_table_entry 538 bool voltage_control; /* vddc */ 608 u16 vddc; member in struct:rv7xx_pl 768 NISLANDS_SMC_VOLTAGE_VALUE vddc; member in struct:NISLANDS_SMC_HW_PERFORMANCE_LEVEL
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/linux-master/drivers/gpu/drm/amd/amdgpu/ |
H A D | amdgpu_atombios.h | 186 u16 *vddc, u16 *vddci, u16 *mvdd);
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/linux-master/drivers/gpu/drm/amd/pm/powerplay/inc/ |
H A D | hardwaremanager.h | 273 uint32_t vddc; member in struct:PHM_PerformanceLevel 385 uint32_t vddc; member in struct:phm_odn_performance_level
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/linux-master/drivers/gpu/drm/amd/pm/swsmu/smu12/ |
H A D | smu_v12_0.c | 346 smu->smu_table.boot_values.vddc = v_3_1->bootup_vddc_mv; 363 smu->smu_table.boot_values.vddc = v_3_3->bootup_vddc_mv;
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/linux-master/drivers/gpu/drm/amd/pm/powerplay/smumgr/ |
H A D | fiji_smumgr.c | 369 *voltage |= (dep_table->entries[i].vddc * 379 (dep_table->entries[i].vddc - 397 *voltage |= (dep_table->entries[i - 1].vddc * VOLTAGE_SCALE) << VDDC_SHIFT; 404 (dep_table->entries[i].vddc - 766 * We are populating vddc CAC data to BapmVddc table 1436 (mm_table->entries[count].vddc * VOLTAGE_SCALE) << VDDC_SHIFT; 1438 ((mm_table->entries[count].vddc - VDDC_VDDCI_DELTA) * 1473 table->AcpLevel[count].MinVoltage |= (mm_table->entries[count].vddc * 1475 table->AcpLevel[count].MinVoltage |= ((mm_table->entries[count].vddc - 1571 table->UvdLevel[count].MinVoltage |= (mm_table->entries[count].vddc * [all...] |
H A D | vegam_smumgr.c | 512 * We are populating vddc CAC data to BapmVddc table 617 *voltage |= (dep_table->entries[i].vddc * 627 (dep_table->entries[i].vddc - 645 *voltage |= (dep_table->entries[i - 1].vddc * VOLTAGE_SCALE) << VDDC_SHIFT; 655 (dep_table->entries[i - 1].vddc - 1214 (mm_table->entries[count].vddc * VOLTAGE_SCALE) << VDDC_SHIFT; 1218 mm_table->entries[count].vddc - VDDC_VDDCI_DELTA); 1220 vddci = mm_table->entries[count].vddc - VDDC_VDDCI_DELTA; 1328 (mm_table->entries[count].vddc * VOLTAGE_SCALE) << VDDC_SHIFT; 1332 mm_table->entries[count].vddc [all...] |