Searched refs:uncore (Results 1 - 25 of 129) sorted by relevance

123456

/linux-master/drivers/gpu/drm/xe/display/ext/
H A Di915_irq.c11 void gen3_irq_reset(struct intel_uncore *uncore, i915_reg_t imr, argument
14 intel_uncore_write(uncore, imr, 0xffffffff);
15 intel_uncore_posting_read(uncore, imr);
17 intel_uncore_write(uncore, ier, 0);
20 intel_uncore_write(uncore, iir, 0xffffffff);
21 intel_uncore_posting_read(uncore, iir);
22 intel_uncore_write(uncore, iir, 0xffffffff);
23 intel_uncore_posting_read(uncore, iir);
29 void gen3_assert_iir_is_zero(struct intel_uncore *uncore, i915_reg_t reg) argument
31 struct xe_device *xe = container_of(uncore, struc
46 gen3_irq_init(struct intel_uncore *uncore, i915_reg_t imr, u32 imr_val, i915_reg_t ier, u32 ier_val, i915_reg_t iir) argument
[all...]
/linux-master/drivers/platform/x86/intel/uncore-frequency/
H A DMakefile3 # Makefile for linux/drivers/platform/x86/intel/uncore-frequency
6 obj-$(CONFIG_INTEL_UNCORE_FREQ_CONTROL) += intel-uncore-frequency.o
7 intel-uncore-frequency-y := uncore-frequency.o
8 obj-$(CONFIG_INTEL_UNCORE_FREQ_CONTROL) += intel-uncore-frequency-common.o
9 intel-uncore-frequency-common-y := uncore-frequency-common.o
10 obj-$(CONFIG_INTEL_UNCORE_FREQ_CONTROL_TPMI) += intel-uncore-frequency-tpmi.o
11 intel-uncore-frequency-tpmi-y := uncore
[all...]
/linux-master/drivers/gpu/drm/i915/gt/
H A Dintel_sa_media.c16 struct intel_uncore *uncore; local
18 uncore = drmm_kzalloc(&i915->drm, sizeof(*uncore), GFP_KERNEL);
19 if (!uncore)
22 uncore->gsi_offset = gsi_offset;
26 intel_uncore_init_early(uncore, gt);
32 uncore->regs = intel_uncore_regs(&i915->uncore);
33 if (drm_WARN_ON(&i915->drm, uncore->regs == NULL))
36 gt->uncore
[all...]
H A Dintel_gt_clock_utils.c13 static u32 read_reference_ts_freq(struct intel_uncore *uncore) argument
15 u32 ts_override = intel_uncore_read(uncore, GEN9_TIMESTAMP_OVERRIDE);
30 static u32 gen11_get_crystal_clock_freq(struct intel_uncore *uncore, argument
56 static u32 gen11_read_clock_frequency(struct intel_uncore *uncore) argument
58 u32 ctc_reg = intel_uncore_read(uncore, CTC_MODE);
71 freq = read_reference_ts_freq(uncore);
73 u32 c0 = intel_uncore_read(uncore, RPM_CONFIG0);
75 freq = gen11_get_crystal_clock_freq(uncore, c0);
89 static u32 gen9_read_clock_frequency(struct intel_uncore *uncore) argument
91 u32 ctc_reg = intel_uncore_read(uncore, CTC_MOD
111 gen6_read_clock_frequency(struct intel_uncore *uncore) argument
123 gen5_read_clock_frequency(struct intel_uncore *uncore) argument
132 g4x_read_clock_frequency(struct intel_uncore *uncore) argument
143 gen4_read_clock_frequency(struct intel_uncore *uncore) argument
157 read_clock_frequency(struct intel_uncore *uncore) argument
[all...]
H A Dintel_rc6.c48 return rc6_to_gt(rc)->uncore;
59 struct intel_uncore *uncore = gt->uncore; local
70 intel_uncore_write_fw(uncore, GEN6_RC6_WAKE_RATE_LIMIT, 54 << 16 | 85);
71 intel_uncore_write_fw(uncore, GEN10_MEDIA_WAKE_RATE_LIMIT, 150);
73 intel_uncore_write_fw(uncore, GEN6_RC_EVALUATION_INTERVAL, 125000); /* 12500 * 1280ns */
74 intel_uncore_write_fw(uncore, GEN6_RC_IDLE_HYSTERSIS, 25); /* 25 * 1280ns */
76 intel_uncore_write_fw(uncore, RING_MAX_IDLE(engine->mmio_base), 10);
78 intel_uncore_write_fw(uncore, GUC_MAX_IDLE_COUNT, 0xA);
80 intel_uncore_write_fw(uncore, GEN6_RC_SLEE
148 struct intel_uncore *uncore = rc6_to_uncore(rc6); local
218 struct intel_uncore *uncore = rc6_to_uncore(rc6); local
240 struct intel_uncore *uncore = rc6_to_uncore(rc6); local
294 struct intel_uncore *uncore = rc6_to_uncore(rc6); local
316 struct intel_uncore *uncore = rc6_to_uncore(rc6); local
369 struct intel_uncore *uncore = rc6_to_uncore(rc6); local
397 struct intel_uncore *uncore = rc6_to_uncore(rc6); local
425 struct intel_uncore *uncore = rc6_to_uncore(rc6); local
439 struct intel_uncore *uncore = rc6_to_uncore(rc6); local
568 struct intel_uncore *uncore = rc6_to_uncore(rc6); local
645 struct intel_uncore *uncore = rc6_to_uncore(rc6); local
683 struct intel_uncore *uncore = rc6_to_uncore(rc6); local
694 struct intel_uncore *uncore = rc6_to_uncore(rc6); local
734 struct intel_uncore *uncore = rc6_to_uncore(rc6); local
750 vlv_residency_raw(struct intel_uncore *uncore, const i915_reg_t reg) argument
798 struct intel_uncore *uncore = rc6_to_uncore(rc6); local
[all...]
H A Dintel_gt_irq.c34 void __iomem * const regs = intel_uncore_regs(gt->uncore);
151 void __iomem * const regs = intel_uncore_regs(gt->uncore);
186 void __iomem * const regs = intel_uncore_regs(gt->uncore);
215 struct intel_uncore *uncore = gt->uncore; local
218 intel_uncore_write(uncore, GEN11_RENDER_COPY_INTR_ENABLE, 0);
219 intel_uncore_write(uncore, GEN11_VCS_VECS_INTR_ENABLE, 0);
221 intel_uncore_write(uncore, GEN12_CCS_RSVD_INTR_ENABLE, 0);
223 intel_uncore_write(uncore, GEN11_GUNIT_CSME_INTR_ENABLE, 0);
226 intel_uncore_write(uncore, GEN11_RCS0_RSVD_INTR_MAS
263 struct intel_uncore *uncore = gt->uncore; local
453 struct intel_uncore *uncore = gt->uncore; local
475 struct intel_uncore *uncore = gt->uncore; local
515 struct intel_uncore *uncore = gt->uncore; local
524 struct intel_uncore *uncore = gt->uncore; local
[all...]
H A Dintel_gt_pm_irq.c16 struct intel_uncore *uncore = gt->uncore; local
29 intel_uncore_write(uncore, reg, mask);
64 struct intel_uncore *uncore = gt->uncore; local
69 intel_uncore_write(uncore, reg, reset_mask);
70 intel_uncore_write(uncore, reg, reset_mask);
71 intel_uncore_posting_read(uncore, reg);
77 struct intel_uncore *uncore = gt->uncore; local
[all...]
/linux-master/drivers/gpu/drm/i915/
H A Dvlv_suspend.c111 struct intel_uncore *uncore = &i915->uncore; local
118 s->wr_watermark = intel_uncore_read(uncore, GEN7_WR_WATERMARK);
119 s->gfx_prio_ctrl = intel_uncore_read(uncore, GEN7_GFX_PRIO_CTRL);
120 s->arb_mode = intel_uncore_read(uncore, ARB_MODE);
121 s->gfx_pend_tlb0 = intel_uncore_read(uncore, GEN7_GFX_PEND_TLB0);
122 s->gfx_pend_tlb1 = intel_uncore_read(uncore, GEN7_GFX_PEND_TLB1);
125 s->lra_limits[i] = intel_uncore_read(uncore, GEN7_LRA_LIMITS(i));
127 s->media_max_req_count = intel_uncore_read(uncore, GEN7_MEDIA_MAX_REQ_COUNT);
128 s->gfx_max_req_count = intel_uncore_read(uncore, GEN7_GFX_MAX_REQ_COUN
196 struct intel_uncore *uncore = &i915->uncore; local
305 struct intel_uncore *uncore = &i915->uncore; local
329 struct intel_uncore *uncore = &i915->uncore; local
372 struct intel_uncore *uncore = &i915->uncore; local
[all...]
H A Dintel_uncore.c42 fw_domains_get(struct intel_uncore *uncore, enum forcewake_domains fw_domains) argument
44 uncore->fw_get_funcs->force_wake_get(uncore, fw_domains);
53 i915->uncore.debug = &i915->mmio_debug;
56 static void mmio_debug_suspend(struct intel_uncore *uncore) argument
58 if (!uncore->debug)
61 spin_lock(&uncore->debug->lock);
64 if (!uncore->debug->suspend_count++) {
65 uncore->debug->saved_mmio_check = uncore
74 mmio_debug_resume(struct intel_uncore *uncore) argument
291 fw_domains_get_normal(struct intel_uncore *uncore, enum forcewake_domains fw_domains) argument
310 fw_domains_get_with_fallback(struct intel_uncore *uncore, enum forcewake_domains fw_domains) argument
330 fw_domains_put(struct intel_uncore *uncore, enum forcewake_domains fw_domains) argument
344 fw_domains_reset(struct intel_uncore *uncore, enum forcewake_domains fw_domains) argument
359 gt_thread_status(struct intel_uncore *uncore) argument
369 __gen6_gt_wait_for_thread_c0(struct intel_uncore *uncore) argument
380 fw_domains_get_with_thread_status(struct intel_uncore *uncore, enum forcewake_domains fw_domains) argument
389 fifo_free_entries(struct intel_uncore *uncore) argument
396 __gen6_gt_wait_for_fifo(struct intel_uncore *uncore) argument
425 struct intel_uncore *uncore = domain->uncore; local
448 intel_uncore_forcewake_reset(struct intel_uncore *uncore) argument
508 fpga_check_for_unclaimed_mmio(struct intel_uncore *uncore) argument
538 vlv_check_for_unclaimed_mmio(struct intel_uncore *uncore) argument
552 gen6_check_for_fifo_debug(struct intel_uncore *uncore) argument
567 check_for_unclaimed_mmio(struct intel_uncore *uncore) argument
588 forcewake_early_sanitize(struct intel_uncore *uncore, unsigned int restore_forcewake) argument
614 intel_uncore_suspend(struct intel_uncore *uncore) argument
626 intel_uncore_resume_early(struct intel_uncore *uncore) argument
642 intel_uncore_runtime_resume(struct intel_uncore *uncore) argument
650 __intel_uncore_forcewake_get(struct intel_uncore *uncore, enum forcewake_domains fw_domains) argument
682 intel_uncore_forcewake_get(struct intel_uncore *uncore, enum forcewake_domains fw_domains) argument
705 intel_uncore_forcewake_user_get(struct intel_uncore *uncore) argument
722 intel_uncore_forcewake_user_put(struct intel_uncore *uncore) argument
740 intel_uncore_forcewake_get__locked(struct intel_uncore *uncore, enum forcewake_domains fw_domains) argument
751 __intel_uncore_forcewake_put(struct intel_uncore *uncore, enum forcewake_domains fw_domains, bool delayed) argument
784 intel_uncore_forcewake_put(struct intel_uncore *uncore, enum forcewake_domains fw_domains) argument
797 intel_uncore_forcewake_put_delayed(struct intel_uncore *uncore, enum forcewake_domains fw_domains) argument
815 intel_uncore_forcewake_flush(struct intel_uncore *uncore, enum forcewake_domains fw_domains) argument
840 intel_uncore_forcewake_put__locked(struct intel_uncore *uncore, enum forcewake_domains fw_domains) argument
851 assert_forcewakes_inactive(struct intel_uncore *uncore) argument
861 assert_forcewakes_active(struct intel_uncore *uncore, enum forcewake_domains fw_domains) argument
941 find_fw_domain(struct intel_uncore *uncore, u32 offset) argument
1197 is_shadowed(struct intel_uncore *uncore, u32 offset) argument
1212 gen6_reg_write_fw_domains(struct intel_uncore *uncore, i915_reg_t reg) argument
1897 ilk_dummy_write(struct intel_uncore *uncore) argument
1906 __unclaimed_reg_debug(struct intel_uncore *uncore, const i915_reg_t reg, const bool read) argument
1920 __unclaimed_previous_reg_debug(struct intel_uncore *uncore, const i915_reg_t reg, const bool read) argument
1932 unclaimed_reg_debug_header(struct intel_uncore *uncore, const i915_reg_t reg, const bool read) argument
1948 unclaimed_reg_debug_footer(struct intel_uncore *uncore, const i915_reg_t reg, const bool read) argument
2026 ___force_wake_auto(struct intel_uncore *uncore, enum forcewake_domains fw_domains) argument
2040 __force_wake_auto(struct intel_uncore *uncore, enum forcewake_domains fw_domains) argument
2067 fwtable_reg_read_fw_domains(struct intel_uncore *uncore, i915_reg_t reg) argument
2156 fwtable_reg_write_fw_domains(struct intel_uncore *uncore, i915_reg_t reg) argument
2206 __fw_domain_init(struct intel_uncore *uncore, enum forcewake_domain_id domain_id, i915_reg_t reg_set, i915_reg_t reg_ack) argument
2264 fw_domain_fini(struct intel_uncore *uncore, enum forcewake_domain_id domain_id) argument
2281 intel_uncore_fw_domains_fini(struct intel_uncore *uncore) argument
2302 intel_uncore_fw_domains_init(struct intel_uncore *uncore) argument
2450 struct intel_uncore *uncore = container_of(nb, local
2485 intel_uncore_setup_mmio(struct intel_uncore *uncore, phys_addr_t phys_addr) argument
2517 intel_uncore_init_early(struct intel_uncore *uncore, struct intel_gt *gt) argument
2526 uncore_raw_init(struct intel_uncore *uncore) argument
2542 uncore_media_forcewake_init(struct intel_uncore *uncore) argument
2558 uncore_forcewake_init(struct intel_uncore *uncore) argument
2625 sanity_check_mmio_access(struct intel_uncore *uncore) argument
2655 intel_uncore_init_mmio(struct intel_uncore *uncore) argument
2713 intel_uncore_prune_engine_fw_domains(struct intel_uncore *uncore, struct intel_gt *gt) argument
2776 driver_initiated_flr(struct intel_uncore *uncore) argument
2830 struct intel_uncore *uncore = data; local
2871 __intel_wait_for_register_fw(struct intel_uncore *uncore, i915_reg_t reg, u32 mask, u32 value, unsigned int fast_timeout_us, unsigned int slow_timeout_ms, u32 *out_value) argument
2920 __intel_wait_for_register(struct intel_uncore *uncore, i915_reg_t reg, u32 mask, u32 value, unsigned int fast_timeout_us, unsigned int slow_timeout_ms, u32 *out_value) argument
2960 intel_uncore_unclaimed_mmio(struct intel_uncore *uncore) argument
2975 intel_uncore_arm_unclaimed_mmio_detection(struct intel_uncore *uncore) argument
3020 intel_uncore_forcewake_for_reg(struct intel_uncore *uncore, i915_reg_t reg, unsigned int op) argument
[all...]
H A Dintel_pcode.h13 int snb_pcode_read(struct intel_uncore *uncore, u32 mbox, u32 *val, u32 *val1);
14 int snb_pcode_write_timeout(struct intel_uncore *uncore, u32 mbox, u32 val,
16 #define snb_pcode_write(uncore, mbox, val) \
17 snb_pcode_write_timeout(uncore, mbox, val, 500, 0)
19 int skl_pcode_request(struct intel_uncore *uncore, u32 mbox, u32 request,
22 int intel_pcode_init(struct intel_uncore *uncore);
27 int snb_pcode_read_p(struct intel_uncore *uncore, u32 mbcmd, u32 p1, u32 p2, u32 *val);
28 int snb_pcode_write_p(struct intel_uncore *uncore, u32 mbcmd, u32 p1, u32 p2, u32 val);
H A Dintel_clock_gating.c58 intel_uncore_rmw(&i915->uncore, CHICKEN_PAR1_1, 0, SKL_DE_COMPRESSED_HASH_MODE);
62 intel_uncore_rmw(&i915->uncore, CHICKEN_PAR1_1, 0, SKL_EDP_PSR_FIX_RDWRAP);
65 intel_uncore_rmw(&i915->uncore, GEN8_CHICKEN_DCPR_1, 0, MASK_WAKEMEM);
71 intel_uncore_rmw(&i915->uncore, DISP_ARB_CTL, 0, DISP_FBC_MEMORY_WAKE);
79 intel_uncore_rmw(&i915->uncore, GEN8_UCGCTL6, 0, GEN8_SDEUNIT_CLOCK_GATE_DISABLE);
85 intel_uncore_rmw(&i915->uncore, GEN8_UCGCTL6, 0, GEN8_HDCUNIT_CLOCK_GATE_DISABLE_HDCREQ);
91 intel_uncore_write(&i915->uncore, GEN9_CLKGATE_DIS_0,
92 intel_uncore_read(&i915->uncore, GEN9_CLKGATE_DIS_0) |
101 intel_uncore_write(&i915->uncore, RM_TIMEOUT, MMIO_TIMEOUT_US(950));
107 intel_uncore_rmw(&i915->uncore, DISP_ARB_CT
669 struct intel_uncore *uncore = &i915->uncore; local
[all...]
H A Dintel_uncore.h92 void (*force_wake_get)(struct intel_uncore *uncore,
97 enum forcewake_domains (*read_fw_domains)(struct intel_uncore *uncore,
99 enum forcewake_domains (*write_fw_domains)(struct intel_uncore *uncore,
102 u8 (*mmio_readb)(struct intel_uncore *uncore,
104 u16 (*mmio_readw)(struct intel_uncore *uncore,
106 u32 (*mmio_readl)(struct intel_uncore *uncore,
108 u64 (*mmio_readq)(struct intel_uncore *uncore,
111 void (*mmio_writeb)(struct intel_uncore *uncore,
113 void (*mmio_writew)(struct intel_uncore *uncore,
115 void (*mmio_writel)(struct intel_uncore *uncore,
180 struct intel_uncore *uncore; member in struct:intel_uncore::intel_uncore_forcewake_domain
204 intel_uncore_has_forcewake(const struct intel_uncore *uncore) argument
210 intel_uncore_has_fpga_dbg_unclaimed(const struct intel_uncore *uncore) argument
216 intel_uncore_has_dbg_unclaimed(const struct intel_uncore *uncore) argument
222 intel_uncore_has_fifo(const struct intel_uncore *uncore) argument
228 intel_uncore_needs_flr_on_fini(const struct intel_uncore *uncore) argument
234 intel_uncore_set_flr_on_fini(struct intel_uncore *uncore) argument
294 intel_wait_for_register(struct intel_uncore *uncore, i915_reg_t reg, u32 mask, u32 value, unsigned int timeout_ms) argument
312 intel_wait_for_register_fw(struct intel_uncore *uncore, i915_reg_t reg, u32 mask, u32 value, unsigned int timeout_ms) argument
435 intel_uncore_rmw(struct intel_uncore *uncore, i915_reg_t reg, u32 clear, u32 set) argument
446 intel_uncore_rmw_fw(struct intel_uncore *uncore, i915_reg_t reg, u32 clear, u32 set) argument
458 intel_uncore_read64_2x32(struct intel_uncore *uncore, i915_reg_t lower_reg, i915_reg_t upper_reg) argument
487 intel_uncore_write_and_verify(struct intel_uncore *uncore, i915_reg_t reg, u32 val, u32 mask, u32 expected_val) argument
499 intel_uncore_regs(struct intel_uncore *uncore) argument
[all...]
H A Dintel_pcode.c55 static int __snb_pcode_rw(struct intel_uncore *uncore, u32 mbox, argument
60 lockdep_assert_held(&uncore->i915->sb_lock);
68 if (intel_uncore_read_fw(uncore, GEN6_PCODE_MAILBOX) & GEN6_PCODE_READY)
71 intel_uncore_write_fw(uncore, GEN6_PCODE_DATA, *val);
72 intel_uncore_write_fw(uncore, GEN6_PCODE_DATA1, val1 ? *val1 : 0);
73 intel_uncore_write_fw(uncore,
76 if (__intel_wait_for_register_fw(uncore,
85 *val = intel_uncore_read_fw(uncore, GEN6_PCODE_DATA);
87 *val1 = intel_uncore_read_fw(uncore, GEN6_PCODE_DATA1);
89 if (GRAPHICS_VER(uncore
95 snb_pcode_read(struct intel_uncore *uncore, u32 mbox, u32 *val, u32 *val1) argument
112 snb_pcode_write_timeout(struct intel_uncore *uncore, u32 mbox, u32 val, int fast_timeout_us, int slow_timeout_ms) argument
131 skl_pcode_try_request(struct intel_uncore *uncore, u32 mbox, u32 request, u32 reply_mask, u32 reply, u32 *status) argument
159 skl_pcode_request(struct intel_uncore *uncore, u32 mbox, u32 request, u32 reply_mask, u32 reply, int timeout_base_ms) argument
207 pcode_init_wait(struct intel_uncore *uncore, int timeout_ms) argument
223 intel_pcode_init(struct intel_uncore *uncore) argument
245 snb_pcode_read_p(struct intel_uncore *uncore, u32 mbcmd, u32 p1, u32 p2, u32 *val) argument
261 snb_pcode_write_p(struct intel_uncore *uncore, u32 mbcmd, u32 p1, u32 p2, u32 val) argument
[all...]
H A Dintel_sbi.c17 struct intel_uncore *uncore = &i915->uncore; local
22 if (intel_wait_for_register_fw(uncore,
30 intel_uncore_write_fw(uncore, SBI_ADDR, (u32)reg << 16);
31 intel_uncore_write_fw(uncore, SBI_DATA, is_read ? 0 : *val);
39 intel_uncore_write_fw(uncore, SBI_CTL_STAT, cmd | SBI_BUSY);
41 if (__intel_wait_for_register_fw(uncore,
55 *val = intel_uncore_read_fw(uncore, SBI_DATA);
H A Di915_irq.c81 void gen3_irq_reset(struct intel_uncore *uncore, i915_reg_t imr, argument
84 intel_uncore_write(uncore, imr, 0xffffffff);
85 intel_uncore_posting_read(uncore, imr);
87 intel_uncore_write(uncore, ier, 0);
90 intel_uncore_write(uncore, iir, 0xffffffff);
91 intel_uncore_posting_read(uncore, iir);
92 intel_uncore_write(uncore, iir, 0xffffffff);
93 intel_uncore_posting_read(uncore, iir);
96 static void gen2_irq_reset(struct intel_uncore *uncore) argument
98 intel_uncore_write16(uncore, GEN2_IM
113 gen3_assert_iir_is_zero(struct intel_uncore *uncore, i915_reg_t reg) argument
129 gen2_assert_iir_is_zero(struct intel_uncore *uncore) argument
145 gen3_irq_init(struct intel_uncore *uncore, i915_reg_t imr, u32 imr_val, i915_reg_t ier, u32 ier_val, i915_reg_t iir) argument
157 gen2_irq_init(struct intel_uncore *uncore, u32 imr_val, u32 ier_val) argument
664 struct intel_uncore *uncore = &dev_priv->uncore; local
679 struct intel_uncore *uncore = &dev_priv->uncore; local
712 struct intel_uncore *uncore = &dev_priv->uncore; local
728 struct intel_uncore *uncore = gt->uncore; local
741 struct intel_uncore *uncore = &dev_priv->uncore; local
760 struct intel_uncore *uncore = &dev_priv->uncore; local
806 struct intel_uncore *uncore = gt->uncore; local
820 struct intel_uncore *uncore = &dev_priv->uncore; local
851 struct intel_uncore *uncore = &dev_priv->uncore; local
882 struct intel_uncore *uncore = &dev_priv->uncore; local
912 struct intel_uncore *uncore = &i915->uncore; local
1039 struct intel_uncore *uncore = &dev_priv->uncore; local
1054 struct intel_uncore *uncore = &dev_priv->uncore; local
1149 struct intel_uncore *uncore = &dev_priv->uncore; local
1181 struct intel_uncore *uncore = &dev_priv->uncore; local
[all...]
H A Di915_irq.h43 void gen3_assert_iir_is_zero(struct intel_uncore *uncore, i915_reg_t reg);
45 void gen3_irq_reset(struct intel_uncore *uncore, i915_reg_t imr,
48 void gen3_irq_init(struct intel_uncore *uncore,
53 #define GEN8_IRQ_RESET_NDX(uncore, type, which) \
56 gen3_irq_reset((uncore), GEN8_##type##_IMR(which_), \
60 #define GEN3_IRQ_RESET(uncore, type) \
61 gen3_irq_reset((uncore), type##IMR, type##IIR, type##IER)
63 #define GEN8_IRQ_INIT_NDX(uncore, type, which, imr_val, ier_val) \
66 gen3_irq_init((uncore), \
72 #define GEN3_IRQ_INIT(uncore, typ
[all...]
/linux-master/drivers/gpu/drm/xe/compat-i915-headers/
H A Dintel_uncore.h13 static inline struct xe_gt *__compat_uncore_to_gt(struct intel_uncore *uncore) argument
15 struct xe_device *xe = container_of(uncore, struct xe_device, uncore);
20 static inline u32 intel_uncore_read(struct intel_uncore *uncore, argument
25 return xe_mmio_read32(__compat_uncore_to_gt(uncore), reg);
28 static inline u32 intel_uncore_read8(struct intel_uncore *uncore, argument
33 return xe_mmio_read8(__compat_uncore_to_gt(uncore), reg);
36 static inline u32 intel_uncore_read16(struct intel_uncore *uncore, argument
41 return xe_mmio_read16(__compat_uncore_to_gt(uncore), reg);
45 intel_uncore_read64_2x32(struct intel_uncore *uncore, argument
63 intel_uncore_posting_read(struct intel_uncore *uncore, i915_reg_t i915_reg) argument
71 intel_uncore_write(struct intel_uncore *uncore, i915_reg_t i915_reg, u32 val) argument
79 intel_uncore_rmw(struct intel_uncore *uncore, i915_reg_t i915_reg, u32 clear, u32 set) argument
87 intel_wait_for_register(struct intel_uncore *uncore, i915_reg_t i915_reg, u32 mask, u32 value, unsigned int timeout) argument
97 intel_wait_for_register_fw(struct intel_uncore *uncore, i915_reg_t i915_reg, u32 mask, u32 value, unsigned int timeout) argument
108 __intel_wait_for_register(struct intel_uncore *uncore, i915_reg_t i915_reg, u32 mask, u32 value, unsigned int fast_timeout_us, unsigned int slow_timeout_ms, u32 *out_value) argument
119 intel_uncore_read_fw(struct intel_uncore *uncore, i915_reg_t i915_reg) argument
127 intel_uncore_write_fw(struct intel_uncore *uncore, i915_reg_t i915_reg, u32 val) argument
135 intel_uncore_read_notrace(struct intel_uncore *uncore, i915_reg_t i915_reg) argument
143 intel_uncore_write_notrace(struct intel_uncore *uncore, i915_reg_t i915_reg, u32 val) argument
151 intel_uncore_regs(struct intel_uncore *uncore) argument
[all...]
H A Dintel_pcode.h13 snb_pcode_write_timeout(struct intel_uncore *uncore, u32 mbox, u32 val, argument
16 return xe_pcode_write_timeout(__compat_uncore_to_gt(uncore), mbox, val,
21 snb_pcode_write(struct intel_uncore *uncore, u32 mbox, u32 val) argument
24 return xe_pcode_write(__compat_uncore_to_gt(uncore), mbox, val);
28 snb_pcode_read(struct intel_uncore *uncore, u32 mbox, u32 *val, u32 *val1) argument
30 return xe_pcode_read(__compat_uncore_to_gt(uncore), mbox, val, val1);
34 skl_pcode_request(struct intel_uncore *uncore, u32 mbox, argument
38 return xe_pcode_request(__compat_uncore_to_gt(uncore), mbox, request, reply_mask, reply,
/linux-master/drivers/gpu/drm/i915/selftests/
H A Dmock_uncore.c29 nop_write##x(struct intel_uncore *uncore, i915_reg_t reg, u##x val, bool trace) { }
36 nop_read##x(struct intel_uncore *uncore, i915_reg_t reg, bool trace) { return 0; }
42 void mock_uncore_init(struct intel_uncore *uncore, argument
45 intel_uncore_init_early(uncore, to_gt(i915));
47 ASSIGN_RAW_WRITE_MMIO_VFUNCS(uncore, nop);
48 ASSIGN_RAW_READ_MMIO_VFUNCS(uncore, nop);
H A Dmock_uncore.h31 void mock_uncore_init(struct intel_uncore *uncore,
/linux-master/arch/x86/events/amd/
H A DMakefile6 obj-$(CONFIG_PERF_EVENTS_AMD_UNCORE) += amd-uncore.o
7 amd-uncore-objs := uncore.o
H A Duncore.c78 void (*scan)(struct amd_uncore *uncore, unsigned int cpu);
79 int (*init)(struct amd_uncore *uncore, unsigned int cpu);
80 void (*move)(struct amd_uncore *uncore, unsigned int cpu);
81 void (*free)(struct amd_uncore *uncore, unsigned int cpu);
105 * Some uncore PMUs do not have RDPMC assignments. In such cases,
391 int amd_uncore_ctx_cid(struct amd_uncore *uncore, unsigned int cpu) argument
393 union amd_uncore_info *info = per_cpu_ptr(uncore->info, cpu);
398 int amd_uncore_ctx_gid(struct amd_uncore *uncore, unsigned int cpu) argument
400 union amd_uncore_info *info = per_cpu_ptr(uncore->info, cpu);
405 int amd_uncore_ctx_num_pmcs(struct amd_uncore *uncore, unsigne argument
411 amd_uncore_ctx_free(struct amd_uncore *uncore, unsigned int cpu) argument
438 amd_uncore_ctx_init(struct amd_uncore *uncore, unsigned int cpu) argument
505 amd_uncore_ctx_move(struct amd_uncore *uncore, unsigned int cpu) argument
539 struct amd_uncore *uncore; local
552 struct amd_uncore *uncore; local
566 struct amd_uncore *uncore; local
579 struct amd_uncore *uncore; local
631 amd_uncore_df_ctx_scan(struct amd_uncore *uncore, unsigned int cpu) argument
653 amd_uncore_df_ctx_init(struct amd_uncore *uncore, unsigned int cpu) argument
765 amd_uncore_l3_ctx_scan(struct amd_uncore *uncore, unsigned int cpu) argument
784 amd_uncore_l3_ctx_init(struct amd_uncore *uncore, unsigned int cpu) argument
884 amd_uncore_umc_ctx_scan(struct amd_uncore *uncore, unsigned int cpu) argument
902 amd_uncore_umc_ctx_init(struct amd_uncore *uncore, unsigned int cpu) argument
1011 struct amd_uncore *uncore; local
1082 struct amd_uncore *uncore; local
[all...]
/linux-master/drivers/gpu/drm/i915/display/
H A Dintel_de.h16 return intel_uncore_read(&i915->uncore, reg);
22 return intel_uncore_read8(&i915->uncore, reg);
29 return intel_uncore_read64_2x32(&i915->uncore, lower_reg, upper_reg);
35 intel_uncore_posting_read(&i915->uncore, reg);
41 intel_uncore_write(&i915->uncore, reg, val);
47 return intel_uncore_rmw(&i915->uncore, reg, clear, set);
54 return intel_wait_for_register(&i915->uncore, reg, mask, value, timeout);
61 return intel_wait_for_register_fw(&i915->uncore, reg, mask, value, timeout);
70 return __intel_wait_for_register(&i915->uncore, reg, mask, value,
93 * therefore generally be serialised, by either the dev_priv->uncore
[all...]
/linux-master/drivers/gpu/drm/i915/gt/uc/
H A Dintel_guc_fw.c22 struct intel_uncore *uncore = gt->uncore; local
29 if (GRAPHICS_VER_FULL(uncore->i915) < IP_VER(12, 50))
34 intel_uncore_write(uncore, GUC_SHIM_CONTROL, shim_flags);
36 if (IS_GEN9_LP(uncore->i915))
37 intel_uncore_write(uncore, GEN9LP_GT_PM_CONFIG, GT_DOORBELL_ENABLE);
39 intel_uncore_write(uncore, GEN9_GT_PM_CONFIG, GT_DOORBELL_ENABLE);
41 if (GRAPHICS_VER(uncore->i915) == 9) {
43 intel_uncore_rmw(uncore, GEN7_MISCCPCTL, 0,
47 intel_uncore_write(uncore, GUC_ARAT_C6DI
51 guc_xfer_rsa_mmio(struct intel_uc_fw *guc_fw, struct intel_uncore *uncore) argument
68 guc_xfer_rsa_vma(struct intel_uc_fw *guc_fw, struct intel_uncore *uncore) argument
80 guc_xfer_rsa(struct intel_uc_fw *guc_fw, struct intel_uncore *uncore) argument
97 guc_load_done(struct intel_uncore *uncore, u32 *status, bool *success) argument
156 struct intel_uncore *uncore = gt->uncore; local
283 struct intel_uncore *uncore = gt->uncore; local
[all...]
/linux-master/arch/x86/events/intel/
H A DMakefile5 obj-$(CONFIG_PERF_EVENTS_INTEL_UNCORE) += intel-uncore.o
6 intel-uncore-objs := uncore.o uncore_nhmex.o uncore_snb.o uncore_snbep.o uncore_discovery.o

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