Searched refs:ulClock (Results 1 - 10 of 10) sorted by relevance

/linux-master/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dppatomctrl.c224 engine_clock_parameters.sReserved.ulClock =
295 mpll_parameters.ulClock = cpu_to_le32(clock_value);
344 mpll_parameters.ulClock.ulClock = cpu_to_le32(clock_value);
352 (uint32_t)mpll_parameters.ulClock.ucPostDiv;
365 mpll_parameters.ulClock.ulClock = cpu_to_le32(clock_value);
379 mpll_param->ulClock =
380 le32_to_cpu(mpll_parameters.ulClock.ulClock);
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H A Dppatomfwctrl.h61 uint32_t ulClock; /* the actual clock */ member in struct:pp_atomfwctrl_clock_dividers_soc15
H A Dppatomctrl.h141 uint32_t ulClock; member in struct:pp_atomctrl_memory_clock_param_ai
H A Dppatomfwctrl.c266 dividers->ulClock = le32_to_cpu(pll_output->gpuclock_10khz);
/linux-master/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_atombios.c1059 args.v4.ulClock = cpu_to_le32(clock); /* 10 khz */
1065 dividers->real_clock = le32_to_cpu(args.v4.ulClock);
1070 args.v6_in.ulClock.ulComputeClockFlag = clock_type;
1071 args.v6_in.ulClock.ulClockFreq = cpu_to_le32(clock); /* 10 khz */
1081 dividers->real_clock = le32_to_cpu(args.v6_out.ulClock.ulClock);
1082 dividers->post_divider = args.v6_out.ulClock.ucPostDiv;
1111 args.ulClock = cpu_to_le32(clock); /* 10 khz */
1157 args.sReserved.ulClock = cpu_to_le32(mem_clock & SET_CLOCK_FREQ_MASK);
/linux-master/drivers/gpu/drm/radeon/
H A Dradeon_atombios.c2857 args.v1.ulClock = cpu_to_le32(clock); /* 10 khz */
2871 args.v2.ulClock = cpu_to_le32(clock); /* 10 khz */
2879 dividers->enable_post_div = (le32_to_cpu(args.v2.ulClock) & (1 << 24)) ?
2881 dividers->vco_mode = (le32_to_cpu(args.v2.ulClock) & (1 << 25)) ? 1 : 0;
2925 args.v4.ulClock = cpu_to_le32(clock); /* 10 khz */
2930 dividers->real_clock = le32_to_cpu(args.v4.ulClock);
2935 args.v6_in.ulClock.ulComputeClockFlag = clock_type;
2936 args.v6_in.ulClock.ulClockFreq = cpu_to_le32(clock); /* 10 khz */
2945 dividers->real_clock = le32_to_cpu(args.v6_out.ulClock.ulClock);
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H A Datombios.h410 ULONG ulClock; //When returen, it's the re-calculated clock based on given Fb_div Post_Div and ref_div member in struct:_COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS
419 ULONG ulClock; //When return, [23:0] return real clock member in struct:_COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_V2
462 ATOM_COMPUTE_CLOCK_FREQ ulClock; //Input Parameter member in union:_COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_V3::__anon33
484 ULONG ulClock:24; //Input= target clock, output = actual clock member in struct:_COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_V4
486 ULONG ulClock:24; //Input= target clock, output = actual clock
495 ATOM_COMPUTE_CLOCK_FREQ ulClock; //Input Parameter member in union:_COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_V5::__anon34
512 ATOM_COMPUTE_CLOCK_FREQ ulClock; //Input Parameter member in struct:_COMPUTE_GPU_CLOCK_INPUT_PARAMETERS_V1_6
523 COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_V4 ulClock; //Output Parameter: ucPostDiv=DFS divider member in struct:_COMPUTE_GPU_CLOCK_OUTPUT_PARAMETERS_V1_6
543 ULONG ulClock; member in union:_COMPUTE_MEMORY_CLOCK_PARAM_PARAMETERS_V2_1::__anon36
568 ATOM_COMPUTE_CLOCK_FREQ ulClock; member in struct:_DYNAMICE_MEMORY_SETTINGS_PARAMETER
574 ATOM_COMPUTE_CLOCK_FREQ ulClock; member in struct:_DYNAMICE_ENGINE_SETTINGS_PARAMETER
[all...]
/linux-master/drivers/gpu/drm/amd/include/
H A Datombios.h440 ULONG ulClock; //When returen, it's the re-calculated clock based on given Fb_div Post_Div and ref_div member in struct:_COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS
449 ULONG ulClock; //When return, [23:0] return real clock member in struct:_COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_V2
496 ATOM_COMPUTE_CLOCK_FREQ ulClock; //Input Parameter member in union:_COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_V3::__anon485
518 ULONG ulClock:24; //Input= target clock, output = actual clock member in struct:_COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_V4
520 ULONG ulClock:24; //Input= target clock, output = actual clock
529 ATOM_COMPUTE_CLOCK_FREQ ulClock; //Input Parameter member in union:_COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_V5::__anon486
546 ATOM_COMPUTE_CLOCK_FREQ ulClock; //Input Parameter member in struct:_COMPUTE_GPU_CLOCK_INPUT_PARAMETERS_V1_6
558 COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_V4 ulClock; //Output Parameter: ucPostDiv=DFS divider member in struct:_COMPUTE_GPU_CLOCK_OUTPUT_PARAMETERS_V1_6
571 ATOM_COMPUTE_CLOCK_FREQ ulClock; //Input Parameter member in struct:_COMPUTE_GPU_CLOCK_INPUT_PARAMETERS_V1_7
582 COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_V4 ulClock; //Outpu member in struct:_COMPUTE_GPU_CLOCK_OUTPUT_PARAMETERS_V1_7
605 ULONG ulClock; member in union:_COMPUTE_MEMORY_CLOCK_PARAM_PARAMETERS_V2_1::__anon488
631 COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_V4 ulClock; member in struct:_COMPUTE_MEMORY_CLOCK_PARAM_PARAMETERS_V2_2
637 COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_V4 ulClock; member in struct:_COMPUTE_MEMORY_CLOCK_PARAM_PARAMETERS_V2_3
646 ATOM_COMPUTE_CLOCK_FREQ ulClock; member in struct:_DYNAMICE_MEMORY_SETTINGS_PARAMETER
654 ATOM_COMPUTE_CLOCK_FREQ ulClock; member in struct:_DYNAMICE_ENGINE_SETTINGS_PARAMETER
663 ATOM_COMPUTE_CLOCK_FREQ ulClock; member in struct:_DYNAMICE_MC_DPM_SETTINGS_PARAMETER
[all...]
/linux-master/drivers/media/dvb-frontends/
H A Ddrxd_hard.c2441 u32 ulClock = state->config.clock; local
2545 state->osc_clock_freq = (u16) ulClock;
/linux-master/drivers/gpu/drm/amd/pm/powerplay/smumgr/
H A Dvegam_smumgr.c973 mem_level->MclkFrequency = (uint32_t)mpll_param.ulClock;

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