Searched refs:tx_reg (Results 1 - 17 of 17) sorted by relevance

/linux-master/include/linux/
H A Dpch_dma.h20 dma_addr_t tx_reg; member in struct:pch_dma_slave
/linux-master/arch/mips/include/asm/txx9/
H A Ddmac.h33 * @tx_reg: physical address of data register used for
40 u64 tx_reg; member in struct:txx9dmac_slave
/linux-master/drivers/mailbox/
H A Dplatform_mhu.c36 void __iomem *tx_reg; member in struct:platform_mhu_link
67 u32 val = readl_relaxed(mlink->tx_reg + INTR_STAT_OFS);
77 writel_relaxed(*arg, mlink->tx_reg + INTR_SET_OFS);
88 val = readl_relaxed(mlink->tx_reg + INTR_STAT_OFS);
89 writel_relaxed(val, mlink->tx_reg + INTR_CLR_OFS);
142 mhu->mlink[i].tx_reg = mhu->mlink[i].rx_reg + TX_REG_OFFSET;
H A Darm_mhu.c30 void __iomem *tx_reg; member in struct:mhu_link
61 u32 val = readl_relaxed(mlink->tx_reg + INTR_STAT_OFS);
71 writel_relaxed(*arg, mlink->tx_reg + INTR_SET_OFS);
82 val = readl_relaxed(mlink->tx_reg + INTR_STAT_OFS);
83 writel_relaxed(val, mlink->tx_reg + INTR_CLR_OFS);
133 mhu->mlink[i].tx_reg = mhu->mlink[i].rx_reg + TX_REG_OFFSET;
H A Darm_mhu_db.c34 void __iomem *tx_reg; member in struct:mhu_db_link
140 void __iomem *base = chan_info->mhu->mlink[chan_info->pchan].tx_reg;
151 void __iomem *base = chan_info->mhu->mlink[chan_info->pchan].tx_reg;
315 mhu->mlink[i].tx_reg = mhu->mlink[i].rx_reg + TX_REG_OFFSET;
/linux-master/drivers/net/wireless/ath/ath5k/
H A Ddma.c355 u16 tx_reg; local
366 tx_reg = AR5K_NOQCU_TXDP0;
370 tx_reg = AR5K_NOQCU_TXDP1;
376 tx_reg = AR5K_QUEUE_TXDP(queue);
379 return ath5k_hw_reg_read(ah, tx_reg);
398 u16 tx_reg; local
409 tx_reg = AR5K_NOQCU_TXDP0;
413 tx_reg = AR5K_NOQCU_TXDP1;
427 tx_reg = AR5K_QUEUE_TXDP(queue);
431 ath5k_hw_reg_write(ah, phys_addr, tx_reg);
[all...]
/linux-master/drivers/spi/
H A Dspi-orion.c385 void __iomem *tx_reg, *rx_reg, *int_reg; local
396 tx_reg = spi_reg(orion_spi, ORION_SPI_DATA_OUT_REG);
404 writel(*(*tx_buf)++, tx_reg);
406 writel(0, tx_reg);
434 void __iomem *tx_reg, *rx_reg, *int_reg; local
443 tx_reg = spi_reg(orion_spi, ORION_SPI_DATA_OUT_REG);
451 writel(__cpu_to_le16(get_unaligned((*tx_buf)++)), tx_reg);
453 writel(0, tx_reg);
H A Dspi-omap2-mcspi.c695 void __iomem *tx_reg; local
708 tx_reg = base + OMAP2_MCSPI_TX0;
732 writel_relaxed(*tx++, tx_reg);
781 writel_relaxed(*tx++, tx_reg);
830 writel_relaxed(*tx++, tx_reg);
H A Dspi-topcliff-pch.c845 param->tx_reg = data->io_base_addr + PCH_SPDWR;
/linux-master/drivers/media/rc/
H A Dene_ir.h209 int tx_reg; /* current reg used for TX */ member in struct:ene_device
H A Dene_ir.c653 dev->tx_reg ? ENE_CIRRLC_OUT1 : ENE_CIRRLC_OUT0, raw_tx);
655 dev->tx_reg = !dev->tx_reg;
964 dev->tx_reg = 0;
/linux-master/drivers/dma/
H A Dtxx9dmac.c351 if (ds->tx_reg) {
372 if (ds->tx_reg) {
818 if (ds->tx_reg)
843 desc->hwdesc.DAR = ds->tx_reg;
852 desc->hwdesc32.DAR = ds->tx_reg;
1011 (ds->tx_reg && ds->rx_reg) || (!ds->tx_reg && !ds->rx_reg))
H A Dpch_dma.c588 reg = pd_slave->tx_reg;
/linux-master/drivers/net/phy/
H A Dmotorcomm.c795 u32 rx_reg, tx_reg; local
803 tx_reg = ytphy_get_delay_reg_value(phydev, "tx-internal-delay-ps",
816 val |= FIELD_PREP(YT8521_RC1R_GE_TX_DELAY_MASK, tx_reg);
820 FIELD_PREP(YT8521_RC1R_GE_TX_DELAY_MASK, tx_reg);
/linux-master/drivers/slimbus/
H A Dqcom-ctrl.c121 u8 len, u32 tx_reg)
125 __iowrite32_copy(ctrl->base + tx_reg, buf, count);
120 qcom_slim_queue_tx(struct qcom_slim_ctrl *ctrl, void *buf, u8 len, u32 tx_reg) argument
/linux-master/drivers/net/ethernet/intel/i40e/
H A Di40e_main.c4680 u32 tx_reg; local
4683 tx_reg = rd32(&pf->hw, I40E_QTX_ENA(pf_q));
4684 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
4708 u32 tx_reg; local
4717 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
4718 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) ==
4719 ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1))
4725 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
4731 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK;
4733 tx_reg
[all...]
/linux-master/drivers/tty/serial/
H A Dpch_uart.c687 param->tx_reg = port->mapbase + UART_TX;

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