Searched refs:tx_en (Results 1 - 25 of 34) sorted by relevance

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/linux-master/drivers/net/ethernet/hisilicon/hns/
H A Dhns_dsaf_mac.h371 void (*mac_pausefrm_cfg)(void *mac_drv, u32 rx_en, u32 tx_en);
374 int (*set_pause_enable)(void *mac_drv, u32 rx_en, u32 tx_en);
375 void (*get_pause_enable)(void *mac_drv, u32 *rx_en, u32 *tx_en);
438 void hns_mac_get_pauseparam(struct hns_mac_cb *mac_cb, u32 *rx_en, u32 *tx_en);
440 int hns_mac_set_pauseparam(struct hns_mac_cb *mac_cb, u32 rx_en, u32 tx_en);
H A Dhns_dsaf_mac.c592 * @tx_en: tx enable status
595 void hns_mac_get_pauseparam(struct hns_mac_cb *mac_cb, u32 *rx_en, u32 *tx_en) argument
600 mac_ctrl_drv->get_pause_enable(mac_ctrl_drv, rx_en, tx_en);
603 *tx_en = 0;
632 * @tx_en: tx enable or not
635 int hns_mac_set_pauseparam(struct hns_mac_cb *mac_cb, u32 rx_en, u32 tx_en) argument
641 if (is_ver1 && (tx_en || rx_en)) {
648 mac_ctrl_drv->mac_pausefrm_cfg(mac_ctrl_drv, rx_en, tx_en);
H A Dhns_ae_adapt.c473 u32 *auto_neg, u32 *rx_en, u32 *tx_en)
480 hns_mac_get_pauseparam(mac_cb, rx_en, tx_en);
496 u32 autoneg, u32 rx_en, u32 tx_en)
514 return hns_mac_set_pauseparam(mac_cb, rx_en, tx_en);
472 hns_ae_get_pauseparam(struct hnae_handle *handle, u32 *auto_neg, u32 *rx_en, u32 *tx_en) argument
495 hns_ae_set_pauseparam(struct hnae_handle *handle, u32 autoneg, u32 rx_en, u32 tx_en) argument
H A Dhns_dsaf_xgmac.c246 *@tx_en: enable transmit
248 static void hns_xgmac_pausefrm_cfg(void *mac_drv, u32 rx_en, u32 tx_en) argument
253 dsaf_set_bit(origin, XGMAC_PAUSE_CTL_TX_B, !!tx_en);
454 *@tx_en:xgmac tx pause enable
456 static void hns_xgmac_get_pausefrm_cfg(void *mac_drv, u32 *rx_en, u32 *tx_en) argument
463 *tx_en = dsaf_get_bit(pause_ctrl, XGMAC_PAUSE_CTL_TX_B);
H A Dhnae.h485 u32 *auto_neg, u32 *rx_en, u32 *tx_en);
487 u32 auto_neg, u32 rx_en, u32 tx_en);
/linux-master/drivers/net/ethernet/chelsio/cxgb4vf/
H A Dt4vf_common.h396 bool tx_en);
398 bool tx_en);
H A Dt4vf_hw.c1391 * @tx_en: 1=enable Tx, 0=disable Tx
1396 bool rx_en, bool tx_en)
1406 FW_VI_ENABLE_CMD_EEN_V(tx_en) |
1416 * @tx_en: 1=enable Tx, 0=disable Tx
1424 bool rx_en, bool tx_en)
1426 int ret = t4vf_enable_vi(adapter, pi->viid, rx_en, tx_en);
1431 rx_en && tx_en && pi->link_cfg.link_ok);
1395 t4vf_enable_vi(struct adapter *adapter, unsigned int viid, bool rx_en, bool tx_en) argument
1423 t4vf_enable_pi(struct adapter *adapter, struct port_info *pi, bool rx_en, bool tx_en) argument
/linux-master/drivers/net/wireless/realtek/rtw89/
H A Dpci_be.c132 enum mac_ax_pcie_func_ctrl tx_en,
140 if (tx_en == MAC_AX_PCIE_ENABLE)
142 else if (tx_en == MAC_AX_PCIE_DISABLE)
131 rtw89_pci_ctrl_trxdma_pcie_be(struct rtw89_dev *rtwdev, enum mac_ax_pcie_func_ctrl tx_en, enum mac_ax_pcie_func_ctrl rx_en, enum mac_ax_pcie_func_ctrl io_en) argument
H A Dmac.h1174 u32 *tx_en, enum rtw89_sch_tx_sel sel);
1176 u32 *tx_en, enum rtw89_sch_tx_sel sel);
1178 u32 *tx_en, enum rtw89_sch_tx_sel sel);
1179 int rtw89_mac_resume_sch_tx(struct rtw89_dev *rtwdev, u8 mac_idx, u32 tx_en);
1180 int rtw89_mac_resume_sch_tx_v1(struct rtw89_dev *rtwdev, u8 mac_idx, u32 tx_en);
1181 int rtw89_mac_resume_sch_tx_v2(struct rtw89_dev *rtwdev, u8 mac_idx, u32 tx_en);
H A Dmac_be.c1915 u32 tx_en, u32 tx_en_mask)
1926 val = (val & ~tx_en_mask) | (tx_en & tx_en_mask);
1933 u32 *tx_en, enum rtw89_sch_tx_sel sel)
1937 *tx_en = rtw89_read32(rtwdev,
1973 int rtw89_mac_resume_sch_tx_v2(struct rtw89_dev *rtwdev, u8 mac_idx, u32 tx_en) argument
1977 ret = rtw89_set_hw_sch_tx_en_v2(rtwdev, mac_idx, tx_en,
1914 rtw89_set_hw_sch_tx_en_v2(struct rtw89_dev *rtwdev, u8 mac_idx, u32 tx_en, u32 tx_en_mask) argument
1932 rtw89_mac_stop_sch_tx_v2(struct rtw89_dev *rtwdev, u8 mac_idx, u32 *tx_en, enum rtw89_sch_tx_sel sel) argument
H A Drtw8852a_rfk.c3516 u32 tx_en; local
3545 rtw89_chip_stop_sch_tx(rtwdev, phy, &tx_en, RTW89_SCH_TX_SEL_ALL);
3591 rtw89_chip_resume_sch_tx(rtwdev, phy, tx_en);
3614 u32 tx_en; local
3618 rtw89_chip_stop_sch_tx(rtwdev, phy_idx, &tx_en, RTW89_SCH_TX_SEL_ALL);
3627 rtw89_chip_resume_sch_tx(rtwdev, phy_idx, tx_en);
3634 u32 tx_en; local
3638 rtw89_chip_stop_sch_tx(rtwdev, phy_idx, &tx_en, RTW89_SCH_TX_SEL_ALL);
3643 rtw89_chip_resume_sch_tx(rtwdev, phy_idx, tx_en);
3649 u32 tx_en; local
[all...]
H A Drtw8852b_rfk.c3769 u32 tx_en; local
3772 rtw89_chip_stop_sch_tx(rtwdev, phy_idx, &tx_en, RTW89_SCH_TX_SEL_ALL);
3778 rtw89_chip_resume_sch_tx(rtwdev, phy_idx, tx_en);
3785 u32 tx_en; local
3788 rtw89_chip_stop_sch_tx(rtwdev, phy_idx, &tx_en, RTW89_SCH_TX_SEL_ALL);
3793 rtw89_chip_resume_sch_tx(rtwdev, phy_idx, tx_en);
3800 u32 tx_en; local
3803 rtw89_chip_stop_sch_tx(rtwdev, phy_idx, &tx_en, RTW89_SCH_TX_SEL_ALL);
3810 rtw89_chip_resume_sch_tx(rtwdev, phy_idx, tx_en);
3822 u32 tx_en; local
[all...]
H A Dmac.c2978 u16 tx_en, u16 tx_en_mask)
2990 tx_en, tx_en_mask);
2993 val = (val & ~tx_en_mask) | (tx_en & tx_en_mask);
3000 u32 tx_en, u32 tx_en_mask)
3011 val = (val & ~tx_en_mask) | (tx_en & tx_en_mask);
3018 u32 *tx_en, enum rtw89_sch_tx_sel sel)
3022 *tx_en = rtw89_read16(rtwdev,
3059 u32 *tx_en, enum rtw89_sch_tx_sel sel)
3063 *tx_en = rtw89_read32(rtwdev,
3099 int rtw89_mac_resume_sch_tx(struct rtw89_dev *rtwdev, u8 mac_idx, u32 tx_en) argument
2977 rtw89_set_hw_sch_tx_en(struct rtw89_dev *rtwdev, u8 mac_idx, u16 tx_en, u16 tx_en_mask) argument
2999 rtw89_set_hw_sch_tx_en_v1(struct rtw89_dev *rtwdev, u8 mac_idx, u32 tx_en, u32 tx_en_mask) argument
3017 rtw89_mac_stop_sch_tx(struct rtw89_dev *rtwdev, u8 mac_idx, u32 *tx_en, enum rtw89_sch_tx_sel sel) argument
3058 rtw89_mac_stop_sch_tx_v1(struct rtw89_dev *rtwdev, u8 mac_idx, u32 *tx_en, enum rtw89_sch_tx_sel sel) argument
3111 rtw89_mac_resume_sch_tx_v1(struct rtw89_dev *rtwdev, u8 mac_idx, u32 tx_en) argument
3297 u32 tx_en; local
[all...]
H A Drtw8922a.c1877 enum rtw89_band band, u32 *tx_en, bool enter)
1880 rtw89_chip_stop_sch_tx(rtwdev, mac_idx, tx_en, RTW89_SCH_TX_SEL_ALL);
1893 rtw89_chip_resume_sch_tx(rtwdev, mac_idx, *tx_en);
1908 rtw8922a_hal_reset(rtwdev, phy_idx, mac_idx, chan->band_type, &p->tx_en, enter);
1956 u32 tx_en; local
1959 rtw89_chip_stop_sch_tx(rtwdev, phy_idx, &tx_en, RTW89_SCH_TX_SEL_ALL);
1969 rtw89_chip_resume_sch_tx(rtwdev, phy_idx, tx_en);
1875 rtw8922a_hal_reset(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx, enum rtw89_mac_idx mac_idx, enum rtw89_band band, u32 *tx_en, bool enter) argument
H A Drtw8851b_rfk.c3261 u32 tx_en; local
3264 rtw89_chip_stop_sch_tx(rtwdev, phy_idx, &tx_en, RTW89_SCH_TX_SEL_ALL);
3270 rtw89_chip_resume_sch_tx(rtwdev, phy_idx, tx_en);
3277 u32 tx_en; local
3280 rtw89_chip_stop_sch_tx(rtwdev, phy_idx, &tx_en, RTW89_SCH_TX_SEL_ALL);
3285 rtw89_chip_resume_sch_tx(rtwdev, phy_idx, tx_en);
3292 u32 tx_en; local
3295 rtw89_chip_stop_sch_tx(rtwdev, phy_idx, &tx_en, RTW89_SCH_TX_SEL_ALL);
3302 rtw89_chip_resume_sch_tx(rtwdev, phy_idx, tx_en);
H A Drtw8852c_rfk.c4140 u32 tx_en; local
4144 rtw89_chip_stop_sch_tx(rtwdev, phy_idx, &tx_en, RTW89_SCH_TX_SEL_ALL);
4150 rtw89_chip_resume_sch_tx(rtwdev, phy_idx, tx_en);
4225 u32 tx_en; local
4252 rtw89_chip_stop_sch_tx(rtwdev, phy_idx, &tx_en, RTW89_SCH_TX_SEL_ALL);
4264 rtw89_chip_resume_sch_tx(rtwdev, phy_idx, tx_en);
4278 u32 tx_en; local
4282 rtw89_chip_stop_sch_tx(rtwdev, phy_idx, &tx_en, RTW89_SCH_TX_SEL_ALL);
4287 rtw89_chip_resume_sch_tx(rtwdev, phy_idx, tx_en);
H A Dcore.h937 u32 tx_en; member in struct:rtw89_channel_help_params
3288 u32 *tx_en, enum rtw89_sch_tx_sel sel);
3289 int (*resume_sch_tx)(struct rtw89_dev *rtwdev, u8 mac_idx, u32 tx_en);
5959 u32 *tx_en, enum rtw89_sch_tx_sel sel)
5963 return chip->ops->stop_sch_tx(rtwdev, mac_idx, tx_en, sel);
5967 int rtw89_chip_resume_sch_tx(struct rtw89_dev *rtwdev, u8 mac_idx, u32 tx_en) argument
5971 return chip->ops->resume_sch_tx(rtwdev, mac_idx, tx_en);
5958 rtw89_chip_stop_sch_tx(struct rtw89_dev *rtwdev, u8 mac_idx, u32 *tx_en, enum rtw89_sch_tx_sel sel) argument
/linux-master/drivers/net/ethernet/hisilicon/hns3/hns3pf/
H A Dhclge_tm.c1558 bool tx_en, rx_en; local
1562 tx_en = false;
1566 tx_en = false;
1570 tx_en = true;
1574 tx_en = true;
1578 tx_en = false;
1582 tx_en = true;
1586 return hclge_mac_pause_en_cfg(hdev, tx_en, rx_en);
H A Dhclge_main.c3120 bool rx_en, tx_en; local
3125 tx_en = false;
3129 tx_en = true;
3133 tx_en = true;
3137 tx_en = false;
3141 linkmode_set_pause(mac->advertising, tx_en, rx_en);
10842 static void hclge_set_flowctrl_adv(struct hclge_dev *hdev, u32 rx_en, u32 tx_en) argument
10849 phy_set_asym_pause(phydev, rx_en, tx_en);
10852 static int hclge_cfg_pauseparam(struct hclge_dev *hdev, u32 rx_en, u32 tx_en) argument
10859 ret = hclge_mac_pause_en_cfg(hdev, tx_en, rx_e
10902 hclge_get_pauseparam(struct hnae3_handle *handle, u32 *auto_neg, u32 *rx_en, u32 *tx_en) argument
10933 hclge_record_user_pauseparam(struct hclge_dev *hdev, u32 rx_en, u32 tx_en) argument
10948 hclge_set_pauseparam(struct hnae3_handle *handle, u32 auto_neg, u32 rx_en, u32 tx_en) argument
[all...]
/linux-master/arch/mips/include/asm/octeon/
H A Dcvmx-agl-defs.h301 uint64_t tx_en:1; member in struct:cvmx_agl_gmx_prtx_cfg::cvmx_agl_gmx_prtx_cfg_s
313 uint64_t tx_en:1;
326 uint64_t tx_en:1; member in struct:cvmx_agl_gmx_prtx_cfg::cvmx_agl_gmx_prtx_cfg_cn52xx
338 uint64_t tx_en:1;
/linux-master/drivers/net/ethernet/ti/
H A Dcpsw_priv.c38 writel_relaxed(0xFF, &cpsw->wr_regs->tx_en);
46 writel_relaxed(0, &cpsw->wr_regs->tx_en);
90 writel(0, &cpsw->wr_regs->tx_en);
156 writel(0xff, &cpsw->wr_regs->tx_en);
170 writel(0xff, &cpsw->wr_regs->tx_en);
H A Dcpsw_priv.h150 u32 tx_en; member in struct:cpsw_wr_regs
/linux-master/drivers/net/ethernet/hisilicon/hns3/
H A Dhnae3.h625 u32 *auto_neg, u32 *rx_en, u32 *tx_en);
627 u32 auto_neg, u32 rx_en, u32 tx_en);
/linux-master/drivers/net/ethernet/chelsio/cxgb4/
H A Dcxgb4.h2027 unsigned int viid, bool rx_en, bool tx_en, bool dcb_en);
2030 bool rx_en, bool tx_en, bool dcb_en);
2032 bool rx_en, bool tx_en);
/linux-master/drivers/net/ethernet/cavium/thunder/
H A Dthunder_bgx.c509 bool tx_en, rx_en; local
512 tx_en = cmr_cfg & CMR_PKT_TX_EN;
584 cmr_cfg |= (rx_en ? CMR_PKT_RX_EN : 0) | (tx_en ? CMR_PKT_TX_EN : 0);

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