Searched refs:socclk_mhz (Results 1 - 25 of 35) sorted by relevance

12

/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn301/
H A Ddcn301_fpu.c118 .socclk_mhz = 278.0,
130 .socclk_mhz = 278.0,
142 .socclk_mhz = 278.0,
154 .socclk_mhz = 715.0,
166 .socclk_mhz = 953.0,
305 pipes[0].clks_cfg.socclk_mhz = dml->soc.clock_limits[vlevel].socclk_mhz;
353 s[i].socclk_mhz = clk_table->entries[i].socclk_mhz;
/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn351/
H A Ddcn351_fpu.c103 .socclk_mhz = 600.0,
116 .socclk_mhz = 733.0,
129 .socclk_mhz = 880.0,
142 .socclk_mhz = 978.0,
155 .socclk_mhz = 1100.0,
168 .socclk_mhz = 1257.0,
181 .socclk_mhz = 1257.0,
194 .socclk_mhz = 1467.0,
318 clock_limits[i].socclk_mhz =
319 clk_table->entries[i].socclk_mhz;
[all...]
/linux-master/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_socbb.h30 uint32_t socclk_mhz; member in struct:gpu_info_voltage_scaling_v1_0
/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn302/
H A Ddcn302_fpu.c323 if (!bw_params->clk_table.entries[i].socclk_mhz && i > 0)
324 dcn3_02_soc.clock_limits[i].socclk_mhz = dcn3_02_soc.clock_limits[i-1].socclk_mhz;
326 dcn3_02_soc.clock_limits[i].socclk_mhz = bw_params->clk_table.entries[i].socclk_mhz;
/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn303/
H A Ddcn303_fpu.c329 if (!bw_params->clk_table.entries[i].socclk_mhz && i > 0)
330 dcn3_03_soc.clock_limits[i].socclk_mhz = dcn3_03_soc.clock_limits[i-1].socclk_mhz;
332 dcn3_03_soc.clock_limits[i].socclk_mhz = bw_params->clk_table.entries[i].socclk_mhz;
/linux-master/drivers/gpu/drm/amd/display/dc/dml2/
H A Ddml2_policy.c128 unsigned int min_socclk_mhz = p->in_states->state_array[0].socclk_mhz;
141 if (p->in_states->state_array[i].socclk_mhz > max_socclk_mhz)
142 max_socclk_mhz = (int) p->in_states->state_array[i].socclk_mhz;
182 s->entry.socclk_mhz = max_socclk_mhz;
193 s->entry.socclk_mhz = min_socclk_mhz;
195 s->entry.socclk_mhz = max_socclk_mhz;
H A Ddml2_wrapper.h130 unsigned int socclk_mhz; member in struct:dml2_clks_table_entry
H A Ddml2_translation_helper.c270 p->in_states->state_array[0].socclk_mhz = 620.0;
297 p->in_states->state_array[1].socclk_mhz = 1200.0;
306 p->in_states->state_array[0].socclk_mhz = 582.0;
333 p->in_states->state_array[1].socclk_mhz = 1200.0;
416 p->in_states->state_array[i].socclk_mhz =
417 dml2->config.bbox_overrides.clks_table.clk_entries[i].socclk_mhz;
559 out->state_array[i].socclk_mhz = dc->dml.soc.clock_limits[i].socclk_mhz;
/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn20/
H A Ddcn20_fpu.c231 .socclk_mhz = 560.0,
242 .socclk_mhz = 694.0,
253 .socclk_mhz = 875.0,
264 .socclk_mhz = 1000.0,
275 .socclk_mhz = 1200.0,
287 .socclk_mhz = 1200.0,
342 .socclk_mhz = 560.0,
353 .socclk_mhz = 694.0,
364 .socclk_mhz = 875.0,
375 .socclk_mhz
[all...]
/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn321/
H A Ddcn321_fpu.c116 .socclk_mhz = 1200.0,
332 if (max_clk_limit->socclk_mhz != 0)
333 curr_clk_limit->socclk_mhz = max_clk_limit->socclk_mhz;
829 if (!bw_params->clk_table.entries[i].socclk_mhz && i > 0)
830 dcn3_21_soc.clock_limits[i].socclk_mhz = dcn3_21_soc.clock_limits[i-1].socclk_mhz;
832 dcn3_21_soc.clock_limits[i].socclk_mhz = bw_params->clk_table.entries[i].socclk_mhz;
900 if (dc->clk_mgr->bw_params->clk_table.entries[i].socclk_mhz)
[all...]
/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn31/
H A Ddcn31_fpu.c507 pipes[0].clks_cfg.socclk_mhz = context->bw_ctx.dml.soc.clock_limits[vlevel].socclk_mhz;
623 s[i].socclk_mhz = clk_table->entries[i].socclk_mhz;
691 dcn3_15_soc.clock_limits[i].socclk_mhz = clk_table->entries[i].socclk_mhz;
775 s[i].socclk_mhz = clk_table->entries[i].socclk_mhz;
/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn35/
H A Ddcn35_fpu.c283 clock_limits[i].socclk_mhz =
284 clk_table->entries[i].socclk_mhz;
366 dc->dml2_options.bbox_overrides.clks_table.clk_entries[i].socclk_mhz =
367 clock_limits[i].socclk_mhz;
/linux-master/drivers/gpu/drm/amd/display/dc/dml/
H A Ddisplay_mode_structs.h160 double socclk_mhz; member in struct:_vcs_dpi_voltage_scaling_st
553 double socclk_mhz; member in struct:_vcs_dpi_display_clocks_and_cfg_st
H A Ddisplay_mode_lib.c282 dml_print("DML PARAMS: socclk_mhz = %3.2f\n", clks_cfg->socclk_mhz);
/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/
H A Ddcn314_clk_mgr.c676 bw_params->clk_table.entries[i].socclk_mhz = clock_table->SocClocks[i];
692 bw_params->clk_table.entries[i].socclk_mhz = find_max_clk_value(clock_table->SocClocks, NUM_SOCCLK_DPM_LEVELS);
702 bw_params->clk_table.entries[i].socclk_mhz = find_max_clk_value(clock_table->SocClocks, NUM_SOCCLK_DPM_LEVELS);
722 if (!bw_params->clk_table.entries[i].socclk_mhz)
723 bw_params->clk_table.entries[i].socclk_mhz = def_max.socclk_mhz;
/linux-master/drivers/gpu/drm/amd/display/dc/resource/dcn201/
H A Ddcn201_resource.c149 .socclk_mhz = 1254.0,
160 .socclk_mhz = 1254.0,
171 .socclk_mhz = 1254.0,
182 .socclk_mhz = 1254.0,
193 .socclk_mhz = 1254.0,
/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/
H A Drn_clk_mgr.c583 .socclk_mhz = 0,
590 .socclk_mhz = 0,
597 .socclk_mhz = 0,
604 .socclk_mhz = 0,
669 bw_params->clk_table.entries[i].socclk_mhz = find_socclk_for_voltage(clock_table,
/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/
H A Ddcn315_clk_mgr.c515 bw_params->clk_table.entries[i].socclk_mhz = clock_table->SocClocks[i];
531 bw_params->clk_table.entries[i-1].socclk_mhz = clock_table->SocClocks[clock_table->NumSocClkLevelsEnabled - 1];
548 if (!bw_params->clk_table.entries[i].socclk_mhz)
549 bw_params->clk_table.entries[i].socclk_mhz = def_max.socclk_mhz;
/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/
H A Ddcn35_clk_mgr.c783 bw_params->clk_table.entries[i].socclk_mhz = clock_table->SocClocks[i];
803 bw_params->clk_table.entries[i].socclk_mhz =
814 bw_params->clk_table.entries[i].socclk_mhz =
845 if (!bw_params->clk_table.entries[i].socclk_mhz)
846 bw_params->clk_table.entries[i].socclk_mhz = def_max.socclk_mhz;
/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn314/
H A Ddcn314_fpu.c238 clock_limits[i].socclk_mhz = clk_table->entries[i].socclk_mhz;
/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn30/
H A Ddcn30_fpu.c426 pipes[0].clks_cfg.socclk_mhz = context->bw_ctx.dml.soc.clock_limits[vlevel].socclk_mhz;
666 dcn3_0_soc.clock_limits[i].socclk_mhz = dcn3_0_soc.clock_limits[0].socclk_mhz;
/linux-master/drivers/gpu/drm/amd/display/dc/inc/hw/
H A Dclk_mgr.h110 unsigned int socclk_mhz; member in struct:clk_limit_table_entry
/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/
H A Dvg_clk_mgr.c500 .socclk_mhz = 0,
507 .socclk_mhz = 0,
514 .socclk_mhz = 0,
521 .socclk_mhz = 0,
/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn32/
H A Ddcn32_fpu.c137 .socclk_mhz = 1200.0,
505 pipes[0].clks_cfg.socclk_mhz = socclk;
2391 pipes[0].clks_cfg.socclk_mhz = context->bw_ctx.dml.soc.clock_limits[vlevel_temp].socclk_mhz;
2426 pipes[0].clks_cfg.socclk_mhz = context->bw_ctx.dml.soc.clock_limits[vlevel_temp].socclk_mhz;
2456 pipes[0].clks_cfg.socclk_mhz = context->bw_ctx.dml.soc.clock_limits[vlevel].socclk_mhz;
2744 if (max_clk_limit->socclk_mhz != 0)
2745 curr_clk_limit->socclk_mhz
[all...]
/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/
H A Ddcn30_clk_mgr.c144 &clk_mgr_base->bw_params->clk_table.entries[0].socclk_mhz,

Completed in 219 milliseconds

12