Searched refs:set_wptr (Results 1 - 25 of 47) sorted by relevance
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| /linux-master/drivers/gpu/drm/radeon/ |
| H A D | radeon_asic.c | 194 .set_wptr = &r100_gfx_set_wptr,
344 .set_wptr = &r100_gfx_set_wptr,
358 .set_wptr = &r100_gfx_set_wptr,
915 .set_wptr = &r600_gfx_set_wptr,
928 .set_wptr = &r600_dma_set_wptr,
1013 .set_wptr = &uvd_v1_0_set_wptr,
1212 .set_wptr = &uvd_v1_0_set_wptr,
1319 .set_wptr = &r600_gfx_set_wptr,
1332 .set_wptr = &r600_dma_set_wptr,
1629 .set_wptr
[all...] |
| /linux-master/drivers/gpu/drm/amd/amdgpu/ |
| H A D | amdgpu_ring.h | 177 void (*set_wptr)(struct amdgpu_ring *ring); member in struct:amdgpu_ring_funcs
316 #define amdgpu_ring_set_wptr(r) (r)->funcs->set_wptr((r))
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| H A D | jpeg_v2_5.c | 662 .set_wptr = jpeg_v2_5_dec_ring_set_wptr,
691 .set_wptr = jpeg_v2_5_dec_ring_set_wptr,
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| H A D | uvd_v6_0.c | 1557 .set_wptr = uvd_v6_0_ring_set_wptr,
1583 .set_wptr = uvd_v6_0_ring_set_wptr,
1612 .set_wptr = uvd_v6_0_enc_ring_set_wptr,
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| H A D | jpeg_v3_0.c | 567 .set_wptr = jpeg_v3_0_dec_ring_set_wptr,
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| H A D | vce_v2_0.c | 639 .set_wptr = vce_v2_0_ring_set_wptr,
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| H A D | jpeg_v5_0_0.c | 523 .set_wptr = jpeg_v5_0_0_dec_ring_set_wptr,
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| H A D | vce_v3_0.c | 926 .set_wptr = vce_v3_0_ring_set_wptr,
950 .set_wptr = vce_v3_0_ring_set_wptr,
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| H A D | jpeg_v1_0.c | 556 .set_wptr = jpeg_v1_0_decode_ring_set_wptr,
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| H A D | jpeg_v2_0.c | 769 .set_wptr = jpeg_v2_0_dec_ring_set_wptr,
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| H A D | uvd_v3_1.c | 186 .set_wptr = uvd_v3_1_ring_set_wptr,
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| H A D | uvd_v5_0.c | 889 .set_wptr = uvd_v5_0_ring_set_wptr,
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| H A D | uvd_v4_2.c | 781 .set_wptr = uvd_v4_2_ring_set_wptr,
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| H A D | jpeg_v4_0.c | 729 .set_wptr = jpeg_v4_0_dec_ring_set_wptr,
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| H A D | jpeg_v4_0_5.c | 772 .set_wptr = jpeg_v4_0_5_dec_ring_set_wptr,
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| H A D | vcn_v3_0.c | 1747 .set_wptr = vcn_v3_0_dec_ring_set_wptr,
1907 .set_wptr = vcn_v3_0_dec_ring_set_wptr,
2007 .set_wptr = vcn_v3_0_enc_ring_set_wptr,
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| H A D | uvd_v7_0.c | 1813 .set_wptr = uvd_v7_0_ring_set_wptr,
1845 .set_wptr = uvd_v7_0_enc_ring_set_wptr,
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| H A D | vcn_v1_0.c | 1984 .set_wptr = vcn_v1_0_dec_ring_set_wptr,
2018 .set_wptr = vcn_v1_0_enc_ring_set_wptr,
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| H A D | vcn_v2_0.c | 2019 .set_wptr = vcn_v2_0_dec_ring_set_wptr,
2049 .set_wptr = vcn_v2_0_enc_ring_set_wptr,
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| H A D | sdma_v4_4_2.c | 1818 .set_wptr = sdma_v4_4_2_ring_set_wptr,
1849 .set_wptr = sdma_v4_4_2_page_ring_set_wptr,
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| H A D | cik_sdma.c | 1240 .set_wptr = cik_sdma_ring_set_wptr,
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| H A D | si_dma.c | 720 .set_wptr = si_dma_ring_set_wptr,
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| H A D | vce_v4_0.c | 1104 .set_wptr = vce_v4_0_ring_set_wptr,
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| H A D | sdma_v2_4.c | 1126 .set_wptr = sdma_v2_4_ring_set_wptr,
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| H A D | amdgpu_vpe.c | 869 .set_wptr = vpe_ring_set_wptr,
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Completed in 263 milliseconds
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