drm/radeon: Clean up errors in radeon_asic.c

Fix the following errors reported by checkpatch:

ERROR: spaces required around that '||' (ctx:VxE)

Signed-off-by: GuoHua Chen <chenguohua_716@163.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: Remove unnecessary include statements for drm_crtc_helper.h

Several source files include drm_crtc_helper.h without needing it or
only to get its transitive include statements; leading to unnecessary
compile-time dependencies.

Directly include required headers and drop drm_crtc_helper.h where
possible.

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Acked-by: Jani Nikula <jani.nikula@intel.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230116131235.18917-15-tzimmermann@suse.de

drm/radeon: OLAND boards don't have VCE

Disable it on those boards. No functional change, this just
removes the message about VCE failing to initialize.

Bug: https://bugzilla.kernel.org/show_bug.cgi?id=197327
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: Add implementation of get_current_vddc for Sumo

Add implementation of get_current_vddc() callback for Sumo.

Signed-off-by: Sandeep Raghuraman <sandy.8925@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: Don't include <drm/drm_pci.h>

Including <drm/drm_pci.h> is unnecessary in most cases. Replace
these instances.

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191203100406.9674-9-tzimmermann@suse.de

drm/radeon: drop use of drmP.h (1/2)

Drop use of drmP.h in all .c files named radeon*c.
To ease review a little drmP.h removal was divided in two commits.

Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Cc: "Christian König" <christian.koenig@amd.com>
Cc: "David (ChunMing) Zhou" <David1.Zhou@amd.com>
Cc: David Airlie <airlied@linux.ie>
Cc: Daniel Vetter <daniel@ffwll.ch>
Link: https://patchwork.freedesktop.org/patch/msgid/20190608080241.4958-7-sam@ravnborg.org

drm/radeon: add driver option to disable vce block.

Quite few suspend/hibernation bugs are related to this block. Add
an option to disable those as a work around.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Jérôme Glisse <jglisse@redhat.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: add driver option to disable uvd block.

Quite few suspend/hibernation bugs are related to this block. Add
an option to disable those as a work around.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Jérôme Glisse <jglisse@redhat.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: add a vce flag to know if need to initialize vce or not.

This will later on serve for module option to disable vce.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Jérôme Glisse <jglisse@redhat.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: constify radeon_asic_ring structures

The radeon_asic_ring structures are never modified, so declare them as
const.

Done with the help of Coccinelle.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: Drop unnecessary #include <linux/vga_switcheroo.h>

This was added to three files even though they don't use any
vga_switcheroo symbols:

Added to radeon_acpi.c by commit d7a2952f1ade ("drm/radeon: Add
support for the ATIF ACPI method to the radeon driver").

Added to radeon_asic.c by commit 0a10c85129c2 ("drm/radeon: create
radeon_asic.c").

Added to radeon_bios.c by commit 6a9ee8af344e ("vga_switcheroo:
initial implementation (v15)").

Signed-off-by: Lukas Wunner <lukas@wunner.de>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: add support for vce 1.0 clock gating

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: add VCE 1.0 support v4

Initial support for VCE 1.0 using newest firmware.

v2: rebased
v3: fix for TN
v4: fix FW size calculation

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: implement tn_set_vce_clocks

This implements the function to set the vce clocks
on TN hardware.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: implement si_set_vce_clocks v2

For setting clocks with VCE v1.0

v2: (chk) rebased on current tree

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: disable semaphores for UVD V1 (v2)

Hardware doesn't seem to work correctly, just block userspace in this case.

v2: add missing defines

Bugs: https://bugs.freedesktop.org/show_bug.cgi?id=85320

Signed-off-by: Christian König <christian.koenig@amd.com>
CC: stable@vger.kernel.org
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: add get_allowed_info_register for CIK

Registers that can be fetched from the info ioctl.

Tested-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: add get_allowed_info_register for SI

Registers that can be fetched from the info ioctl.

Tested-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: add get_allowed_info_register for cayman/TN

Registers that can be fetched from the info ioctl.

Tested-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: add get_allowed_info_register for EG/BTC

Registers that can be fetched from the info ioctl.

Tested-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: add get_allowed_info_register for r6xx/r7xx

Registers that can be fetched from the info ioctl.

Tested-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: add get_allowed_info_register function for r1xx-r5xx

Just a stub.

Tested-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon/kv: implement get_current_sclk/mclk

Will be used for exposing current clocks via INFO ioctl.

Tested-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon/tn: implement get_current_sclk/mclk

Will be used for exposing current clocks via INFO ioctl.

Tested-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon/sumo: implement get_current_sclk/mclk

Will be used for exposing current clocks via INFO ioctl.

Tested-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon/ci: implement get_current_sclk/mclk

Will be used for exposing current clocks via INFO ioctl.

Tested-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon/si: implement get_current_sclk/mclk

Will be used for exposing current clocks via INFO ioctl.

Tested-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon/ni: implement get_current_sclk/mclk

Will be used for exposing current clocks via INFO ioctl.

Tested-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon/btc: implement get_current_sclk/mclk

Will be used for exposing current clocks via INFO ioctl.

Tested-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon/rv7xx/eg: implement get_current_sclk/mclk

Will be used for exposing current clocks via INFO ioctl.

Tested-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon/rv6xx: implement get_current_sclk/mclk

Will be used for exposing current clocks via INFO ioctl.

Tested-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon/rs780: implement get_current_sclk/mclk

Will be used for exposing current clocks via INFO ioctl.

Tested-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: Split off gart_get_page_entry ASIC hook from set_page_entry

get_page_entry calculates the GART page table entry, which is just written
to the GART page table by set_page_entry.

This is a prerequisite for the following fix.

Reviewed-by: Christian König <christian.koenig@amd.com>
Cc: stable@vger.kernel.org
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

radeon/audio: applied audio_dpms() and audio_mode_set() calls

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Slava Grigorev <slava.grigorev@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

radeon/audio: consolidate audio_mode_set() functions

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Slava Grigorev <slava.grigorev@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: bind fan control on SI cards to hwmon interface

This adds a possibility to control fan on SI parts
via exported hwmon variables. Note that automatic
ucode fan management pauses if you choose to enable
manual fan control. Use with caution!

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: bind fan control on CI cards to hwmon interface (v2)

This adds a possibility to control fan on CI parts
via exported hwmon variables. Note that automatic
ucode fan management pauses if you choose to enable
manual fan control. Use with caution!

v2: agd5f: fix formatting, squash in:

minor fix for pwm1_enable exposed value

Track smc control in addition to fan mode
This fixes pwm1_enable being constantly set
to 1 because of enabled smc control

also handle the case where smc fan control is disabled.

Signed-off-by: Oleg Chernovskiy <algonkvel@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: use rv515_ring_start on r5xx

This was accidently lost in 76a0df859def.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org

drm/radeon: Disable HDP flush before every CS again for < r600

It was causing display corruption with R300 generation GPUs at least.

Reported-and-Tested-by: Mikael Pettersson <mikpelinux@gmail.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: 760G/780V/880V don't have UVD

Don't enable UVD on these asics as they don't have
UVD hardware.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: add UVD support for older asics v4

v2: cleanup R600 support
v3: rebased on current drm-fixes-3.12
v4: rebased on drm-next-3.14

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: split PT setup in more functions

Move the decision what to use into the common VM code.

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: Always flush the HDP cache before submitting a CS to the GPU

This ensures the GPU sees all previous CPU writes to VRAM, which makes it
safe:

* For userspace to stream data from CPU to GPU via VRAM instead of GTT
* For IBs to be stored in VRAM instead of GTT
* For ring buffers to be stored in VRAM instead of GTT, if the HPD flush
is performed via MMIO

Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: s/ioctl_wait_idle/mmio_hpd_flush/

And clean up the function comment a little.

Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: disable gfx cgcg on cik

This needs some tweaking to be stable with newer
ucode versions.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: use the SDMA on for buffer moves on CIK again

The underlying reason for the crashes seems to be fixed now.

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: split page flip and pending callback

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: remove (pre|post)_page_flip callbacks

They are doing the same on all generations anyway.

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon/hdmi: use separated file for DCE 3.1/3.2 code

DCE 3.1 and 3.2 should be programmed in a different way than DCE 2 and
DCE 3. The order of setting registers and sets of registers are
different.
It's still unsure how we will handle DCE 3.1 vs. DCE 3.2, since they
have few differences as well.
For now separate DCE 2 and DCE 3 path, so we can work on it without a
risk of breaking DCE 3.1+.

This has been tested for possible regressions on DCE32 HD4550 (RV710).

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: use the CP DMA on CIK

The SDMA sometimes doesn't seem to work reliable.

Signed-off-by: Christian König <christian.koenig@amd.com>
Cc: stable@vger.kernel.org

drm/radeon: add Mullins chip family

Mullins is a new CI-based APU.

Signed-off-by: Samuel Li <samuel.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>

drm/radeon: fill in set_vce_clocks for CIK asics

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: initial VCE support v4

Only VCE 2.0 support so far.

v2: squashing multiple patches into this one
v3: add IRQ support for CIK, major cleanups,
basic code documentation
v4: remove HAINAN from chipset list

Signed-off-by: Christian König <christian.koenig@amd.com>

drm/radeon/dpm: use the driver state for dpm debugfs

For btc and newer, we may modify the power state depending
on the circumstances. Use the modified state rather than
the base state.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: remove generic rptr/wptr functions (v2)

Fill in asic family specific versions rather than
using the generic version. This lets us handle asic
specific differences more easily. In this case, we
disable sw swapping of the rtpr writeback value on
r6xx+ since the hw does it for us. Fixes bogus
rptr readback on BE systems.

v2: remove missed cpu_to_le32(), add comments

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: enable gfx cgcg on CIK APUs

Enable coarse grained clockgating. This works properly now
that smc is initialized earlier than the rlc and cp.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: enable gfx cgcg on CIK dGPUs

Enable coarse grained clockgating on CIK dGPUs. This
works properly now that smc is initialized earlier than
the rlc and cp.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon/dpm: add late_enable for KB/KV

Make sure interrupts are enabled
before we enable thermal interrupts.
Also, don't powergate uvd, etc. until after
the ring tests.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon/dpm: add late_enable for CI

Make sure interrupts are enabled
before we enable thermal interrupts.
Also, don't powergate uvd until after
the ring tests.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon/dpm: add late_enable for SI

Make sure interrupts are enabled
before we enable thermal interrupts.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon/dpm: add late_enable for trinity

Need to wait to enable cg and pg until after
ring tests. Also make sure interrupts are enabled
before we enable thermal interrupts.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon/dpm: add late_enable for sumo

Need to wait to enable cg and pg until after
ring tests. Also make sure interrupts are enabled
before we enable thermal interrupts.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon/dpm: add late_enable for rv7xx-NI

Make sure interrupts are enabled
before we enable thermal interrupts.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon/dpm: add late_enable for rs780/rs880/rv6xx

Make sure interrupts are enabled before we enable
thermal interrupts.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon/cik: plug in missing blit callback

I implemented support for this, but forget to hook
up the callback so the driver can actually use it.
On asics with a dedicated DMA engine, we use the DMA
engine for buffer migration so this is just for testing
purposes.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: hook up backlight functions for CI and KV family.

Fixes crashes when handling atif events due to the lack of a
callback being registered.

Signed-off-by: Samuel Li <samuel.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org

drm/radeon: fill in radeon_asic_init for hawaii

Fill in gpu details for hawaii.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: drop CP page table updates & cleanup v2

The DMA ring seems to be stable now.

v2: remove pt_ring_index as well

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: plug in blit copy routine for SI

Uses CP DMA packet just like previous asics.
Useful for debugging and benchmarking. Uses
same packet format as prior asics.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: add missing hdmi callbacks for rv6xx

When dpm was merged, I added a new asic struct for
rv6xx, but it never got properly updated when the
hdmi callbacks were added due to the two patch sets
being developed in parallel.

Fixes:
https://bugs.freedesktop.org/show_bug.cgi?id=69729

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Cc: stable@vger.kernel.org

drm/radeon/dpm: add bapm callback for kb/kv

This adds the enable_bapm callback for kb/kv.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon/dpm: add bapm callback for trinity

This adds the enable_bapm callback for trinity.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon/r6xx: add a stubbed out set_uvd_clocks callback

Certain r6xx boards use the same power state for both UVD
and other things. Since we don't support UVD on r6xx boards
at the moment, there was no callback installed for setting
the UVD clocks, however, on systems that use the same power
state, this leads to a NULL pointer dereference. Fill
in a stubbed out implementation for now to avoid the crash.

Fixes:
https://bugs.freedesktop.org/show_bug.cgi?id=66963

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: "3.11" <stable@vger.kernel.org>

drm/radeon: fix typo in PG flags

s/CG/PG/ in the GFX powergating flag name.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon/dpm: implement force performance levels for rs780 (v2)

Allows you to limit the selected power levels via sysfs.

Force the feedback divider to select a power level.

v2: fix checking in rs780_force_fbdiv,
drop a duplicate divider structure in rs780_dpm_force_performance_level,
Force the voltage level too.

Signed-off-by: Anthoine Bourgeois <anthoine.bourgeois@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: enable mgcg on CIK

Now that the CP is no longer reset and cg is properly
disabled in when appropriate in the dpm code we can
now enable mgcg (medium grained clockgating).

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: fixes for gfx clockgating on CIK

Clockgating requires signalling between the CP and the
RLC to work properly. Resetting the CP block in the
CP resume code messed up the internal coordination
between the blocks. Removing the reset allows gfx
clockgating to work properly. However, when gfx clock
gating is enabled, there is a strange interaction with
dpm which causes the chip to stay in the high performance
level all the time, so leave gfx clockgating disabled
for now.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: restructure cg/pg on cik (v2)

- use new cg/pg flags for finer grained clock and
powergating control
- restructure the cg/pg code so it can be called from
other components such as dpm

v2: fix build breakage from rebase

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon/si: enable DMA pg by default

Enable DMA powergating by default. The DMA engines
will be powergated when not in use.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: enable mgcg on SI

Now that the CP is no longer reset and cg is properly
disabled in when appropriate in the dpm code we can
now enable mgcg (medium grained clockgating).

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: fixes for gfx clockgating on SI

Clockgating requires signalling between the CP and the
RLC to work properly. Resetting the CP block in the
CP resume code messed up the internal coordination
between the blocks. Removing the reset allows gfx
clockgating to work properly. However, when gfx clock
gating is enabled, there is a strange interaction with
dpm which causes the chip to stay in the high performance
level all the time, so leave gfx clockgating disabled
for now.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon/si: restructure cg code (v3)

Resturcture clockgating code so that it can be
enabled/disabled from other components such as
dpm.

v2: make function static
v3: add fine grained cg controls

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: use new cg/pg flags for SI

Allows us finer grained control over clock and
powergating on SI.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: add audio support for DCE6/8 GPUs (v12)

Similar to DCE4/5, but supports multiple audio pins
which can be assigned per afmt block.

v2: rework the driver to handle more than one audio
pin.
v3: try different dto reg
v4: properly program dto
v5 (ck): change dto programming order
v6: program speaker allocation block
v7: rebase
v8: rebase on Rafał's changes
v9: integrated Rafał's comments, update to latest
drm_edid_to_speaker_allocation API
v10: add missing line break in error message
v11: add back audio enabled messages
v12: fix copy paste typo in r600_audio_enable

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Rafał Miłecki <zajec5@gmail.com>

drm/radeon: separate UVD code v3

Our different hardware blocks are actually completely
separated, so it doesn't make much sense any more to
structure the code by pure chipset generations.

Start restructuring the code by separating our the UVD block.

v2: updated commit message
v3: rebased and restructurized start/stop functions for kv dpm.

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: remove special handling for the DMA ring

Now that we have callbacks for [rw]ptr handling we can
remove the special handling for the DMA rings and use
the callbacks instead.

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: rework UVD writeback & [rw]ptr handling

The hardware just doesn't support this correctly.
Disable it before we accidentally write anywhere we shouldn't.

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: rework ring function handling

Give the ring functions a separate structure and let the asic
structure point to the ring specific functions. This simplifies
the code and allows us to make changes at only one point.

No change in functionality.

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon/dpm: implement UVD powergating for CI

Disable the UVD block when not in use to save power.
The block is not actually powergated on CI, but we
switch between UVD DPM (where the uvd clocks are
adjusted on demand) and clocks off.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon/dpm: implement UVD powergating for KB/KV

Powergate the UVD block when not in use to save power.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon/dpm: implement force performance level for KB/KV

Allows you to force the selected performance level via sysfs.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon/dpm: add debugfs support for KB/KV

This allows you to look at the current DPM state via
debugfs.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon/dpm: implement vblank_too_short callback for CI

Check if we can switch the mclk during the vblank time otherwise
we may get artifacts on the screen when the mclk changes.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon/dpm: implement force performance level for CI

Allows you to force the selected performance level via sysfs.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon/dpm: add debugfs support for CI

This allows you to look at the current DPM state via debugfs.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: add dpm support for CI dGPUs (v2)

This adds dpm support for btc asics. This includes:
- dynamic engine clock scaling
- dynamic memory clock scaling
- dynamic voltage scaling
- dynamic pcie gen switching

Set radeon.dpm=1 to enable.

v2: remove unused radeon_atombios.c changes,
make missing smc ucode non-fatal

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon/kms: add dpm support for KB/KV

This adds dpm support for KB/KV asics. This includes:
- dynamic engine clock scaling
- dynamic voltage scaling
- power containment
- shader power scaling

Set radeon.dpm=1 to enable.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: add get_temperature() callbacks for CIK (v2)

This added support for the on-chip thermal sensors on
CIK asics.

v2: fix register offset.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: implement clock and power gating for CIK (v3)

Only the APUs support power gating.

v2: disable cgcg for now
v3: workaround hw issue in mgcg

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: switch r6xx+ to using CP DMA for the blit copy callback

CP DMA is lighter weight than using the 3D engine.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon/dpm: implement force performance levels for rv6xx

Allows you to limit the selected power levels via sysfs.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon/dpm: add debugfs support for RS780/RS880 (v3)

This allows you to look at the current DPM state via
debugfs.

Due to the way the hardware works on these asics, there's
no way to look up exactly what power state we are in, so
we make the best guess we can based on the current sclk.

v2: Anthoine's version
v3: fix ref div

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: use CP DMA on r6xx for bo moves

Lighter weight than using the 3D engine.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: Disable dma rings for bo moves on r6xx

They still seem to cause instability on some r6xx parts.
As a follow up, we can switch to using CP DMA for bo
moves on r6xx as a lighter weight alternative to using
the 3D engine.

A version of this patch should also go to stable kernels.

Tested-by: J.N. <golden.fleeced@gmail.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon/dpm: implement vblank_too_short callback for si

Check if we can switch the mclk during the vblank time otherwise
we may get artifacts on the screen when the mclk changes.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon/dpm: implement vblank_too_short callback for cayman

Check if we can switch the mclk during the vblank time otherwise
we may get artifacts on the screen when the mclk changes.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon/dpm: implement vblank_too_short callback for btc

Check if we can switch the mclk during the vblank time otherwise
we may get artifacts on the screen when the mclk changes.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon/dpm: implement vblank_too_short callback for evergreen

Check if we can switch the mclk during the vblank time otherwise
we may get artifacts on the screen when the mclk changes.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon/dpm: implement vblank_too_short callback for 7xx

Check if we can switch the mclk during the vblank time otherwise
we may get artifacts on the screen when the mclk changes.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon/dpm: implement force performance level for TN

Allows you to force the selected performance level via sysfs.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon/dpm: implement force performance level for ON/LN

Allows you to force the selected performance level via sysfs.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon/dpm: implement force performance level for SI

Allows you to force the selected performance level via sysfs.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon/dpm: implement force performance level for cayman

Allows you to force a performance level via sysfs.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon/dpm: implement force performance levels for 7xx/eg/btc

Allows you to limit the selected power levels via sysfs.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon/dpm: add debugfs support for SI

This allows you to look at the current DPM state via
debugfs.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon/dpm: add debugfs support for cayman

This allows you to look at the current DPM state via
debugfs.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon/dpm: add debugfs support for TN

This allows you to look at the current DPM state via
debugfs.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon/dpm: add debugfs support for ON/LN

This allows you to look at the current DPM state via
debugfs.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon/dpm: add debugfs support for 7xx/evergreen/btc

This allows you to look at the current DPM state via
debugfs.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon/dpm: add debugfs support for rv6xx

This allows you to look at the current DPM state via
debugfs.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon/kms: add dpm support for SI (v7)

This adds dpm support for SI asics. This includes:
- dynamic engine clock scaling
- dynamic memory clock scaling
- dynamic voltage scaling
- dynamic pcie gen1/gen2/gen3 switching
- power containment
- shader power scaling

Set radeon.dpm=1 to enable.

v2: enable hainan support, rebase
v3: guard acpi stuff
v4: fix 64 bit math
v5: fix 64 bit div harder
v6: fix thermal interrupt check noticed by Jerome
v7: attempt fix state enable

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon/dpm: add pre/post_set_power_state callback (cayman)

This properly implemented dynamic state adjustment by
using a working copy of the requested and current
power states.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon/dpm: add pre/post_set_power_state callback (BTC)

This properly implemented dynamic state adjustment by
using a working copy of the requested and current
power states.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon/dpm: add pre/post_set_power_state callback (TN)

This properly implemented dynamic state adjustment by
using a working copy of the requested and current
power states.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon/dpm: add pre/post_set_power_state callback (sumo)

This properly implemented dynamic state adjustment by
using a working copy of the requested and current
power states.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon/dpm: add pre/post_set_power_state callbacks (6xx-eg)

For r6xx-evergreen, they are no-ops as they don't support
any dynamic state adjustment.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon/kms: add dpm support for cayman (v5)

This adds dpm support for cayman asics. This includes:
- clockgating
- dynamic engine clock scaling
- dynamic memory clock scaling
- dynamic voltage scaling
- dynamic pcie gen1/gen2 switching (requires additional acpi support)
- power containment
- shader power scaling

Set radeon.dpm=1 to enable.

v2: fold in tdp fix
v3: fix indentation
v4: fix 64 bit div
v5: attempt to fix state enable

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jerome Glisse <jglisse@redhat.com>

drm/radeon/kms: add dpm support for trinity asics

This adds dpm support for trinity asics. This includes:
- clockgating
- powergating
- dynamic engine clock scaling
- dynamic voltage scaling

set radeon.dpm=1 to enable it.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon/kms: add dpm support for sumo asics (v2)

This adds dpm support for sumo asics. This includes:
- clockgating
- powergating
- dynamic engine clock scaling
- dynamic voltage scaling

set radeon.dpm=1 to enable it.

v2: fix indention

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jerome Glisse <jglisse@redhat.com>

drm/radeon/kms: add dpm support for btc (v3)

This adds dpm support for btc asics. This includes:
- clockgating
- dynamic engine clock scaling
- dynamic memory clock scaling
- dynamic voltage scaling
- dynamic pcie gen1/gen2 switching (requires additional acpi support)

Set radeon.dpm=1 to enable.

v2: reduce stack usage
v3: attempt to fix state enable

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon/kms: add dpm support for evergreen (v4)

This adds dpm support for evergreen asics. This includes:
- clockgating
- dynamic engine clock scaling
- dynamic memory clock scaling
- dynamic voltage scaling
- dynamic pcie gen1/gen2 switching (requires additional acpi support)

Set radeon.dpm=1 to enable.

v2: reduce stack usage, rename ulv struct
v3: fix thermal interrupt check notices by Jerome
v4: fix state enable

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon/kms: add dpm support for rv7xx (v4)

This adds dpm support for rv7xx asics. This includes:
- clockgating
- dynamic engine clock scaling
- dynamic memory clock scaling
- dynamic voltage scaling
- dynamic pcie gen1/gen2 switching

Set radeon.dpm=1 to enable.

v2: reduce stack usage
v3: fix 64 bit div
v4: fix state enable

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon/kms: add dpm support for rv6xx (v3)

This adds dpm support for rv6xx asics. This includes:
- clockgating
- dynamic engine clock scaling
- dynamic memory clock scaling
- dynamic voltage scaling
- dynamic pcie gen1/gen2 switching

Set radeon.dpm=1 to enable.

v2: remove duplicate line
v3: fix thermal interrupt check noticed by Jerome

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>

drm/radeon/kms: add dpm support for rs780/rs880

This adds dpm support for rs780/rs880 asics. This includes:
- clockgating
- dynamic engine clock scaling
- dynamic voltage scaling

set radeon.dpm=1 to enable it.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon/kms: add new asic struct for rv6xx (v4)

Has a different dpm controller than r600.

v2: rebase on gpu reset changes
v3: rebase on get_xclk changes
v4: update rptr/wtpr callbacks

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: add support for thermal sensor on tn

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: make get_temperature functions a callback

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: add radeon_asic struct for CIK (v12)

v2: fix up for latest reset changes
v3: use CP for pt updates for now
v4: update for 2 level PTs
v5: update for ib_parse removal
v6: vm_flush api change
v7: rebase
v8: fix gfx ring function pointers
v9: fix vm_set_page function params
v10: update for compute changes
v11: cleanup for release
v12: update rptr/wptr callbacks

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: use callbacks for ring pointer handling (v3)

Add callbacks to the radeon_asic struct to handle
rptr/wptr fetchs and wptr updates.
We currently use one version for all rings, but this
allows us to override with a ring specific versions.

Needed for compute rings on CIK.

v2: udpate as per Christian's comments
v3: fix some rebase cruft

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon/cik: add pcie_port indirect register accessors

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: Use direct mapping for fast fb access on RS780/RS880 (v2)

v2: fix trailing whitespace

Signed-off-by: Samuel Li <samuel.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: track which asics have UVD

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: radeon-asic updates for Hainan

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>

drm/radeon: switch audio handling to use callbacks

Register audio callbacks for asic where we support
audio. Cleans up the code and makes it easier to
add support for newer asics.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: add pcie set/get lanes callbacks for newer asics

Uses the same functions as older asics.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: add set_uvd_clocks callback for r7xx v3

v2: avoid 64bit divide
v3: rv740 uses the evegreen upll configuration

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jerome Glisse <jglisse@redhat.com>

drm/radeon: add set_uvd_clocks callback for SI

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: add set_uvd_clocks callback for evergreen

v2: remove unneeded register definitions

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: add set_uvd_clocks callback for ON/LN/TN (v4)

v2: write clk registers only once!
v3: update cg scratch register properly
v4: add TN support

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: UVD bringup v8

Just everything needed to decode videos using UVD.

v6: just all the bugfixes and support for R7xx-SI merged in one patch
v7: UVD_CGC_GATE is a write only register, lockup detection fix
v8: split out VRAM fallback changes, remove support for RV770,
add support for HEMLOCK, add buffer sizes checks

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: switch get_gpu_clock() to a callback (v2)

Cleans up the code for future asics

v2: rebase, fix some missing radeon_asic updates

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: add a asic callback to get the xclk

This is required to get the reference clock used
by the gfx engine for things like timestamps. Fixes
support for GL extensions the use timestamps on
certain boards.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: radeon-asic updates for Oland

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: switch back to using the DMA ring for VM PT updates

Now that we have switched to using IBs for page table updates,
we can switch back the using the DMA ring.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: use the reset mask to determine if rings are hung

fetch the reset mask and check if the relevant ring flags
are set to determine whether the ring is hung or not.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: switch back to the CP ring for VM PT updates

For large VM page table updates, we can sometimes generate
more packets than there is space on the ring. This happens
more readily with the DMA ring since it is 64K (vs 1M for the
CP). For now, switch back to the CP. For the next kernel,
I have a patch to utilize IBs for VM PT updates which
alleviates this problem.

Fixes:
https://bugs.freedesktop.org/show_bug.cgi?id=58354

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: split r6xx and r7xx copy_dma functions

- r6xx actually uses a slightly different packet format,
although both formats seem to work ok.
- r7xx doesn't have the count multiple of 2 limitation.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: add VM CS parser support for async DMA on cayman/TN/SI

Allows us to use async DMA from userspace.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon/kms: add evergreen/cayman CS parser for async DMA (v2)

Allows us to use the DMA ring from userspace.
DMA doesn't have a good NOP packet in which to embed the
reloc idx, so userspace has to add a reloc for each
buffer used and order them to match the command stream.

v2: fix address bounds checking

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon/kms: add 6xx/7xx CS parser for async DMA (v2)

Allows us to use the DMA ring from userspace.
DMA doesn't have a good NOP packet in which to embed the
reloc idx, so userspace has to add a reloc for each
buffer used and order them to match the command stream.

v2: fix address bounds checking, reloc indexing

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: use DMA engine for VM page table updates on SI

DMA engine has special packets to facilitate this and it also keeps
the 3D engine free for other things.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: use DMA engine for VM page table updates on cayman/TN

DMA engine has special packets to facilitate this and it also keeps
the 3D engine free for other things.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: use async dma for ttm buffer moves on 6xx-SI

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon/kms: Add initial support for async DMA on SI

Pretty much the same as cayman. Some changes to the copy
packets.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon/kms: Add initial support for async DMA on cayman/TN

There are 2 async DMA engines on cayman, one at 0xd000 and
one at 0xd800. The programming interface is the same as
evergreen however there are some changes to the commands
for using vmids.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon/kms: Add initial support for async DMA on evergreen

Pretty similar to 6xx/7xx except the count field increased in the
packet header and the max IB size increased.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon/kms: Add initial support for async DMA on r6xx/r7xx

Uses the new multi-ring infrastucture. 6xx/7xx has a single
async DMA ring.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: add vm set_page() callback for SI

Use the new WRITE_DATA packet rather than the legacy
ME_WRITE packet.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon/pm: fix multi-head profile handling on BTC+ (v2)

Starting on BTC, there are no longer separate states for
single head and multi-head, we just use the high mclk/voltage
for all states for multi-head.

Fixes:
https://bugs.freedesktop.org/show_bug.cgi?id=49981

v2: fix typo

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: add get_backlight_level callback

Read back the backlight level from the hw.
Needed for proper backlight restoration on resume.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: make page table updates async v2

Currently doing the update with the CP.

v2: Rebased on Jeromes bugfix. Make validity comparison
more human readable.

Signed-off-by: Christian König <deathsimple@vodafone.de>

drm/radeon: Move looping over the PTEs into chip code

Makes it easier to move it into the rings.

Signed-off-by: Christian König <deathsimple@vodafone.de>
Reviewed-by: Jerome Glisse <jglisse@redhat.com>

drm/radeon: rework VMID handling

Move binding onto the ring, simplifying handling a bit.

Signed-off-by: Christian König <deathsimple@vodafone.de>
Reviewed-by: Jerome Glisse <jglisse@redhat.com>

drm/radeon: make VM flushs a ring operation

Move flushing the VMs as function into the rings.
First step to make VM operations async.

Signed-off-by: Christian König <deathsimple@vodafone.de>
Reviewed-by: Jerome Glisse <jglisse@redhat.com>

drm/radeon: remove vm_unbind

It actually isn't very useful.

Signed-off-by: Christian König <deathsimple@vodafone.de>
Reviewed-by: Jerome Glisse <jglisse@redhat.com>

drm/radeon: move VM funcs into asic structure

So it looks more like the rest of the driver.

Signed-off-by: Christian König <deathsimple@vodafone.de>
Reviewed-by: Jerome Glisse <jglisse@redhat.com>

drm/radeon: rework the backlight control to be an asic callback

This cleans up the interface a bit as well.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/radeon: document radeon_asic.c

Adds documentation to most of the functions in
radeon_asic.c

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>

drm/radeon: remove cayman_gpu_is_lockup

Since it is now identical to evergreen_gpu_is_lockup.

Signed-off-by: Christian König <deathsimple@vodafone.de>
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

drm/radeon: remove r300_gpu_is_lockup

Since it is now identical to r100_gpu_is_lockup.

Signed-off-by: Christian König <deathsimple@vodafone.de>
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

drm/radeon: make radeon_gpu_is_lockup a per ring function

Different rings have different criteria to test
if they are stuck.

v2: rebased on current drm-next

Signed-off-by: Christian König <deathsimple@vodafone.de>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

drm/radeon/kms: add radeon_asic struct for trinity

Trinity (TN) is an APU with:
- Cayman 3D
- DCE6.1 display

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

drm/radeon/kms: add radeon_asic struct for SI

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

drm/radeon/kms: clean up radeon_asic struct (v2)

v2: fix typo.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König<christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

drm/radeon/kms: reorganize surface callbacks

tidy up the radeon_asic struct.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König<christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

drm/radeon/kms: move clock/pcie setting callbacks into pm struct

tidy up radeon_asic struct.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König<christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

drm/radeon/kms: reorganize display callbacks

tidy up the radeon_asic struct.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König<christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

drm/radeon/kms: reorganize gart callbacks

tidy up the radeon_asic struct.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König<christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

drm/radeon/kms: make ring_start, ring_test, and ib_test per ring

Each ring type may need a different variant.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König<christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

drm/radeon/kms: reorganize irq callbacks

tidy up the radeon_asic struct.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König<christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

drm/radeon/kms: reorganize copy callbacks

tidy up the radeon_asic struct, handle multiple
rings better.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König<christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

drm/radeon: also make the cs_parse function per ring

Not all rings use PM4, so the cs_parser also needs to be per ring.

Signed-off-by: Christian König <deathsimple@vodafone.de>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

drm/radeon/kms: reorganize pm callbacks

tidy up the radeon_asic struct.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

drm/radeon/kms: reorganize page flip callbacks

tidy up the radeon_asic struct.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

drm/radeon/kms: reorganize hpd callbacks

tidy up the radeon_asic struct.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

drm/radeon/kms: add a radeon asic callback for mc idle

Required for future functionality.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

drm/radeon/kms: add wait_for_vblank asic callback

Required for future functionality.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

drm/radeon/kms: sync across multiple rings when doing bo moves v3

We need to synchronize across rings when doing a bo move to make
sure we the buffer is idle if it's in use by a different ring than
the ring doing the move.

v2: fix fence setup for bo moves

v3: add missing ring lock/unlock

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

drm/radeon: GPU virtual memory support v22

Virtual address space are per drm client (opener of /dev/drm).
Client are in charge of virtual address space, they need to
map bo into it by calling DRM_RADEON_GEM_VA ioctl.

First 16M of virtual address space is reserved by the kernel.

Once using 2 level page table we should be able to have a small
vram memory footprint for each pt (there would be one pt for all
gart, one for all vram and then one first level for each virtual
address space).

Plan include using the sub allocator for a common vm page table
area and using memcpy to copy vm page table in & out. Or use
a gart object and copy things in & out using dma.

v2: agd5f fixes:
- Add vram base offset for vram pages. The GPU physical address of a
vram page is FB_OFFSET + page offset. FB_OFFSET is 0 on discrete
cards and the physical bus address of the stolen memory on
integrated chips.
- VM_CONTEXT1_PROTECTION_FAULT_DEFAULT_ADDR covers all vmid's >= 1

v3: agd5f:
- integrate with the semaphore/multi-ring stuff

v4:
- rebase on top ttm dma & multi-ring stuff
- userspace is now in charge of the address space
- no more specific cs vm ioctl, instead cs ioctl has a new
chunk

v5:
- properly handle mem == NULL case from move_notify callback
- fix the vm cleanup path

v6:
- fix update of page table to only happen on valid mem placement

v7:
- add tlb flush for each vm context
- add flags to define mapping property (readable, writeable, snooped)
- make ring id implicit from ib->fence->ring, up to each asic callback
to then do ring specific scheduling if vm ib scheduling function

v8:
- add query for ib limit and kernel reserved virtual space
- rename vm->size to max_pfn (maximum number of page)
- update gem_va ioctl to also allow unmap operation
- bump kernel version to allow userspace to query for vm support

v9:
- rebuild page table only when bind and incrementaly depending
on bo referenced by cs and that have been moved
- allow virtual address space to grow
- use sa allocator for vram page table
- return invalid when querying vm limit on non cayman GPU
- dump vm fault register on lockup

v10: agd5f:
- Move the vm schedule_ib callback to a standalone function, remove
the callback and use the existing ib_execute callback for VM IBs.

v11:
- rebase on top of lastest Linus

v12: agd5f:
- remove spurious backslash
- set IB vm_id to 0 in radeon_ib_get()

v13: agd5f:
- fix handling of RADEON_CHUNK_ID_FLAGS

v14:
- fix va destruction
- fix suspend resume
- forbid bo to have several different va in same vm

v15:
- rebase

v16:
- cleanup left over of vm init/fini

v17: agd5f:
- cs checker

v18: agd5f:
- reworks the CS ioctl to better support multiple rings and
VM. Rather than adding a new chunk id for VM, just re-use the
IB chunk id and add a new flags for VM mode. Also define additional
dwords for the flags chunk id to define the what ring we want to use
(gfx, compute, uvd, etc.) and the priority.

v19:
- fix cs fini in weird case of no ib
- semi working flush fix for ni
- rebase on top of sa allocator changes

v20: agd5f:
- further CS ioctl cleanups from Christian's comments

v21: agd5f:
- integrate CS checker improvements

v22: agd5f:
- final cleanups for release, only allow VM CS on cayman

Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

drm/radeon/kms: add cayman specific fence_ring_emit

cayman is wb only and doesn't have a VC.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Christian König <deathsimple@vodafone.de>
Signed-off-by: Dave Airlie <airlied@redhat.com>

drm/radeon: make some asic pointers per ring

Emitting fences, semaphores and ib works differently
on different ring, so its is easier to maintain
separate functions for each ring.

Signed-off-by: Christian König <deathsimple@vodafone.de>
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

drm/radeon: make ring rptr and wptr register offsets variable

Every ring seems to have the concept of read and
write pointers. Make the register offset variable
so we can use the functions for different types of rings.

Signed-off-by: Christian König <deathsimple@vodafone.de>
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

drm/radeon/kms: add support for semaphores v3

They are used to sync between rings, while fences
sync between a ring and the cpu.

v2 Fix radeon_semaphore_driver_fini when no semaphore were
allocated.

v3 Initialize list early on to avoid issue in case or early
error

Signed-off-by: Christian König <deathsimple@vodafone.de>
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

drm/radeon/kms/pm: add a proper pm profile init function for fusion

The new power tables need to be handled differently when setting
up the profiles.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

drm/radeon/kms: blit code commoning

factor out most of evergreen blit code and use the refactored code
from r600 that is now common for both r600 and evergreen

Signed-off-by: Ilija Hadzic <ihadzic@research.bell-labs.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

drm/radeon/kms: set dma_copy to NULL for r6xx+

No need to assign the same copy callback for both
copy blit and dma.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

drm/radeon/kms: fix num crtcs for Cedar and Caicos

Only support 4 rather than 6.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

drm/radeon/kms: fill in asic struct for llano

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

drm/radeon/kms: add blit support for cayman (v2)

Allows us to use the 3D engine for memory management
and allows us to use vram beyond the BAR aperture.

v2: fix copy paste typo
Reported-by: Nils Wallménius <nils.wallmenius@gmail.com>

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

drm/radeon/kms: add wait idle ioctl for eg->cayman

None of the latest GPUs had this hooked up, this is necessary for
correct operation in a lot of cases, however we should test this on a few
GPUs in these families as we've had problems in this area before.

Reviewed-by: Alex Deucher <alexdeucher@gmail.com>
cc: stable@kernel.org
Signed-off-by: Dave Airlie <airlied@redhat.com>

drm/radeon/kms: fix pcie_p callbacks on btc and cayman

btc and cayman asics use the same callback for
pcie port registers.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

drm/radeon: add pageflip hooks for fusion

Looks like these got passed over with both being merged at the same
time but not quite meeting in the middle.

should fix: https://bugs.freedesktop.org/show_bug.cgi?id=34137
along with Michael's phoronix article.

Reported-by: Chi-Thanh Christopher Nguyen
Article-written-by: Michael Larabel @ phoronix
Signed-off-by: Dave Airlie <airlied@redhat.com>

drm/radeon/kms: add radeon_asic entry for cayman

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

drm/radeon/kms: add updated ib_execute function for evergreen

Adds new packet to disable DX9 constant emulation.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Cc: stable@kernel.org
Signed-off-by: Dave Airlie <airlied@redhat.com>

drm/radeon/kms: add radeon_asic struct for NI asics

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

drm/radeon/kms: add pcie get/set lane support for r6xx/r7xx/evergreen

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

drm/radeon/kms: add bo blit support for Ontario fusion APUs

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

drm/radeon/kms: add radeon_asic struct for AMD Ontario fusion APUs

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

drm/radeon/kms: atom changes for DCE4.1 devices

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

drm/radeon/kms: add pageflip ioctl support (v3)

This adds support for dri2 pageflipping.

v2: precision updates from Mario Kleiner.
v3: Multihead fixes from Mario Kleiner; missing crtc offset
add note about update pending bit on pre-avivo chips

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Mario Kleiner <mario.kleiner@tuebingen.mpg.de>
Signed-off-by: Dave Airlie <airlied@redhat.com>

drm/radeon/kms: add drm blit support for evergreen

This patch implements blit support for bo moves using
the 3D engine. It uses the same method as r6xx/r7xx:
- store the base state in an IB
- emit variable state and vertex buffers to do the blit

This allows the hw to move bos using the 3D engine and allows
full use of vram beyond the pci aperture size.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

drm/radeon/kms: remove useless clock code

This code was originally for forcing some clocks on certain asics.
However, this code was later moved to asic specific functions
for all of the affected asics. The only users of the original
code at this point were r600, rv770, and evergreen and the code
was not relevant for those asics. So, remove it.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

drm/radeon/kms: add missing asic callback assignment for evergreen

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

drm/radeon/kms: avoid oops on mac r4xx cards

They don't have an atombios so don't attempt to use it for
eng/mem clocks.

Reported by spoonb on #radeon
fixes:
https://bugs.freedesktop.org/show_bug.cgi?id=28671

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

drm/radeon/kms/evergreen: add initial CS parser

Advanced validation is not implemented yet.
The mesa code that uses this will be released soon.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

drm/radeon/kms/pm: rework power management

- Separate dynpm and profile based power management methods. You can select the pm method
by echoing the selected method ("dynpm" or "profile") to power_method in sysfs.
- Expose basic 4 profile in profile method
"default" - default clocks
"auto" - select between low and high based on ac/dc state
"low" - DC, low power mode
"high" - AC, performance mode
The current base profile is "default", but it should switched to "auto" once we've tested
on more systems. Switching the state is a matter of echoing the requested profile to
power_profile in sysfs. The lowest power states are selected automatically when dpms turns
the monitors off in all states but default.
- Remove dynamic fence-based reclocking for the moment. We can revisit this later once we
have basic pm in.
- Move pm init/fini to modesetting path. pm is tightly coupled with display state. Make sure
display side is initialized before pm.
- Add pm suspend/resume functions to make sure pm state is properly reinitialized on resume.
- Remove dynpm module option. It's now selectable via sysfs.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

drm/radeon/kms/pm: add additional asic callbacks

- pm_misc() - handles voltage, pcie lanes, and other non
clock related power mode settings. Currently disabled.
Needs further debugging

- pm_prepare() - disables crtc mem requests right now.
All memory clients need to be disabled when changing
memory clocks. This function can be expanded to include
disabling fb access as well.

- pm_finish() - enable active memory clients.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

drm/radeon/kms/pm: add asic specific callbacks for getting power state (v2)

This also simplifies the code and enables reclocking with multiple heads
active by tracking whether the power states are single or multi-head
capable.

Eventually, we will want to select a power state based on external
factors (AC/DC state, user selection, etc.).

(v2) Update for evergreen

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

drm/radeon/kms/pm: add asic specific callbacks for setting power state (v2)

(v2) Add evergreen vbl checks

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

drm/radeon/kms: add gui_idle callback

Check to see if the GUI engine and related blocks
(2D, 3D, CP, etc) are idle or not. There are a number
of cases when we need to know if the drawing engine
is busy.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

drm/radeon/kms/evergreen: implement irq support

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

drm/radeon/kms/evergreen: setup and enable the CP

The command processor (CP) fetches command buffers and
feeds the GPU. This patch requires the evergreen
family me and pfp ucode files.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

drm/radeon/kms/evergreen: add gart support

Gart setup is more or less like r7xx. Copy
rv770d.h to evergreend.h and fix up changes.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

drm/radeon/kms: simplify & improve GPU reset V2

This simplify and improve GPU reset for R1XX-R6XX hw, it's
not 100% reliable here are result:
- R1XX/R2XX works bunch of time in a row, sometimes it
seems it can work indifinitly
- R3XX/R3XX the most unreliable one, sometimes you will be
able to reset few times, sometimes not even once
- R5XX more reliable than previous hw, seems to work most
of the times but once in a while it fails for no obvious
reasons (same status than previous reset just no same
happy ending)
- R6XX/R7XX are lot more reliable with this patch, still
it seems that it can fail after a bunch (reset every
2sec for 3hour bring down the GPU & computer)

This have been tested on various hw, for some odd reasons
i wasn't able to lockup RS480/RS690 (while they use to
love locking up).

Note that on R1XX-R5XX the cursor will disapear after
lockup haven't checked why, switch to console and back
to X will restore cursor.

Next step is to record the bogus command that leaded to
the lockup.

V2 Fix r6xx resume path to avoid reinitializing blit
module, use the gpu_lockup boolean to avoid entering
inifinite waiting loop on fence while reiniting the GPU

Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

drm/radeon/kms: rename gpu_reset to asic_reset

Patch rename gpu_reset to asic_reset in prevision of having
gpu_reset doing more stuff than just basic asic reset.

Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

drm/radeon/kms: fence cleanup + more reliable GPU lockup detection V4

This patch cleanup the fence code, it drops the timeout field of
fence as the time to complete each IB is unpredictable and shouldn't
be bound.

The fence cleanup lead to GPU lockup detection improvement, this
patch introduce a callback, allowing to do asic specific test for
lockup detection. In this patch the CP is use as a first indicator
of GPU lockup. If CP doesn't make progress during 1second we assume
we are facing a GPU lockup.

To avoid overhead of testing GPU lockup frequently due to fence
taking time to be signaled we query the lockup callback every
500msec. There is plenty code comment explaining the design & choise
inside the code.

This have been tested mostly on R3XX/R5XX hw, in normal running
destkop (compiz firefox, quake3 running) the lockup callback wasn't
call once (1 hour session). Also tested with forcing GPU lockup and
lockup was reported after the 1s CP activity timeout.

V2 switch to 500ms timeout so GPU lockup get call at least 2 times
in less than 2sec.
V3 store last jiffies in fence struct so on ERESTART, EBUSY we keep
track of how long we already wait for a given fence
V4 make sure we got up to date cp read pointer so we don't have
false positive

Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

drm/radeon/kms: display watermark fixes

- rs780/880 were using the wrong bandwidth functions
- convert r1xx-r4xx to use the same pm sclk/mclk structs as
r5xx+
- move bandwidth setup to a common function

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

drm/radeon/kms: init rdev->num_crtc at asic init

Replace hardcoded numbers with rdev->num_crtc.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

drm/radeon: move asic structs to radeon_asic.c

With these static structs gone, radeon_asic.h is a real header file
and can be used as such.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Dave Airlie <airlied@redhat.com>

drm/radeon: create radeon_asic.c

And move asic init plus a few related functions from radeon_device.c
to it. This file will hold all the asic structures in the future,
but atm they're still stuck in radeon_asic.h.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Dave Airlie <airlied@redhat.com>