Searched refs:sdmax_rlcx_rb_cntl (Results 1 - 18 of 18) sorted by relevance

/linux-master/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_amdkfd_arcturus.c139 m->sdmax_rlcx_rb_cntl & (~SDMA0_RLC0_RB_CNTL__RB_ENABLE_MASK));
186 data = REG_SET_FIELD(m->sdmax_rlcx_rb_cntl, SDMA0_RLC0_RB_CNTL,
H A Damdgpu_amdkfd_gc_9_4_3.c74 m->sdmax_rlcx_rb_cntl & (~SDMA_RLC0_RB_CNTL__RB_ENABLE_MASK));
121 data = REG_SET_FIELD(m->sdmax_rlcx_rb_cntl, SDMA_RLC0_RB_CNTL,
H A Damdgpu_amdkfd_gfx_v10_3.c374 m->sdmax_rlcx_rb_cntl & (~SDMA0_RLC0_RB_CNTL__RB_ENABLE_MASK));
421 data = REG_SET_FIELD(m->sdmax_rlcx_rb_cntl, SDMA0_RLC0_RB_CNTL,
H A Damdgpu_amdkfd_gfx_v8.c274 m->sdmax_rlcx_rb_cntl & (~SDMA0_RLC0_RB_CNTL__RB_ENABLE_MASK));
310 data = REG_SET_FIELD(m->sdmax_rlcx_rb_cntl, SDMA0_RLC0_RB_CNTL,
H A Damdgpu_amdkfd_gfx_v10.c388 m->sdmax_rlcx_rb_cntl & (~SDMA0_RLC0_RB_CNTL__RB_ENABLE_MASK));
435 data = REG_SET_FIELD(m->sdmax_rlcx_rb_cntl, SDMA0_RLC0_RB_CNTL,
H A Damdgpu_amdkfd_gfx_v11.c359 m->sdmax_rlcx_rb_cntl & (~SDMA0_QUEUE0_RB_CNTL__RB_ENABLE_MASK));
406 data = REG_SET_FIELD(m->sdmax_rlcx_rb_cntl, SDMA0_QUEUE0_RB_CNTL,
H A Damdgpu_amdkfd_gfx_v9.c399 m->sdmax_rlcx_rb_cntl & (~SDMA0_RLC0_RB_CNTL__RB_ENABLE_MASK));
446 data = REG_SET_FIELD(m->sdmax_rlcx_rb_cntl, SDMA0_RLC0_RB_CNTL,
H A Dsdma_v5_0.c923 m->sdmax_rlcx_rb_cntl =
H A Dsdma_v6_0.c774 m->sdmax_rlcx_rb_cntl =
H A Dsdma_v5_2.c763 m->sdmax_rlcx_rb_cntl =
/linux-master/drivers/gpu/drm/amd/amdkfd/
H A Dkfd_mqd_manager_v10.c368 m->sdmax_rlcx_rb_cntl = (ffs(q->queue_size / sizeof(unsigned int)) - 1)
H A Dkfd_mqd_manager_vi.c364 m->sdmax_rlcx_rb_cntl = order_base_2(q->queue_size / 4)
H A Dkfd_mqd_manager_v11.c427 m->sdmax_rlcx_rb_cntl = (ffs(q->queue_size / sizeof(unsigned int)) - 1)
H A Dkfd_mqd_manager_v9.c472 m->sdmax_rlcx_rb_cntl = order_base_2(q->queue_size / 4)
/linux-master/drivers/gpu/drm/amd/include/
H A Dvi_structs.h28 uint32_t sdmax_rlcx_rb_cntl; member in struct:vi_sdma_mqd
H A Dv9_structs.h28 uint32_t sdmax_rlcx_rb_cntl; member in struct:v9_sdma_mqd
H A Dv11_structs.h543 uint32_t sdmax_rlcx_rb_cntl; // offset: 0 (0x0) member in struct:v11_sdma_mqd
H A Dv10_structs.h543 uint32_t sdmax_rlcx_rb_cntl; member in struct:v10_sdma_mqd

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