| /linux-master/arch/mips/mm/ |
| H A D | sc-mips.c | 143 c->scache.linesz = 2 << tmp;
161 c->scache.sets = 64 << sets;
166 c->scache.linesz = 2 << line_sz;
170 c->scache.ways = assoc + 1;
171 c->scache.waysize = c->scache.sets * c->scache.linesz;
172 c->scache.waybit = __ffs(c->scache.waysize);
174 if (c->scache
[all...] |
| H A D | sc-rm7k.c | 237 c->scache.linesz = sc_lsize;
238 c->scache.ways = 4;
239 c->scache.waybit= __ffs(scache_size / c->scache.ways);
240 c->scache.waysize = scache_size / c->scache.ways;
241 c->scache.sets = scache_size / (c->scache.linesz * c->scache.ways);
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| H A D | c-r4k.c | 1434 c->scache.linesz = 16 << ((config & R4K_CONF_SB) >> 22);
1435 c->scache.ways = 1;
1436 c->scache.waybit = 0; /* does not matter */
1446 c->scache.linesz = 32;
1447 c->scache.ways = 4;
1448 c->scache.waybit = 0;
1449 c->scache.waysize = scache_size / (c->scache.ways);
1450 c->scache.sets = scache_size / (c->scache
[all...] |
| /linux-master/arch/sh/kernel/cpu/sh4/ |
| H A D | probe.c | 242 boot_cpu_data.scache.way_incr = (1 << 16);
243 boot_cpu_data.scache.entry_shift = 5;
244 boot_cpu_data.scache.ways = 4;
245 boot_cpu_data.scache.linesz = L1_CACHE_BYTES;
247 boot_cpu_data.scache.entry_mask =
248 (boot_cpu_data.scache.way_incr -
249 boot_cpu_data.scache.linesz);
251 boot_cpu_data.scache.sets = size /
252 (boot_cpu_data.scache.linesz *
253 boot_cpu_data.scache
[all...] |
| /linux-master/arch/mips/include/asm/ |
| H A D | r4kcache.h | 246 __BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 16, )
250 __BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 32, )
253 __BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 64, )
256 __BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 128, )
260 __BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 16, )
261 __BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 32, )
262 __BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 64, )
263 __BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 128, )
306 __BUILD_BLAST_CACHE_RANGE(s, scache, Hit_Writeback_Inv_SD, protected_, )
311 __BUILD_BLAST_CACHE_RANGE(s, scache, Hit_Writeback_Inv_S
[all...] |
| H A D | cpu-info.h | 77 struct cache_desc vcache; /* Victim cache, between pcache and scache */
78 struct cache_desc scache; /* Secondary cache */ member in struct:cpuinfo_mips
|
| H A D | cpu-features.h | 514 #define cpu_scache_line_size() cpu_data[0].scache.linesz
|
| /linux-master/arch/microblaze/kernel/cpu/ |
| H A D | cache.c | 509 struct scache *mbc;
512 static const struct scache wb_msr = {
528 static const struct scache wb_nomsr = {
544 static const struct scache wt_msr = {
559 static const struct scache wt_nomsr = {
575 static const struct scache wt_msr_noirq = {
590 static const struct scache wt_nomsr_noirq = {
614 mbc = (struct scache *)&wb_msr;
622 mbc = (struct scache *)&wt_msr_noirq;
625 mbc = (struct scache *)
[all...] |
| /linux-master/arch/mips/kernel/ |
| H A D | cacheinfo.c | 43 if (c->scache.waysize) {
103 if (c->scache.waysize) {
106 populate_cache(scache, this_leaf, level, CACHE_TYPE_UNIFIED);
|
| H A D | cpu-probe.c | 495 c->scache.flags &= ~MIPS_CACHE_NOT_PRESENT;
727 c->scache.flags = MIPS_CACHE_NOT_PRESENT;
1538 c->scache.ways = 8;
|
| /linux-master/arch/microblaze/include/asm/ |
| H A D | cacheflush.h | 31 struct scache { struct
49 extern struct scache *mbc;
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| /linux-master/arch/sh/mm/ |
| H A D | cache.c | 289 boot_cpu_data.scache.ways,
290 boot_cpu_data.scache.sets,
291 boot_cpu_data.scache.way_incr);
293 boot_cpu_data.scache.entry_mask,
294 boot_cpu_data.scache.alias_mask,
295 boot_cpu_data.scache.n_aliases);
309 compute_alias(&boot_cpu_data.scache);
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| /linux-master/arch/sh/include/asm/ |
| H A D | processor.h | 79 struct cache_info scache; /* Secondary cache */ member in struct:sh_cpuinfo
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| /linux-master/arch/sh/kernel/cpu/ |
| H A D | proc.c | 122 show_cacheinfo(m, "scache", c->scache);
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| H A D | init.c | 212 l2_cache_shape = CACHE_DESC_SHAPE(current_cpu_data.scache);
|