Searched refs:rx_reg (Results 1 - 16 of 16) sorted by relevance

/linux-master/include/linux/
H A Dpch_dma.h21 dma_addr_t rx_reg; member in struct:pch_dma_slave
/linux-master/arch/mips/include/asm/txx9/
H A Ddmac.h35 * @rx_reg: physical address of data register used for
41 u64 rx_reg; member in struct:txx9dmac_slave
/linux-master/drivers/mailbox/
H A Dplatform_mhu.c37 void __iomem *rx_reg; member in struct:platform_mhu_link
53 val = readl_relaxed(mlink->rx_reg + INTR_STAT_OFS);
59 writel_relaxed(val, mlink->rx_reg + INTR_CLR_OFS);
141 mhu->mlink[i].rx_reg = mhu->base + platform_mhu_reg[i];
142 mhu->mlink[i].tx_reg = mhu->mlink[i].rx_reg + TX_REG_OFFSET;
H A Darm_mhu.c31 void __iomem *rx_reg; member in struct:mhu_link
47 val = readl_relaxed(mlink->rx_reg + INTR_STAT_OFS);
53 writel_relaxed(val, mlink->rx_reg + INTR_CLR_OFS);
132 mhu->mlink[i].rx_reg = mhu->base + mhu_reg[i];
133 mhu->mlink[i].tx_reg = mhu->mlink[i].rx_reg + TX_REG_OFFSET;
H A Darm_mhu_db.c35 void __iomem *rx_reg; member in struct:mhu_db_link
78 void __iomem *base = chan_info->mhu->mlink[chan_info->pchan].rx_reg;
100 void __iomem *base = mhu->mlink[pchan].rx_reg;
314 mhu->mlink[i].rx_reg = mhu->base + mhu_reg[i];
315 mhu->mlink[i].tx_reg = mhu->mlink[i].rx_reg + TX_REG_OFFSET;
/linux-master/drivers/spi/
H A Dspi-orion.c385 void __iomem *tx_reg, *rx_reg, *int_reg; local
397 rx_reg = spi_reg(orion_spi, ORION_SPI_DATA_IN_REG);
419 *(*rx_buf)++ = readl(rx_reg);
434 void __iomem *tx_reg, *rx_reg, *int_reg; local
444 rx_reg = spi_reg(orion_spi, ORION_SPI_DATA_IN_REG);
461 put_unaligned(__le16_to_cpu(readl(rx_reg)), (*rx_buf)++);
H A Dspi-omap2-mcspi.c696 void __iomem *rx_reg; local
709 rx_reg = base + OMAP2_MCSPI_RX0;
744 *rx++ = readl_relaxed(rx_reg);
758 *rx++ = readl_relaxed(rx_reg);
793 *rx++ = readl_relaxed(rx_reg);
807 *rx++ = readl_relaxed(rx_reg);
842 *rx++ = readl_relaxed(rx_reg);
856 *rx++ = readl_relaxed(rx_reg);
H A Dspi-topcliff-pch.c859 param->rx_reg = data->io_base_addr + PCH_SPDRR;
/linux-master/drivers/net/ethernet/intel/ice/
H A Dice_base.c729 u32 rx_reg; local
731 rx_reg = rd32(hw, QRX_CTRL(pf_q));
734 if (ena == !!(rx_reg & QRX_CTRL_QENA_STAT_M))
739 rx_reg |= QRX_CTRL_QENA_REQ_M;
741 rx_reg &= ~QRX_CTRL_QENA_REQ_M;
742 wr32(hw, QRX_CTRL(pf_q), rx_reg);
H A Dice_lib.c2055 u32 rx_reg; local
2059 rx_reg = rd32(hw, QRX_CTRL(pf_q));
2060 if (rx_reg & QRX_CTRL_QENA_STAT_M)
/linux-master/drivers/net/phy/
H A Dmotorcomm.c795 u32 rx_reg, tx_reg; local
799 rx_reg = ytphy_get_delay_reg_value(phydev, "rx-internal-delay-ps",
812 val |= FIELD_PREP(YT8521_RC1R_RX_DELAY_MASK, rx_reg);
819 val |= FIELD_PREP(YT8521_RC1R_RX_DELAY_MASK, rx_reg) |
/linux-master/drivers/dma/
H A Dtxx9dmac.c845 desc->hwdesc.SAR = ds->rx_reg;
854 desc->hwdesc32.SAR = ds->rx_reg;
1011 (ds->tx_reg && ds->rx_reg) || (!ds->tx_reg && !ds->rx_reg))
H A Dpch_dma.c586 reg = pd_slave->rx_reg;
/linux-master/drivers/net/ethernet/marvell/
H A Dsky2.c900 u32 rx_reg; local
984 rx_reg = GMF_OPER_ON | GMF_RX_F_FL_ON;
987 rx_reg |= GMF_RX_OVER_ON;
989 sky2_write32(hw, SK_REG(port, RX_GMF_CTRL_T), rx_reg);
/linux-master/drivers/net/ethernet/intel/i40e/
H A Di40e_main.c4809 u32 rx_reg; local
4812 rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q));
4813 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
4837 u32 rx_reg; local
4841 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
4842 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) ==
4843 ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1))
4849 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
4854 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK;
4856 rx_reg
[all...]
/linux-master/drivers/tty/serial/
H A Dpch_uart.c702 param->rx_reg = port->mapbase + UART_RX;

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