Searched refs:rx_delay (Results 1 - 19 of 19) sorted by relevance

/linux-master/drivers/net/ethernet/stmicro/stmmac/
H A Ddwmac-mediatek.c71 u32 rx_delay; member in struct:mac_delay_struct
151 mac_delay->rx_delay /= 550;
159 mac_delay->rx_delay /= 170;
176 mac_delay->rx_delay *= 550;
184 mac_delay->rx_delay *= 170;
205 delay_val |= FIELD_PREP(ETH_DLY_RXC_ENABLE, !!mac_delay->rx_delay);
206 delay_val |= FIELD_PREP(ETH_DLY_RXC_STAGES, mac_delay->rx_delay);
216 delay_val |= FIELD_PREP(ETH_DLY_TXC_ENABLE, !!mac_delay->rx_delay);
217 delay_val |= FIELD_PREP(ETH_DLY_TXC_STAGES, mac_delay->rx_delay);
227 * received signal, so rx_delay/rx_in
[all...]
H A Ddwmac-rk.c31 int tx_delay, int rx_delay);
80 int rx_delay; member in struct:rk_priv_data
184 int tx_delay, int rx_delay)
197 DELAY_ENABLE(RK3128, tx_delay, rx_delay) |
198 RK3128_GMAC_CLK_RX_DL_CFG(rx_delay) |
300 int tx_delay, int rx_delay)
312 DELAY_ENABLE(RK3228, tx_delay, rx_delay));
315 RK3228_GMAC_CLK_RX_DL_CFG(rx_delay) |
422 int tx_delay, int rx_delay)
435 DELAY_ENABLE(RK3288, tx_delay, rx_delay) |
183 rk3128_set_to_rgmii(struct rk_priv_data *bsp_priv, int tx_delay, int rx_delay) argument
299 rk3228_set_to_rgmii(struct rk_priv_data *bsp_priv, int tx_delay, int rx_delay) argument
421 rk3288_set_to_rgmii(struct rk_priv_data *bsp_priv, int tx_delay, int rx_delay) argument
585 rk3328_set_to_rgmii(struct rk_priv_data *bsp_priv, int tx_delay, int rx_delay) argument
713 rk3366_set_to_rgmii(struct rk_priv_data *bsp_priv, int tx_delay, int rx_delay) argument
824 rk3368_set_to_rgmii(struct rk_priv_data *bsp_priv, int tx_delay, int rx_delay) argument
935 rk3399_set_to_rgmii(struct rk_priv_data *bsp_priv, int tx_delay, int rx_delay) argument
1039 rk3568_set_to_rgmii(struct rk_priv_data *bsp_priv, int tx_delay, int rx_delay) argument
1162 rk3588_set_to_rgmii(struct rk_priv_data *bsp_priv, int tx_delay, int rx_delay) argument
1347 rv1126_set_to_rgmii(struct rk_priv_data *bsp_priv, int tx_delay, int rx_delay) argument
[all...]
H A Ddwmac-ingenic.c62 int rx_delay; member in struct:ingenic_mac
213 if (mac->rx_delay == 0)
217 FIELD_PREP(MACPHYC_RX_DELAY_MASK, (mac->rx_delay + 9750) / 19500 - 1);
278 mac->rx_delay = rx_delay_ps * 1000;
/linux-master/drivers/net/phy/
H A Dnxp-c45-tja11xx.h26 u32 rx_delay; member in struct:nxp_c45_phy
H A Dnxp-c45-tja11xx.c1447 u64 rx_delay = priv->rx_delay; local
1462 degree = div_u64(rx_delay, PS_PER_DEGREE);
1496 &priv->rx_delay);
1498 priv->rx_delay = DEFAULT_ID_PS;
1500 ret = nxp_c45_check_delay(phydev, priv->rx_delay);
/linux-master/drivers/net/dsa/sja1105/
H A Dsja1105_clocking.c518 int rx_delay = priv->rgmii_rx_delay_ps[port]; local
523 if (rx_delay)
524 pad_mii_id.rxc_delay = SJA1105_RGMII_DELAY_PS_TO_HW(rx_delay);
541 if (rx_delay) {
560 int rx_delay = priv->rgmii_rx_delay_ps[port]; local
567 if (rx_delay) {
568 pad_mii_id.rxc_delay = SJA1105_RGMII_DELAY_PS_TO_HW(rx_delay);
H A Dsja1105_main.c1137 int rx_delay = -1, tx_delay = -1; local
1142 of_property_read_u32(port_dn, "rx-internal-delay-ps", &rx_delay);
1145 if (rx_delay == -1 && tx_delay == -1 && priv->fixed_link[port]) {
1154 rx_delay = 2000;
1161 if (rx_delay < 0)
1162 rx_delay = 0;
1166 if ((rx_delay || tx_delay) && !priv->info->setup_rgmii_delay) {
1171 if ((rx_delay && rx_delay < SJA1105_RGMII_DELAY_MIN_PS) ||
1173 (rx_delay > SJA1105_RGMII_DELAY_MAX_P
[all...]
/linux-master/drivers/isdn/mISDN/
H A Ddsp.h202 int rx_delay[MAX_SECONDS_JITTER_CHECK]; member in struct:dsp
H A Ddsp_cmx.c1742 /* check current rx_delay */
1747 if (delay < dsp->rx_delay[0])
1748 dsp->rx_delay[0] = delay;
1758 delay = dsp->rx_delay[0];
1761 if (delay > dsp->rx_delay[i])
1762 delay = dsp->rx_delay[i];
1766 * remove rx_delay only if we have delay AND we
1773 "%s lowest rx_delay of %d bytes for"
1823 dsp->rx_delay[i] = dsp->rx_delay[
[all...]
/linux-master/drivers/phy/microchip/
H A Dlan966x_serdes.c401 bool rx_delay = false; local
416 rx_delay = true;
424 HSIO_DLL_CFG_DLL_ENA_SET(rx_delay),
429 lan_rmw(HSIO_DLL_CFG_DELAY_ENA_SET(rx_delay),
/linux-master/drivers/staging/octeon/
H A Dethernet.c645 bool rx_delay; local
651 rx_delay = true;
656 rx_delay = delay_value > 0;
663 if (!rx_delay && !tx_delay)
665 else if (!rx_delay)
/linux-master/drivers/net/ethernet/apm/xgene/
H A Dxgene_enet_main.h234 u8 rx_delay; member in struct:xgene_enet_pdata
H A Dxgene_enet_hw.c491 CFG_RXCLK_MUXSEL0_SET(&rgmii, pdata->rx_delay);
H A Dxgene_enet_main.c1607 pdata->rx_delay = 2;
1616 pdata->rx_delay = delay;
/linux-master/drivers/net/phy/mscc/
H A Dmscc_main.c535 s32 rx_delay; local
551 rx_delay = phy_get_internal_delay(phydev, dev, vsc85xx_internal_delay,
553 if (rx_delay < 0) {
556 rx_delay = RGMII_CLK_DELAY_2_0_NS;
558 rx_delay = RGMII_CLK_DELAY_0_2_NS;
571 reg_val |= rx_delay << rgmii_rx_delay_pos;
/linux-master/arch/mips/cavium-octeon/
H A Docteon-platform.c610 static void __init _octeon_rx_tx_delay(int eth, int rx_delay, int tx_delay) argument
613 rx_delay);
/linux-master/drivers/net/dsa/microchip/
H A Dksz_common.c3985 int rx_delay = -1, tx_delay = -1; local
3990 of_property_read_u32(port_dn, "rx-internal-delay-ps", &rx_delay);
3993 if (rx_delay == -1 && tx_delay == -1) {
4002 rx_delay = 2000;
4009 if (rx_delay < 0)
4010 rx_delay = 0;
4014 dev->ports[port_num].rgmii_rx_val = rx_delay;
/linux-master/drivers/net/wireless/ath/ath9k/
H A Dar9003_calib.c1401 u32 rx_delay = 0; local
1478 rx_delay = REG_READ(ah, AR_PHY_RX_DELAY);
1501 REG_WRITE(ah, AR_PHY_RX_DELAY, rx_delay);
/linux-master/drivers/net/dsa/realtek/
H A Drtl8365mb.c877 int rx_delay = 0; local
923 rx_delay = val;
934 FIELD_PREP(RTL8365MB_EXT_RGMXF_RXDELAY_MASK, rx_delay));

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