Lines Matching refs:rx_delay

71 	u32 rx_delay;
151 mac_delay->rx_delay /= 550;
159 mac_delay->rx_delay /= 170;
176 mac_delay->rx_delay *= 550;
184 mac_delay->rx_delay *= 170;
205 delay_val |= FIELD_PREP(ETH_DLY_RXC_ENABLE, !!mac_delay->rx_delay);
206 delay_val |= FIELD_PREP(ETH_DLY_RXC_STAGES, mac_delay->rx_delay);
216 delay_val |= FIELD_PREP(ETH_DLY_TXC_ENABLE, !!mac_delay->rx_delay);
217 delay_val |= FIELD_PREP(ETH_DLY_TXC_STAGES, mac_delay->rx_delay);
227 * received signal, so rx_delay/rx_inv are used to indicate
235 delay_val |= FIELD_PREP(ETH_DLY_RXC_ENABLE, !!mac_delay->rx_delay);
236 delay_val |= FIELD_PREP(ETH_DLY_RXC_STAGES, mac_delay->rx_delay);
243 delay_val |= FIELD_PREP(ETH_DLY_TXC_ENABLE, !!mac_delay->rx_delay);
244 delay_val |= FIELD_PREP(ETH_DLY_TXC_STAGES, mac_delay->rx_delay);
265 delay_val |= FIELD_PREP(ETH_DLY_RXC_ENABLE, !!mac_delay->rx_delay);
266 delay_val |= FIELD_PREP(ETH_DLY_RXC_STAGES, mac_delay->rx_delay);
331 mac_delay->rx_delay /= 290;
340 mac_delay->rx_delay *= 290;
356 delay_val |= FIELD_PREP(MT8195_DLY_RXC_ENABLE, !!mac_delay->rx_delay);
357 delay_val |= FIELD_PREP(MT8195_DLY_RXC_STAGES, mac_delay->rx_delay);
375 !!mac_delay->rx_delay);
377 mac_delay->rx_delay);
384 * received signal, so rx_delay/rx_inv are used to indicate
393 !!mac_delay->rx_delay);
395 mac_delay->rx_delay);
404 !!mac_delay->rx_delay);
406 mac_delay->rx_delay);
420 delay_val |= FIELD_PREP(MT8195_DLY_RXC_ENABLE, !!mac_delay->rx_delay);
421 delay_val |= FIELD_PREP(MT8195_DLY_RXC_STAGES, mac_delay->rx_delay);
484 mac_delay->rx_delay = rx_delay_ps;