| /linux-master/drivers/net/ethernet/hisilicon/hns3/hns3pf/ |
| H A D | hclge_err.c | 12 .reset_level = HNAE3_NONE_RESET
16 .reset_level = HNAE3_NONE_RESET
20 .reset_level = HNAE3_NONE_RESET
24 .reset_level = HNAE3_NONE_RESET
28 .reset_level = HNAE3_NONE_RESET
32 .reset_level = HNAE3_NONE_RESET
36 .reset_level = HNAE3_NONE_RESET
40 .reset_level = HNAE3_NONE_RESET
44 .reset_level = HNAE3_NONE_RESET
54 .reset_level
[all...] |
| H A D | hclge_err.h | 188 enum hnae3_reset_type reset_level; member in struct:hclge_hw_error
|
| H A D | hclge_main.h | 876 enum hnae3_reset_type reset_level; member in struct:hclge_dev
|
| H A D | hclge_main.c | 4197 enum hnae3_reset_type reset_level; local
4209 reset_level = hclge_get_reset_level(ae_dev,
4211 if (reset_level != HNAE3_NONE_RESET)
4212 set_bit(reset_level, &hdev->reset_request);
4395 hdev->reset_level =
4399 hdev->reset_level = HNAE3_FUNC_RESET;
4403 hdev->reset_level);
4406 set_bit(hdev->reset_level, &hdev->reset_request);
4409 if (hdev->reset_level < HNAE3_GLOBAL_RESET)
4410 hdev->reset_level
11784 enum hnae3_reset_type reset_level; local
[all...] |
| /linux-master/drivers/net/ethernet/mellanox/mlx5/core/ |
| H A D | fw_reset.h | 9 int mlx5_fw_reset_query(struct mlx5_core_dev *dev, u8 *reset_level, u8 *reset_type);
|
| H A D | fw_reset.c | 82 static int mlx5_reg_mfrl_set(struct mlx5_core_dev *dev, u8 reset_level, argument
88 MLX5_SET(mfrl_reg, in, reset_level, reset_level);
96 static int mlx5_reg_mfrl_query(struct mlx5_core_dev *dev, u8 *reset_level, argument
107 if (reset_level)
108 *reset_level = MLX5_GET(mfrl_reg, out, reset_level);
117 int mlx5_fw_reset_query(struct mlx5_core_dev *dev, u8 *reset_level, u8 *reset_type) argument
119 return mlx5_reg_mfrl_query(dev, reset_level, reset_type, NULL);
164 MLX5_SET(mfrl_reg, in, reset_level, MLX5_MFRL_REG_RESET_LEVEL
[all...] |
| H A D | devlink.c | 87 u8 reset_level, reset_type, net_port_alive; local
90 err = mlx5_fw_reset_query(dev, &reset_level, &reset_type);
93 if (!(reset_level & MLX5_MFRL_REG_RESET_LEVEL3)) {
119 u8 reset_level; local
122 err = mlx5_fw_reset_query(dev, &reset_level, NULL);
125 if (!(reset_level & MLX5_MFRL_REG_RESET_LEVEL0)) {
|
| /linux-master/drivers/net/ethernet/intel/ice/ |
| H A D | ice_fw_update.c | 27 u8 reset_level; member in struct:ice_fwu_priv
272 * @reset_level: storage for reset level required
292 u8 *reset_level, struct netlink_ext_ack *extack)
366 if (reset_level && last_cmd && module == ICE_SR_1ST_NVM_BANK_PTR) {
368 *reset_level = desc->params.nvm.cmd_flags &
371 *reset_level);
373 *reset_level = ICE_AQC_NVM_POR_FLAG;
388 * @reset_level: storage for reset level required
401 const u8 *image, u32 length, u8 *reset_level,
435 block, last_cmd, reset_level,
290 ice_write_one_nvm_block(struct ice_pf *pf, u16 module, u32 offset, u16 block_size, u8 *block, bool last_cmd, u8 *reset_level, struct netlink_ext_ack *extack) argument
400 ice_write_nvm_module(struct ice_pf *pf, u16 module, const char *component, const u8 *image, u32 length, u8 *reset_level, struct netlink_ext_ack *extack) argument
638 u8 *reset_level; local
[all...] |
| /linux-master/drivers/net/ethernet/intel/i40e/ |
| H A D | i40e_client.c | 24 u32 reset_level);
627 * @reset_level: reset level
631 u32 reset_level)
635 switch (reset_level) {
645 pf->hw.pf_id, reset_level);
629 i40e_client_request_reset(struct i40e_info *ldev, struct i40e_client *client, u32 reset_level) argument
|
| /linux-master/drivers/net/ethernet/hisilicon/hns3/hns3vf/ |
| H A D | hclgevf_main.h | 219 enum hnae3_reset_type reset_level; member in struct:hclgevf_dev
|
| H A D | hclgevf_main.c | 1641 hdev->reset_level =
1644 hdev->reset_level = HNAE3_VF_FUNC_RESET;
1821 set_bit(hdev->reset_level, &hdev->reset_pending);
2882 hdev->reset_level = HNAE3_VF_FUNC_RESET;
|
| /linux-master/drivers/soc/tegra/ |
| H A D | pmc.c | 2192 static DEVICE_ATTR_RO(reset_level);
2211 "failed to create attr \"reset_level\": %d\n",
|
| /linux-master/include/linux/mlx5/ |
| H A D | mlx5_ifc.h | 10962 u8 reset_level[0x8]; member in struct:mlx5_ifc_mfrl_reg_bits
|