Searched refs:reset_domain (Results 1 - 19 of 19) sorted by relevance
/linux-master/drivers/gpu/drm/amd/amdgpu/ |
H A D | amdgpu_reset.c | 114 struct amdgpu_reset_domain *reset_domain = container_of(ref, local 117 if (reset_domain->wq) 118 destroy_workqueue(reset_domain->wq); 120 kvfree(reset_domain); 126 struct amdgpu_reset_domain *reset_domain; local 128 reset_domain = kvzalloc(sizeof(struct amdgpu_reset_domain), GFP_KERNEL); 129 if (!reset_domain) { 134 reset_domain->type = type; 135 kref_init(&reset_domain->refcount); 137 reset_domain 152 amdgpu_device_lock_reset_domain(struct amdgpu_reset_domain *reset_domain) argument 159 amdgpu_device_unlock_reset_domain(struct amdgpu_reset_domain *reset_domain) argument [all...] |
H A D | amdgpu_reset.h | 140 void amdgpu_device_lock_reset_domain(struct amdgpu_reset_domain *reset_domain); 142 void amdgpu_device_unlock_reset_domain(struct amdgpu_reset_domain *reset_domain);
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H A D | amdgpu_xgmi.h | 45 struct amdgpu_reset_domain *reset_domain; member in struct:amdgpu_hive_info
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H A D | mxgpu_ai.c | 262 if (atomic_cmpxchg(&adev->reset_domain->in_gpu_reset, 0, 1) != 0) 265 down_write(&adev->reset_domain->sem); 280 atomic_set(&adev->reset_domain->in_gpu_reset, 0); 281 up_write(&adev->reset_domain->sem); 321 WARN_ONCE(!amdgpu_reset_domain_schedule(adev->reset_domain,
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H A D | mxgpu_nv.c | 295 if (atomic_cmpxchg(&adev->reset_domain->in_gpu_reset, 0, 1) != 0) 298 down_write(&adev->reset_domain->sem); 313 atomic_set(&adev->reset_domain->in_gpu_reset, 0); 314 up_write(&adev->reset_domain->sem); 360 WARN_ONCE(!amdgpu_reset_domain_schedule(adev->reset_domain,
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H A D | amdgpu_ras_eeprom.c | 268 down_read(&adev->reset_domain->sem); 273 up_read(&adev->reset_domain->sem); 329 down_read(&adev->reset_domain->sem); 334 up_read(&adev->reset_domain->sem); 581 down_read(&adev->reset_domain->sem); 587 up_read(&adev->reset_domain->sem); 761 down_read(&adev->reset_domain->sem); 766 up_read(&adev->reset_domain->sem); 871 down_read(&adev->reset_domain->sem); 877 up_read(&adev->reset_domain [all...] |
H A D | amdgpu_amdkfd_arcturus.c | 321 if (!down_read_trylock(&adev->reset_domain->sem)) 339 up_read(&adev->reset_domain->sem);
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H A D | amdgpu_xgmi.c | 347 amdgpu_reset_put_reset_domain(hive->reset_domain); 348 hive->reset_domain = NULL; 632 * Only init hive->reset_domain for none SRIOV configuration. For SRIOV, 643 if (adev->reset_domain->type != XGMI_HIVE) { 644 hive->reset_domain = 646 if (!hive->reset_domain) { 654 amdgpu_reset_get_reset_domain(adev->reset_domain); 655 hive->reset_domain = adev->reset_domain;
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H A D | amdgpu_debugfs.c | 1673 r = down_write_killable(&adev->reset_domain->sem); 1702 up_write(&adev->reset_domain->sem); 1938 r = down_read_killable(&adev->reset_domain->sem); 1979 up_read(&adev->reset_domain->sem); 2040 ret = down_read_killable(&adev->reset_domain->sem); 2046 up_read(&adev->reset_domain->sem); 2051 ret = down_read_killable(&adev->reset_domain->sem); 2056 up_read(&adev->reset_domain->sem); 2098 ret = down_write_killable(&adev->reset_domain->sem); 2105 up_write(&adev->reset_domain [all...] |
H A D | amdgpu_device.c | 508 if (down_read_trylock(&adev->reset_domain->sem)) 509 up_read(&adev->reset_domain->sem); 511 lockdep_assert_held(&adev->reset_domain->sem); 537 down_read_trylock(&adev->reset_domain->sem)) { 539 up_read(&adev->reset_domain->sem); 605 down_read_trylock(&adev->reset_domain->sem)) { 607 up_read(&adev->reset_domain->sem); 664 down_read_trylock(&adev->reset_domain->sem)) { 666 up_read(&adev->reset_domain->sem); 736 down_read_trylock(&adev->reset_domain [all...] |
H A D | amdgpu_gmc.c | 631 if (!down_read_trylock(&adev->reset_domain->sem)) 644 up_read(&adev->reset_domain->sem); 691 !down_read_trylock(&adev->reset_domain->sem)) { 745 up_read(&adev->reset_domain->sem);
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H A D | amdgpu_fence.c | 957 if (amdgpu_reset_domain_schedule(adev->reset_domain, &adev->reset_work)) 960 *val = atomic_read(&adev->reset_domain->reset_res);
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H A D | mxgpu_vi.c | 564 WARN_ONCE(!amdgpu_reset_domain_schedule(adev->reset_domain,
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H A D | amdgpu_amdkfd.c | 287 amdgpu_reset_domain_schedule(adev->reset_domain,
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H A D | amdgpu.h | 1134 struct amdgpu_reset_domain *reset_domain; member in struct:amdgpu_device
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H A D | amdgpu_ras.c | 3668 amdgpu_reset_domain_schedule(ras->adev->reset_domain, &ras->recovery_work);
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/linux-master/drivers/gpu/drm/i915/gt/ |
H A D | intel_engine_types.h | 372 u32 reset_domain; member in struct:intel_engine_cs
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H A D | intel_engine_cs.c | 398 u32 reset_domain; local 432 reset_domain = engine_reset_domains[id]; 443 reset_domain = engine_reset_domains[id]; 446 return reset_domain; 484 engine->reset_domain = get_reset_domain(GRAPHICS_VER(gt->i915),
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H A D | intel_reset.c | 335 hw_mask |= engine->reset_domain; 536 reset_mask |= engine->reset_domain;
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