Searched refs:reg_shift (Results 1 - 25 of 61) sorted by relevance

123

/linux-master/include/linux/platform_data/
H A Data-pxa.h15 uint32_t reg_shift; member in struct:pata_pxa_pdata
H A Di2c-ocores.h12 u32 reg_shift; /* register offset shift value */ member in struct:ocores_i2c_platform_data
H A Dserial-sccnxp.h77 const u8 reg_shift; member in struct:sccnxp_pdata
/linux-master/arch/powerpc/boot/
H A Dns16550.c32 static u32 reg_shift; variable
36 out_8(reg_base + (UART_FCR << reg_shift), 0x06);
42 while ((in_8(reg_base + (UART_LSR << reg_shift)) & UART_LSR_THRE) == 0);
48 while ((in_8(reg_base + (UART_LSR << reg_shift)) & UART_LSR_DR) == 0);
54 return ((in_8(reg_base + (UART_LSR << reg_shift)) & UART_LSR_DR) != 0);
71 n = getprop(devp, "reg-shift", &reg_shift, sizeof(reg_shift));
72 if (n != sizeof(reg_shift))
73 reg_shift = 0;
75 reg_shift
[all...]
/linux-master/arch/mips/include/asm/
H A Dsetup.h13 unsigned int reg_shift, unsigned int timeout);
16 unsigned int reg_shift, unsigned int timeout) {}
15 setup_8250_early_printk_port(unsigned long base, unsigned int reg_shift, unsigned int timeout) argument
/linux-master/drivers/pinctrl/
H A Dpinctrl-mcp23s08_i2c.c26 mcp->reg_shift = info->reg_shift;
50 .reg_shift = 0,
58 .reg_shift = 1,
66 .reg_shift = 1,
H A Dpinctrl-mcp23s08.h30 bool reg_shift; member in struct:mcp23s08_info
36 bool reg_shift; member in struct:mcp23s08
H A Dpinctrl-mcp23s08_spi.c122 mcp->reg_shift = info->reg_shift;
203 .reg_shift = 0,
210 .reg_shift = 1,
218 .reg_shift = 1,
/linux-master/arch/mips/kernel/
H A Dearly_printk_8250.c16 void setup_8250_early_printk_port(unsigned long base, unsigned int reg_shift, argument
20 serial8250_reg_shift = reg_shift;
/linux-master/drivers/ata/
H A Dpata_falcon.c132 int irq = 0, io_offset = 1, reg_shift = 2; /* Falcon defaults */ local
178 reg_shift = 0;
186 ap->ioaddr.error_addr = base + io_offset + (1 << reg_shift);
187 ap->ioaddr.feature_addr = base + io_offset + (1 << reg_shift);
188 ap->ioaddr.nsect_addr = base + io_offset + (2 << reg_shift);
189 ap->ioaddr.lbal_addr = base + io_offset + (3 << reg_shift);
190 ap->ioaddr.lbam_addr = base + io_offset + (4 << reg_shift);
191 ap->ioaddr.lbah_addr = base + io_offset + (5 << reg_shift);
192 ap->ioaddr.device_addr = base + io_offset + (6 << reg_shift);
193 ap->ioaddr.status_addr = base + io_offset + (7 << reg_shift);
[all...]
H A Dpata_of_platform.c29 unsigned int reg_shift = 0; local
59 of_property_read_u32(dn, "reg-shift", &reg_shift);
76 reg_shift, pio_mask, &pata_platform_sht,
H A Dpata_pxa.c236 (ATA_REG_DATA << pdata->reg_shift);
238 (ATA_REG_ERR << pdata->reg_shift);
240 (ATA_REG_FEATURE << pdata->reg_shift);
242 (ATA_REG_NSECT << pdata->reg_shift);
244 (ATA_REG_LBAL << pdata->reg_shift);
246 (ATA_REG_LBAM << pdata->reg_shift);
248 (ATA_REG_LBAH << pdata->reg_shift);
250 (ATA_REG_DEVICE << pdata->reg_shift);
252 (ATA_REG_STATUS << pdata->reg_shift);
254 (ATA_REG_CMD << pdata->reg_shift);
[all...]
/linux-master/include/linux/
H A D8250_pci.h28 unsigned int reg_shift; member in struct:pciserial_board
/linux-master/drivers/net/ethernet/stmicro/stmmac/
H A Ddwmac-socfpga.c51 u32 reg_shift; member in struct:socfpga_dwmac
107 u32 reg_offset, reg_shift; local
128 ret = of_property_read_u32_index(np, "altr,sysmgr-syscon", 2, &reg_shift);
130 dev_info(dev, "Could not read reg_shift from sysmgr-syscon!\n");
222 dwmac->reg_shift = reg_shift;
277 u32 reg_shift = dwmac->reg_shift; local
297 ctrl &= ~(SYSMGR_EMACGRP_CTRL_PHYSEL_MASK << reg_shift);
298 ctrl |= val << reg_shift;
335 u32 reg_shift = dwmac->reg_shift; local
[all...]
/linux-master/drivers/input/misc/
H A Diqs7222.c798 int reg_shift; member in struct:iqs7222_prop_desc
812 .reg_shift = 8,
820 .reg_shift = 0,
828 .reg_shift = 6,
836 .reg_shift = 5,
843 .reg_shift = 4,
850 .reg_shift = 3,
857 .reg_shift = 0,
866 .reg_shift = 10,
873 .reg_shift
2073 int reg_shift = iqs7222_props[i].reg_shift; local
[all...]
/linux-master/drivers/gpio/
H A Dgpio-adnp.c15 #define GPIO_DDR(gpio) (0x00 << (gpio)->reg_shift)
16 #define GPIO_PLR(gpio) (0x01 << (gpio)->reg_shift)
17 #define GPIO_IER(gpio) (0x02 << (gpio)->reg_shift)
18 #define GPIO_ISR(gpio) (0x03 << (gpio)->reg_shift)
19 #define GPIO_PTR(gpio) (0x04 << (gpio)->reg_shift)
24 unsigned int reg_shift; member in struct:adnp
69 unsigned int reg = offset >> adnp->reg_shift;
83 unsigned int reg = offset >> adnp->reg_shift;
112 unsigned int reg = offset >> adnp->reg_shift;
149 unsigned int reg = offset >> adnp->reg_shift;
[all...]
H A Dgpio-creg-snps.c34 u32 reg, reg_shift, value; local
40 reg_shift = layout->shift[offset];
42 reg_shift += layout->bit_per_gpio[i] + layout->shift[i];
46 reg &= ~(GENMASK(layout->bit_per_gpio[i] - 1, 0) << reg_shift);
47 reg |= (value << reg_shift);
H A Dgpio-htc-egpio.c37 int reg_shift; /* bit shift */ member in struct:egpio_info
123 return bit >> ei->reg_shift;
128 return 1 << (bit & ((1 << ei->reg_shift)-1));
189 shift = pos << ei->reg_shift;
241 shift += (1<<ei->reg_shift)) {
298 ei->reg_shift = fls(pdata->reg_width - 1);
299 pr_debug("reg_shift = %d\n", ei->reg_shift);
/linux-master/drivers/mmc/host/
H A Ddw_mmc-pltfm.c27 #define SYSMGR_SDMMC_CTRL_SET(smplsel, drvsel, reg_shift) \
28 ((((smplsel) & 0x7) << reg_shift) | (((drvsel) & 0x7) << 0))
74 u32 clk_phase[2] = {0}, reg_offset, reg_shift; local
88 of_property_read_u32_index(np, "altr,sysmgr-syscon", 2, &reg_shift);
93 hs_timing = SYSMGR_SDMMC_CTRL_SET(clk_phase[0], clk_phase[1], reg_shift);
/linux-master/drivers/i2c/busses/
H A Di2c-ocores.c36 u32 reg_shift; member in struct:ocores_i2c
91 iowrite8(value, i2c->base + (reg << i2c->reg_shift));
96 iowrite16(value, i2c->base + (reg << i2c->reg_shift));
101 iowrite32(value, i2c->base + (reg << i2c->reg_shift));
106 iowrite16be(value, i2c->base + (reg << i2c->reg_shift));
111 iowrite32be(value, i2c->base + (reg << i2c->reg_shift));
116 return ioread8(i2c->base + (reg << i2c->reg_shift));
121 return ioread16(i2c->base + (reg << i2c->reg_shift));
126 return ioread32(i2c->base + (reg << i2c->reg_shift));
131 return ioread16be(i2c->base + (reg << i2c->reg_shift));
[all...]
/linux-master/include/linux/ssb/
H A Dssb_driver_mips.h14 unsigned int reg_shift; member in struct:ssb_serial_port
/linux-master/arch/mips/bcm47xx/
H A Dserial.c45 p->regshift = ssb_port->reg_shift;
71 p->regshift = bcma_port->reg_shift;
/linux-master/drivers/gpu/drm/msm/disp/dpu1/
H A Ddpu_hw_vbif.c161 u32 reg_lvl, reg_val, reg_val_lvl, mask, reg_high, reg_shift; local
170 reg_shift = (xin_id & 0x7) * 4;
175 mask = 0x7 << reg_shift;
178 reg_val |= (remap_level << reg_shift) & mask;
181 reg_val_lvl |= (remap_level << reg_shift) & mask;
/linux-master/drivers/thermal/broadcom/
H A Dbrcmstb_thermal.c75 int reg_shift; member in struct:avs_tmon_trip
85 .reg_shift = AVS_TMON_INT_THRESH_low_shift,
93 .reg_shift = AVS_TMON_INT_THRESH_high_shift,
101 .reg_shift = AVS_TMON_RESET_THRESH_shift,
198 val >>= trip->reg_shift;
216 val <<= trip->reg_shift;
/linux-master/arch/arm/mach-omap2/
H A Dprm2xxx.c63 while (p->reg_shift >= 0 && p->std_shift >= 0) {
64 if (v & (1 << p->reg_shift))

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