Lines Matching refs:reg_shift
798 int reg_shift;
812 .reg_shift = 8,
820 .reg_shift = 0,
828 .reg_shift = 6,
836 .reg_shift = 5,
843 .reg_shift = 4,
850 .reg_shift = 3,
857 .reg_shift = 0,
866 .reg_shift = 10,
873 .reg_shift = 4,
881 .reg_shift = 0,
889 .reg_shift = 13,
897 .reg_shift = 2,
905 .reg_shift = 9,
913 .reg_shift = 0,
921 .reg_shift = 0,
929 .reg_shift = 12,
937 .reg_shift = 11,
944 .reg_shift = 10,
951 .reg_shift = 9,
958 .reg_shift = 3,
965 .reg_shift = 2,
972 .reg_shift = 0,
980 .reg_shift = 8,
989 .reg_shift = 3,
998 .reg_shift = 0,
1007 .reg_shift = 9,
1015 .reg_shift = 5,
1023 .reg_shift = 0,
1031 .reg_shift = 11,
1039 .reg_shift = 0,
1048 .reg_shift = 12,
1057 .reg_shift = 8,
1066 .reg_shift = 0,
1076 .reg_shift = 0,
1085 .reg_shift = 8,
1093 .reg_shift = 12,
1101 .reg_shift = 8,
1109 .reg_shift = 4,
1117 .reg_shift = 0,
1125 .reg_shift = 4,
1133 .reg_shift = 0,
1141 .reg_shift = 8,
1150 .reg_shift = 6,
1158 .reg_shift = 3,
1167 .reg_shift = 7,
1175 .reg_shift = 4,
1183 .reg_shift = 8,
1191 .reg_shift = 0,
1200 .reg_shift = 8,
1210 .reg_shift = 8,
1220 .reg_shift = 3,
1230 .reg_shift = 3,
1240 .reg_shift = 8,
1250 .reg_shift = 8,
1260 .reg_shift = 0,
1270 .reg_shift = 0,
1279 .reg_shift = 4,
1289 .reg_shift = 0,
1299 .reg_shift = 8,
1307 .reg_shift = 0,
1315 .reg_shift = 8,
1323 .reg_shift = 0,
1331 .reg_shift = 8,
1340 .reg_shift = 0,
1349 .reg_shift = 8,
1359 .reg_shift = 8,
1369 .reg_shift = 0,
1379 .reg_shift = 0,
1388 .reg_shift = 0,
1396 .reg_shift = 1,
1403 .reg_shift = 0,
1412 .reg_shift = 0,
1420 .reg_shift = 0,
1428 .reg_shift = 0,
1437 .reg_shift = 0,
1445 .reg_shift = 0,
1454 .reg_shift = 0,
1462 .reg_shift = 0,
2073 int reg_shift = iqs7222_props[i].reg_shift;
2097 setup[reg_offset] |= BIT(reg_shift);
2099 setup[reg_offset] &= ~BIT(reg_shift);
2107 setup[reg_offset] &= ~BIT(reg_shift);
2109 setup[reg_offset] |= BIT(reg_shift);
2130 setup[reg_offset] &= ~GENMASK(reg_shift + reg_width - 1,
2131 reg_shift);
2132 setup[reg_offset] |= (val / val_pitch << reg_shift);