Searched refs:reg_addr (Results 1 - 25 of 57) sorted by relevance

123

/freebsd-11-stable/sys/contrib/octeon-sdk/
H A Dcvmx-ixf18201.h59 * @param reg_addr Register address
63 uint16_t cvmx_ixf18201_read16(uint16_t reg_addr);
67 * @param reg_addr Register address
71 void cvmx_ixf18201_write16(uint16_t reg_addr, uint16_t data);
75 * @param reg_addr Register address (must be 4 byte aligned)
79 uint32_t cvmx_ixf18201_read32(uint16_t reg_addr);
83 * @param reg_addr Register address (must be 4 byte aligned)
87 void cvmx_ixf18201_write32(uint16_t reg_addr, uint32_t data);
H A Dcvmx-ixf18201.c85 uint16_t cvmx_ixf18201_read16(uint16_t reg_addr) argument
87 cvmx_write64_uint16(IXF_ADDR_16, reg_addr);
95 void cvmx_ixf18201_write16(uint16_t reg_addr, uint16_t data) argument
97 cvmx_write64_uint16(IXF_ADDR_16, reg_addr);
105 uint32_t cvmx_ixf18201_read32(uint16_t reg_addr) argument
109 if (reg_addr & 0x1)
113 lo = cvmx_ixf18201_read16(reg_addr);
114 hi = cvmx_ixf18201_read16(reg_addr + 1);
117 void cvmx_ixf18201_write32(uint16_t reg_addr, uint32_t data) argument
121 if (reg_addr
[all...]
/freebsd-11-stable/contrib/gdb/gdb/
H A Dcore-regset.c63 CORE_ADDR reg_addr)
62 fetch_core_registers(char *core_reg_sect, unsigned core_reg_size, int which, CORE_ADDR reg_addr) argument
H A Dcore-aout.c73 Original upage address X is at location core_reg_sect+x+reg_addr.
78 CORE_ADDR reg_addr)
83 CORE_ADDR reg_ptr = -reg_addr; /* Original u.u_ar0 is -reg_addr. */
77 fetch_core_registers(char *core_reg_sect, unsigned core_reg_size, int which, CORE_ADDR reg_addr) argument
H A Dalpha-nat.c55 Original upage address X is at location core_reg_sect+x+reg_addr.
60 int which, CORE_ADDR reg_addr)
130 int which, CORE_ADDR reg_addr)
59 fetch_osf_core_registers(char *core_reg_sect, unsigned core_reg_size, int which, CORE_ADDR reg_addr) argument
129 fetch_elf_core_registers(char *core_reg_sect, unsigned core_reg_size, int which, CORE_ADDR reg_addr) argument
H A Dmips-nat.c170 Original upage address X is at location core_reg_sect+x+reg_addr.
175 CORE_ADDR reg_addr)
180 reg_ptr = -reg_addr; /* Original u.u_ar0 is -reg_addr. */
174 fetch_core_registers(char *core_reg_sect, unsigned core_reg_size, int which, CORE_ADDR reg_addr) argument
H A Dgdbcore.h192 address X is at location core_reg_sect+x+reg_addr. */
196 int which, CORE_ADDR reg_addr);
H A Dsun3-nat.c111 int which, CORE_ADDR reg_addr)
110 fetch_core_registers(char *core_reg_sect, unsigned core_reg_size, int which, CORE_ADDR reg_addr) argument
/freebsd-11-stable/sys/dev/ixgbe/
H A Dixgbe_x550.h65 s32 ixgbe_write_iosf_sb_reg_x550(struct ixgbe_hw *hw, u32 reg_addr,
67 s32 ixgbe_read_iosf_sb_reg_x550(struct ixgbe_hw *hw, u32 reg_addr,
73 s32 ixgbe_write_iosf_sb_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr,
75 s32 ixgbe_read_iosf_sb_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr,
105 s32 ixgbe_read_phy_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr,
107 s32 ixgbe_write_phy_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr,
H A Dixgbe_phy.h165 s32 ixgbe_read_phy_reg_mdi(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
167 s32 ixgbe_write_phy_reg_mdi(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
169 s32 ixgbe_read_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr,
171 s32 ixgbe_write_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr,
H A Dixgbe_api.h69 s32 ixgbe_read_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
71 s32 ixgbe_write_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
211 s32 ixgbe_read_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr,
213 s32 ixgbe_write_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr,
H A Dixgbe_api.c522 * @reg_addr: 32 bit address of PHY register to read
527 s32 ixgbe_read_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, argument
533 return ixgbe_call_func(hw, hw->phy.ops.read_reg, (hw, reg_addr,
540 * @reg_addr: 32 bit PHY register to write
545 s32 ixgbe_write_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, argument
551 return ixgbe_call_func(hw, hw->phy.ops.write_reg, (hw, reg_addr,
1218 * @reg_addr: 32 bit address of PHY register to read
1224 s32 ixgbe_read_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr, argument
1227 return ixgbe_call_func(hw, hw->mac.ops.read_iosf_sb_reg, (hw, reg_addr,
1234 * @reg_addr
1240 ixgbe_write_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, u32 phy_data) argument
[all...]
/freebsd-11-stable/sys/contrib/alpine-hal/
H A Dal_hal_udma_main.c124 uint32_t *reg_addr; local
128 reg_addr = &udma_q->q_regs->m2s_q.rlimit.mask;
130 val = al_reg_read32(reg_addr);
133 al_reg_write32(reg_addr, val);
147 uint32_t *reg_addr; local
151 reg_addr = &udma_q->q_regs->m2s_q.comp_cfg;
153 reg_addr = &udma_q->q_regs->s2m_q.comp_cfg;
155 val = al_reg_read32(reg_addr);
167 al_reg_write32(reg_addr, val);
/freebsd-11-stable/sys/contrib/alpine-hal/eth/
H A Dal_hal_eth_kr.c215 uint16_t reg_addr; local
220 reg_addr = al_eth_an_lt_regs_addr[reg_id][AL_ETH_LT_UNIT_REV_1];
222 al_reg_write32(&adapter->mac_regs_base->kr.an_addr, reg_addr);
225 al_reg_write32(&adapter->mac_regs_base->kr.pma_addr, reg_addr);
231 reg_addr = al_eth_an_lt_regs_addr[reg_id][AL_ETH_LT_UNIT_REV_2];
238 reg_addr);
248 reg_addr);
258 reg_addr);
268 reg_addr);
282 (an_lt == AL_ETH_AN_REGS) ? "AN" : "LT", lane, reg_addr, va
294 uint16_t reg_addr; local
[all...]
/freebsd-11-stable/sys/arm/arm/
H A Ddebug_monitor.c524 uint32_t reg_addr, reg_ctrl; local
530 reg_addr = DBG_REG_BASE_BVR;
535 reg_addr = DBG_REG_BASE_WVR;
544 if ((dbg_wb_read_reg(reg_addr, i) == addr) &&
598 uint32_t reg_ctrl, reg_addr, ctrl, addr; local
656 reg_addr = DBG_REG_BASE_BVR;
676 reg_addr = DBG_REG_BASE_WVR;
682 dbg_wb_write_reg(reg_addr, i, addr);
713 uint32_t reg_ctrl, reg_addr, addr; local
727 reg_addr
[all...]
/freebsd-11-stable/contrib/llvm-project/lldb/source/Plugins/Process/Utility/
H A DRegisterContextMemory.cpp94 addr_t reg_addr = m_reg_data_addr + reg_info->byte_offset; local
95 Status error(WriteRegisterValueToMemory(reg_info, reg_addr,
/freebsd-11-stable/sys/dev/bxe/
H A Decore_init.h256 uint32_t reg_addr, reg_bit_map, vnic; local
277 reg_addr = ECORE_VOQ_Q_REG_ADDR(curr_cos, pf_q_num);
278 reg_bit_map = REG_RD(sc, reg_addr);
279 REG_WR(sc, reg_addr, reg_bit_map & (~q_bit_map));
282 reg_addr = ECORE_VOQ_Q_REG_ADDR(new_cos, pf_q_num);
283 reg_bit_map = REG_RD(sc, reg_addr);
284 REG_WR(sc, reg_addr, reg_bit_map | q_bit_map);
289 reg_addr = ECORE_Q_CMDQ_REG_ADDR(pf_q_num);
290 reg_bit_map = REG_RD(sc, reg_addr);
295 REG_WR(sc, reg_addr, reg_bit_ma
[all...]
/freebsd-11-stable/sys/dev/qlnx/qlnxe/
H A Dbcm_osal.h67 extern uint32_t qlnx_direct_reg_rd32(void *p_hwfn, uint32_t *reg_addr);
68 extern void qlnx_direct_reg_wr32(void *p_hwfn, void *reg_addr, uint32_t value);
69 extern void qlnx_direct_reg_wr64(void *p_hwfn, void *reg_addr, uint64_t value);
71 extern uint32_t qlnx_reg_rd32(void *p_hwfn, uint32_t reg_addr);
72 extern void qlnx_reg_wr32(void *p_hwfn, uint32_t reg_addr, uint32_t value);
73 extern void qlnx_reg_wr16(void *p_hwfn, uint32_t reg_addr, uint16_t value);
75 extern void qlnx_dbell_wr32(void *p_hwfn, uint32_t reg_addr, uint32_t value);
76 extern void qlnx_dbell_wr32_db(void *p_hwfn, void *reg_addr, uint32_t value);
/freebsd-11-stable/sys/arm64/arm64/
H A Ddebug_monitor.c303 u_int max, reg_addr, reg_ctrl, i; local
308 reg_addr = DBG_REG_BASE_BVR;
313 reg_addr = DBG_REG_BASE_WVR;
322 if ((dbg_wb_read_reg(reg_addr, i) == addr) &&
/freebsd-11-stable/sys/dev/vnic/
H A Dnic_main.c887 uint64_t reg_addr; local
915 reg_addr = NIC_PF_QSET_0_127_CFG |
918 nic_reg_write(nic, reg_addr, cfg);
921 reg_addr = NIC_PF_QSET_0_127_RQ_0_7_CFG |
924 nic_reg_write(nic, reg_addr, mbx.rq.cfg);
927 reg_addr = NIC_PF_QSET_0_127_RQ_0_7_BP_CFG |
930 nic_reg_write(nic, reg_addr, mbx.rq.cfg);
936 reg_addr = NIC_PF_QSET_0_127_RQ_0_7_DROP_CFG |
939 nic_reg_write(nic, reg_addr, mbx.rq.cfg);
942 reg_addr
[all...]
/freebsd-11-stable/contrib/llvm-project/lldb/source/Commands/
H A DCommandObjectRegister.cpp91 addr_t reg_addr = reg_value.GetAsUInt64(LLDB_INVALID_ADDRESS); local
92 if (reg_addr != LLDB_INVALID_ADDRESS) {
96 .ResolveLoadAddress(reg_addr, so_reg_addr)) {
/freebsd-11-stable/sys/dev/cxgb/common/
H A Dcxgb_common.h150 int reg_addr, unsigned int *val);
152 int reg_addr, unsigned int val);
585 int reg_addr, unsigned int *val);
587 int reg_addr, unsigned int val);
627 #define XGM_REG(reg_addr, idx) \
628 ((reg_addr) + (idx) * (XGMAC0_1_BASE_ADDR - XGMAC0_0_BASE_ADDR))
631 unsigned int reg_addr; member in struct:addr_val_pair
840 int t3_mi1_read(adapter_t *adapter, int phy_addr, int mmd_addr, int reg_addr,
842 int t3_mi1_write(adapter_t *adapter, int phy_addr, int mmd_addr, int reg_addr,
H A Dcxgb_vsc7323.c142 if ((ret = t3_elmr_blk_write(adap, sys_avp[i].reg_addr,
171 if ((ret = t3_elmr_blk_write(adap, fifo_avp[i].reg_addr,
176 if ((ret = t3_elmr_blk_write(adap, xg_avp[i].reg_addr,
/freebsd-11-stable/sys/dev/ixl/
H A Di40e_prototype.h120 u32 reg_addr, u64 reg_val,
123 u32 reg_addr, u64 *reg_val,
552 u32 reg_addr, u32 *reg_val,
554 u32 i40e_read_rx_ctl(struct i40e_hw *hw, u32 reg_addr);
556 u32 reg_addr, u32 reg_val,
558 void i40e_write_rx_ctl(struct i40e_hw *hw, u32 reg_addr, u32 reg_val);
561 u32 reg_addr, u32 reg_val,
565 u32 reg_addr, u32 *reg_val,
/freebsd-11-stable/sys/dev/cxgb/
H A Dcxgb_adapter.h430 t3_read_reg(adapter_t *adapter, uint32_t reg_addr) argument
432 return (bus_space_read_4(adapter->bt, adapter->bh, reg_addr));
436 t3_write_reg(adapter_t *adapter, uint32_t reg_addr, uint32_t val) argument
438 bus_space_write_4(adapter->bt, adapter->bh, reg_addr, val);

Completed in 323 milliseconds

123