Searched refs:regVal (Results 1 - 6 of 6) sorted by relevance
| /freebsd-11-stable/sys/dev/ath/ath_hal/ar9002/ |
| H A D | ar9285_diversity.c | 64 int regVal; local
86 regVal = OS_REG_READ(ah, AR_PHY_MULTICHAIN_GAIN_CTL);
87 regVal &= (~(AR_PHY_9285_ANT_DIV_CTL_ALL));
91 regVal |= SM(ant_div_control1, AR_PHY_9285_ANT_DIV_CTL);
96 regVal |= SM(ant_div_control2, AR_PHY_9285_ANT_DIV_ALT_LNACONF);
97 regVal |= SM((ant_div_control2 >> 2), AR_PHY_9285_ANT_DIV_MAIN_LNACONF);
98 regVal |= SM((ant_div_control1 >> 1), AR_PHY_9285_ANT_DIV_ALT_GAINTB);
99 regVal |= SM((ant_div_control1 >> 2), AR_PHY_9285_ANT_DIV_MAIN_GAINTB);
105 regVal |= SM(HAL_ANT_DIV_COMB_LNA2, AR_PHY_9285_ANT_DIV_ALT_LNACONF);
106 regVal |
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| H A D | ar9285_btcoex.c | 47 u_int32_t regVal; local
105 regVal = OS_REG_READ(ah, AR_PHY_MULTICHAIN_GAIN_CTL);
106 regVal &= (~(AR_PHY_9285_ANT_DIV_CTL_ALL));
111 regVal &= (~(AR_PHY_9285_FAST_DIV_BIAS));
113 regVal |= SM(ant_div_control1, AR_PHY_9285_ANT_DIV_CTL);
114 regVal |= SM(ant_div_control2, AR_PHY_9285_ANT_DIV_ALT_LNACONF);
115 regVal |= SM((ant_div_control2 >> 2), AR_PHY_9285_ANT_DIV_MAIN_LNACONF);
116 regVal |= SM((ant_div_control1 >> 1), AR_PHY_9285_ANT_DIV_ALT_GAINTB);
117 regVal |= SM((ant_div_control1 >> 2), AR_PHY_9285_ANT_DIV_MAIN_GAINTB);
118 OS_REG_WRITE(ah, AR_PHY_MULTICHAIN_GAIN_CTL, regVal);
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| H A D | ar9285_cal.c | 51 uint32_t regVal; local
74 regVal = OS_REG_READ(ah, 0x7834);
75 regVal &= (~(0x1));
76 OS_REG_WRITE(ah, 0x7834, regVal);
77 regVal = OS_REG_READ(ah, 0x9808);
78 regVal |= (0x1 << 27);
79 OS_REG_WRITE(ah, 0x9808, regVal);
102 regVal = OS_REG_READ(ah, 0x7834);
103 regVal |= (1 << (19 + i));
104 OS_REG_WRITE(ah, 0x7834, regVal);
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| /freebsd-11-stable/sys/dev/pms/RefTisa/sallsdk/spc/ |
| H A D | sahw.c | 574 bit32 regVal; local
579 regVal = ossaHwRegReadExt(agRoot,PCIBAR0 ,V_SoftResetRegister );
581 SA_DBG1(("siChipResetV: signature %X V_SoftResetRegister %X\n",signature,regVal));
585 SA_DBG1(("siChipResetV: SPC_SOFT_RESET_SIGNATURE 0x%X\n",regVal));
586 regVal = SPCv_Reset_Write_NormalReset;
590 SA_DBG1(("siChipResetV: SPCv load HDA 0x%X\n",regVal));
591 regVal = SPCv_Reset_Write_SoftResetHDA;
595 SA_DBG1(("siChipResetV: Invalid SIGNATURE 0x%X regVal 0x%X a\n",signature ,regVal));
596 regVal
839 bit32 regVal; local
932 bit32 regVal, toggleVal; local
1338 bit32 regVal; local
1419 bit32 regVal; local
2642 bit32 regVal; local
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| /freebsd-11-stable/sys/arm/xscale/ixp425/ |
| H A D | ixp425_npe.c | 222 uint32_t ctxtNum, uint32_t *regVal);
224 uint32_t regAddr, uint32_t regVal,
679 uint32_t regVal = bp->ctxtRegEntry[i].value; local
707 if (npe_ctx_reg_write(sc, cNum, reg, regVal, verify) != 0) {
831 uint32_t regVal; local
918 regVal = ixNpeDlCtxtRegResetValues[ctxtReg];
920 regVal, TRUE);
1213 uint32_t ctxtNum, uint32_t *regVal)
1248 *regVal = npe_reg_read(sc, IX_NPEDL_REG_OFFSET_EXDATA);
1251 *regVal
1211 npe_logical_reg_read(struct ixpnpe_softc *sc, uint32_t regAddr, uint32_t regSize, uint32_t ctxtNum, uint32_t *regVal) argument
1257 npe_logical_reg_write(struct ixpnpe_softc *sc, uint32_t regAddr, uint32_t regVal, uint32_t regSize, uint32_t ctxtNum, int verify) argument
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| /freebsd-11-stable/contrib/sqlite3/ |
| H A D | sqlite3.c | 155990 windowCodeRangeTest( WindowCodeArg *p, int op, int csr1, int regVal, int csr2, int lbl ) argument
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