Searched refs:regMPCC_OGAM1_MPCC_OGAM_RAMA_REGION_20_21 (Results 1 - 8 of 8) sorted by path

/linux-master/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_2_offset.h6923 #define regMPCC_OGAM1_MPCC_OGAM_RAMA_REGION_20_21 0x01a0 macro
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H A Ddcn_3_1_4_offset.h13590 #define regMPCC_OGAM1_MPCC_OGAM_RAMA_REGION_20_21 macro
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H A Ddcn_3_1_5_offset.h6682 #define regMPCC_OGAM1_MPCC_OGAM_RAMA_REGION_20_21 0x01a0 macro
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H A Ddcn_3_1_6_offset.h7143 #define regMPCC_OGAM1_MPCC_OGAM_RAMA_REGION_20_21 0x01a0 macro
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H A Ddcn_3_2_0_offset.h5225 #define regMPCC_OGAM1_MPCC_OGAM_RAMA_REGION_20_21 0x0126 macro
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H A Ddcn_3_2_1_offset.h5224 #define regMPCC_OGAM1_MPCC_OGAM_RAMA_REGION_20_21 0x0126 macro
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H A Ddcn_3_5_0_offset.h12524 #define regMPCC_OGAM1_MPCC_OGAM_RAMA_REGION_20_21 macro
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H A Ddcn_3_5_1_offset.h12503 #define regMPCC_OGAM1_MPCC_OGAM_RAMA_REGION_20_21 macro
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