Searched refs:regDC_GPIO_DDC1_Y_BASE_IDX (Results 1 - 12 of 12) sorted by path

/linux-master/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_2_offset.h11836 #define regDC_GPIO_DDC1_Y_BASE_IDX macro
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H A Ddcn_3_1_4_offset.h10945 #define regDC_GPIO_DDC1_Y_BASE_IDX macro
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H A Ddcn_3_1_5_offset.h11581 #define regDC_GPIO_DDC1_Y_BASE_IDX macro
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H A Ddcn_3_1_6_offset.h12072 #define regDC_GPIO_DDC1_Y_BASE_IDX macro
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H A Ddcn_3_2_0_offset.h10986 #define regDC_GPIO_DDC1_Y_BASE_IDX macro
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H A Ddcn_3_2_1_offset.h10995 #define regDC_GPIO_DDC1_Y_BASE_IDX macro
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H A Ddcn_3_5_0_offset.h9834 #define regDC_GPIO_DDC1_Y_BASE_IDX 2 macro
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H A Ddcn_3_5_1_offset.h9813 #define regDC_GPIO_DDC1_Y_BASE_IDX 2 macro
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/linux-master/drivers/gpu/drm/amd/include/asic_reg/dpcs/
H A Ddpcs_3_1_4_offset.h6287 #define regDC_GPIO_DDC1_Y_BASE_IDX 2 macro
H A Ddpcs_4_2_0_offset.h627 #define regDC_GPIO_DDC1_Y_BASE_IDX 2 macro
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H A Ddpcs_4_2_2_offset.h624 #define regDC_GPIO_DDC1_Y_BASE_IDX 2 macro
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H A Ddpcs_4_2_3_offset.h660 #define regDC_GPIO_DDC1_Y_BASE_IDX 2 macro
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