Searched refs:regDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED36_BASE_IDX (Results 1 - 12 of 12) sorted by path

/linux-master/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_2_offset.h12360 #define regDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED36_BASE_IDX macro
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H A Ddcn_3_1_4_offset.h11469 #define regDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED36_BASE_IDX macro
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H A Ddcn_3_1_5_offset.h12225 #define regDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED36_BASE_IDX macro
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H A Ddcn_3_1_6_offset.h12716 #define regDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED36_BASE_IDX macro
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H A Ddcn_3_2_0_offset.h11634 #define regDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED36_BASE_IDX macro
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H A Ddcn_3_2_1_offset.h11643 #define regDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED36_BASE_IDX macro
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H A Ddcn_3_5_0_offset.h10368 #define regDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED36_BASE_IDX 2 macro
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H A Ddcn_3_5_1_offset.h10347 #define regDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED36_BASE_IDX 2 macro
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/linux-master/drivers/gpu/drm/amd/include/asic_reg/dpcs/
H A Ddpcs_3_1_4_offset.h7011 #define regDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED36_BASE_IDX 2 macro
H A Ddpcs_4_2_0_offset.h1151 #define regDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED36_BASE_IDX 2 macro
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H A Ddpcs_4_2_2_offset.h1148 #define regDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED36_BASE_IDX 2 macro
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H A Ddpcs_4_2_3_offset.h1184 #define regDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED36_BASE_IDX 2 macro
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