Searched refs:regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED2 (Results 1 - 12 of 12) sorted by path

/linux-master/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_2_offset.h12051 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED2 macro
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H A Ddcn_3_1_4_offset.h11160 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED2 macro
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H A Ddcn_3_1_5_offset.h11916 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED2 macro
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H A Ddcn_3_1_6_offset.h12407 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED2 macro
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H A Ddcn_3_2_0_offset.h11325 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED2 macro
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H A Ddcn_3_2_1_offset.h11334 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED2 macro
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H A Ddcn_3_5_0_offset.h10059 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED2 0x2ada macro
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H A Ddcn_3_5_1_offset.h10038 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED2 0x2ada macro
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/linux-master/drivers/gpu/drm/amd/include/asic_reg/dpcs/
H A Ddpcs_3_1_4_offset.h6696 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED2 0x2ada macro
H A Ddpcs_4_2_0_offset.h842 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED2 0x2ada macro
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H A Ddpcs_4_2_2_offset.h839 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED2 0x2ada macro
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H A Ddpcs_4_2_3_offset.h875 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED2 0x2ada macro
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