Searched refs:psr_level (Results 1 - 7 of 7) sorted by relevance

/linux-master/drivers/gpu/drm/amd/display/dc/dce/
H A Ddmub_psr.h45 void (*psr_set_level)(struct dmub_psr *dmub, uint16_t psr_level,
H A Ddmub_psr.c228 static void dmub_psr_set_level(struct dmub_psr *dmub, uint16_t psr_level, uint8_t panel_inst) argument
243 cmd.psr_set_level.psr_set_level_data.psr_level = psr_level;
356 copy_settings_data->psr_level = psr_context->psr_level.u32all;
H A Ddce_dmcu.h290 unsigned int psr_level:16; /*[15:0]*/ member in struct:dce_dmcu_psr_config_data_reg3::__anon460
H A Ddce_dmcu.c266 masterCmdData3.bits.psr_level = psr_context->psr_level.u32all;
705 masterCmdData3.bits.psr_level = psr_context->psr_level.u32all;
/linux-master/drivers/gpu/drm/amd/display/dc/link/protocols/
H A Dlink_edp_panel_control.c792 psr_context->psr_level.u32all = 0;
801 psr_context->psr_level.bits.SKIP_CRTC_DISABLE = true;
804 psr_context->psr_level.bits.SKIP_CRTC_DISABLE = true;
810 * For unsupported ASICs, set psr_level flag to skip PSR
820 psr_context->psr_level.bits.DISABLE_PSR_ENTRY_ABORT = 1;
823 psr_context->psr_level.bits.DISABLE_ALPM = 0;
824 psr_context->psr_level.bits.ALPM_DEFAULT_PD_MODE = 1;
/linux-master/drivers/gpu/drm/amd/display/dc/
H A Ddc_types.h709 union dmcu_psr_level psr_level; member in struct:psr_context
/linux-master/drivers/gpu/drm/amd/display/dmub/inc/
H A Ddmub_cmd.h2348 uint16_t psr_level; member in struct:dmub_cmd_psr_copy_settings_data
2499 uint16_t psr_level; member in struct:dmub_cmd_psr_set_level_data

Completed in 183 milliseconds