Searched refs:pp_table (Results 1 - 16 of 16) sorted by relevance

/linux-master/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dvega10_hwmgr.c954 PPTable_t *pp_table = &(data->smc_state_table.pp_table); local
977 pp_table->LedPin0 = (uint8_t)(mask & 0xff);
978 pp_table->LedPin1 = (uint8_t)((mask >> 8) & 0xff);
979 pp_table->LedPin2 = (uint8_t)((mask >> 16) & 0xff);
1472 data->smc_state_table.pp_table.UlvOffsetVid =
1475 data->smc_state_table.pp_table.UlvSmnclkDid =
1477 data->smc_state_table.pp_table.UlvMp1clkDid =
1479 data->smc_state_table.pp_table.UlvGfxclkBypass =
1481 data->smc_state_table.pp_table
1512 PPTable_t *pp_table = &(data->smc_state_table.pp_table); local
1559 PPTable_t *pp_table = &(data->smc_state_table.pp_table); local
1721 PPTable_t *pp_table = &(data->smc_state_table.pp_table); local
1776 PPTable_t *pp_table = &(data->smc_state_table.pp_table); local
1870 PPTable_t *pp_table = &(data->smc_state_table.pp_table); local
1913 PPTable_t *pp_table = &(data->smc_state_table.pp_table); local
2008 PPTable_t *pp_table = &(data->smc_state_table.pp_table); local
2071 PPTable_t *pp_table = &(data->smc_state_table.pp_table); local
2142 PPTable_t *pp_table = &(data->smc_state_table.pp_table); local
2161 PPTable_t *pp_table = &(data->smc_state_table.pp_table); local
2396 PPTable_t *pp_table = &(data->smc_state_table.pp_table); local
2551 PPTable_t *pp_table = &(data->smc_state_table.pp_table); local
3115 vega10_get_pp_table_entry_callback_func(struct pp_hwmgr *hwmgr, void *state, struct pp_power_state *power_state, void *pp_table, uint32_t classification_flag) argument
3811 PPTable_t *pp_table = &(data->smc_state_table.pp_table); local
5240 PPTable_t *pp_table = &(data->smc_state_table.pp_table); local
[all...]
H A Dvega12_processpptables.c359 const ATOM_Vega12_POWERPLAYTABLE *pp_table =
362 PP_ASSERT_WITH_CODE(pp_table, "Missing PowerPlay Table!",
366 if (pp_table->sHeader.format_revision >=
369 (((unsigned long)pp_table) +
370 le16_to_cpu(pp_table->usStateArrayOffset));
372 PP_ASSERT_WITH_CODE(pp_table->usStateArrayOffset > 0,
385 (void *)pp_table,
H A Dprocess_pptables_v1_0.c1245 const ATOM_Tonga_POWERPLAYTABLE *pp_table = get_powerplay_table(hwmgr); local
1247 PP_ASSERT_WITH_CODE((NULL != pp_table),
1249 PP_ASSERT_WITH_CODE((pp_table->sHeader.ucTableFormatRevision >=
1253 state_arrays = (ATOM_Tonga_State_Array *)(((unsigned long)pp_table) +
1254 le16_to_cpu(pp_table->usStateArrayOffset));
1293 const ATOM_Tonga_POWERPLAYTABLE *pp_table = get_powerplay_table(hwmgr); local
1297 if (pp_table == NULL)
1300 vce_state_table = (void *)pp_table +
1301 le16_to_cpu(pp_table->usVCEStateTableOffset);
1376 const ATOM_Tonga_POWERPLAYTABLE *pp_table local
[all...]
H A Dvega12_hwmgr.c490 PPTable_t *pp_table = &(data->smc_state_table.pp_table); local
521 pcie_gen_arg = (pp_table->PcieGenSpeed[i] > pcie_gen) ? pcie_gen :
522 pp_table->PcieGenSpeed[i];
523 pcie_width_arg = (pp_table->PcieLaneCount[i] > pcie_width) ? pcie_width :
524 pp_table->PcieLaneCount[i];
526 if (pcie_gen_arg != pp_table->PcieGenSpeed[i] || pcie_width_arg !=
527 pp_table->PcieLaneCount[i]) {
538 pp_table->PcieGenSpeed[i] = pcie_gen_arg;
539 pp_table
815 PPTable_t *pp_table = &(data->smc_state_table.pp_table); local
2770 PPTable_t *pp_table = &(data->smc_state_table.pp_table); local
[all...]
H A Dvega10_processpptables.c1251 const ATOM_Vega10_POWERPLAYTABLE *pp_table = get_powerplay_table(hwmgr); local
1253 PP_ASSERT_WITH_CODE((pp_table != NULL),
1255 PP_ASSERT_WITH_CODE((pp_table->sHeader.format_revision >=
1259 state_arrays = (ATOM_Vega10_State_Array *)(((unsigned long)pp_table) +
1260 le16_to_cpu(pp_table->usStateArrayOffset));
1302 const ATOM_Vega10_POWERPLAYTABLE *pp_table = local
1305 PP_ASSERT_WITH_CODE(pp_table, "Missing PowerPlay Table!",
1309 if (pp_table->sHeader.format_revision >=
1312 (((unsigned long)pp_table) +
1313 le16_to_cpu(pp_table
[all...]
H A Dvega10_thermal.c510 PPTable_t *table = &(data->smc_state_table.pp_table);
555 (uint8_t *)(&(data->smc_state_table.pp_table)),
566 PPTable_t *table = &(data->smc_state_table.pp_table);
580 (uint8_t *)(&(data->smc_state_table.pp_table)),
H A Dvega20_hwmgr.c784 PPTable_t *pp_table = &(data->smc_state_table.pp_table); local
812 memcpy(pp_table, pptable_information->smc_pptable, sizeof(PPTable_t));
815 (uint8_t *)pp_table, TABLE_PPTABLE, false);
835 PPTable_t *pp_table = &(data->smc_state_table.pp_table); local
866 pcie_gen_arg = (pp_table->PcieGenSpeed[i] > pcie_gen) ? pcie_gen :
867 pp_table->PcieGenSpeed[i];
868 pcie_width_arg = (pp_table->PcieLaneCount[i] > pcie_width) ? pcie_width :
869 pp_table
1042 PPTable_t *pp_table = &(data->smc_state_table.pp_table); local
4221 PPTable_t *pp_table = &(data->smc_state_table.pp_table); local
[all...]
H A Dvega12_thermal.c256 PPTable_t *table = &(data->smc_state_table.pp_table);
H A Dvega20_thermal.c327 PPTable_t *table = &(data->smc_state_table.pp_table);
H A Dvega10_hwmgr.h208 PPTable_t pp_table; member in struct:vega10_smc_state_table
H A Dvega12_hwmgr.h194 PPTable_t pp_table; member in struct:vega12_smc_state_table
H A Dvega20_hwmgr.h255 PPTable_t pp_table; member in struct:vega20_smc_state_table
H A Dvega10_powertune.c1242 PPTable_t *table = &(data->smc_state_table.pp_table);
H A Dsmu7_hwmgr.c3592 void *pp_table, uint32_t classification_flag)
3600 (ATOM_Tonga_POWERPLAYTABLE *)pp_table;
3590 smu7_get_pp_table_entry_callback_func_v1(struct pp_hwmgr *hwmgr, void *state, struct pp_power_state *power_state, void *pp_table, uint32_t classification_flag) argument
/linux-master/drivers/video/fbdev/
H A Dpm2fb.c202 } pp_table[] = { variable in typeref:struct:__anon1386
225 for (i = 0; pp_table[i].width && pp_table[i].width != xres; i++)
227 if (pp_table[i].width == 0)
229 return pp_table[i].pp;
/linux-master/drivers/gpu/drm/amd/pm/
H A Damdgpu_pm.c521 * DOC: pp_table
524 * tables. The file pp_table is used for this. Reading the file
2164 AMDGPU_DEVICE_ATTR_RW(pp_table, ATTR_FLAG_BASIC|ATTR_FLAG_ONEVF),

Completed in 272 milliseconds