powerplay/hwmgr/vega20_hwmgr.c

784 	PPTable_t *pp_table = &(data->smc_state_table.pp_table);
812 	memcpy(pp_table, pptable_information->smc_pptable, sizeof(PPTable_t));
815 					(uint8_t *)pp_table, TABLE_PPTABLE, false);
835 	PPTable_t *pp_table = &(data->smc_state_table.pp_table);
866 		pcie_gen_arg = (pp_table->PcieGenSpeed[i] > pcie_gen) ? pcie_gen :
867 			pp_table->PcieGenSpeed[i];
868 		pcie_width_arg = (pp_table->PcieLaneCount[i] > pcie_width) ? pcie_width :
869 			pp_table->PcieLaneCount[i];
871 		if (pcie_gen_arg != pp_table->PcieGenSpeed[i] || pcie_width_arg !=
872 		    pp_table->PcieLaneCount[i]) {
883 		pp_table->PcieGenSpeed[i] = pcie_gen_arg;
884 		pp_table->PcieLaneCount[i] = pcie_width_arg;
898 			pp_table->PcieGenSpeed[i] = pcie_gen;
899 			pp_table->PcieLaneCount[i] = pcie_width;
1042 	PPTable_t *pp_table = &(data->smc_state_table.pp_table);
1057 		     pp_table->MinVoltageGfx / VOLTAGE_SCALE) &&
1059 		     pp_table->MaxVoltageGfx / VOLTAGE_SCALE) &&
1093 		    (pp_table->FanPwmMin * pp_table->FanMaximumRpm / 100)) &&
1120 	    pp_table->FanZeroRpmEnable)
1344 			od_table->FanMinimumPwm * data->smc_state_table.pp_table.FanMaximumRpm / 100;
3363 	PPTable_t *pptable = &(data->smc_state_table.pp_table);
4221 	PPTable_t *pp_table = &(data->smc_state_table.pp_table);
4225 	thermal_data->max = pp_table->TedgeLimit *
4227 	thermal_data->edge_emergency_max = (pp_table->TedgeLimit + CTF_OFFSET_EDGE) *
4229 	thermal_data->hotspot_crit_max = pp_table->ThotspotLimit *
4231 	thermal_data->hotspot_emergency_max = (pp_table->ThotspotLimit + CTF_OFFSET_HOTSPOT) *
4233 	thermal_data->mem_crit_max = pp_table->ThbmLimit *
4235 	thermal_data->mem_emergency_max = (pp_table->ThbmLimit + CTF_OFFSET_HBM)*