/linux-master/drivers/gpu/drm/amd/amdgpu/ |
H A D | amdgpu_vkms.h | 21 ktime_t period_ns; member in struct:amdgpu_vkms_output
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/linux-master/drivers/pwm/ |
H A D | pwm-lpc18xx-sct.c | 98 unsigned int period_ns; member in struct:lpc18xx_pwm_chip 136 * when duty_ns == period_ns. LPC18xx SCT allows to set a conflict 147 static void lpc18xx_pwm_config_period(struct pwm_chip *chip, u64 period_ns) argument 154 * With period_ns < max_period_ns this also fits into an u32. 155 * As period_ns >= min_period_ns = DIV_ROUND_UP(NSEC_PER_SEC, lpc18xx_pwm->clk_rate); 158 val = mul_u64_u64_div_u64(period_ns, lpc18xx_pwm->clk_rate, NSEC_PER_SEC); 178 * With duty_ns <= period_ns < max_period_ns this also fits into an u32. 192 int duty_ns, int period_ns) 197 if (period_ns < lpc18xx_pwm->min_period_ns || 198 period_ns > lpc18xx_pw 191 lpc18xx_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, int duty_ns, int period_ns) argument 199 dev_err(pwmchip_parent(chip), "period %d not in range\\n", period_ns); local [all...] |
H A D | pwm-pxa.c | 64 * period_ns = 10^9 * (PRESCALE + 1) * (PV + 1) / PWM_CLK_RATE 68 u64 duty_ns, u64 period_ns) 78 c = c * period_ns; 90 if (duty_ns == period_ns) 93 dc = mul_u64_u64_div_u64(pv + 1, duty_ns, period_ns); 67 pxa_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, u64 duty_ns, u64 period_ns) argument
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H A D | pwm-lpc32xx.c | 31 int duty_ns, int period_ns) 40 period_cycles = div64_u64(c * period_ns, 48 duty_cycles = div64_u64((unsigned long long)(period_ns - duty_ns) * 256, 49 period_ns); 30 lpc32xx_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, int duty_ns, int period_ns) argument
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H A D | pwm-lp3943.c | 88 u64 duty_ns, u64 period_ns) 114 * Note that after this clamping, period_ns fits into an int. This is 118 period_ns = clamp(period_ns, (u64)LP3943_MIN_PERIOD, (u64)LP3943_MAX_PERIOD); 119 val = (u8)((int)period_ns / LP3943_MIN_PERIOD - 1); 125 duty_ns = min(duty_ns, period_ns); 126 val = (u8)((int)duty_ns * LP3943_MAX_DUTY / (int)period_ns); 87 lp3943_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, u64 duty_ns, u64 period_ns) argument
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H A D | pwm-samsung.c | 60 * @period_ns: current period in nanoseconds programmed to the hardware 65 u32 period_ns; member in struct:samsung_pwm_channel 309 int duty_ns, int period_ns, bool force_period) 322 if (chan->period_ns != period_ns || force_period) { 326 period = NSEC_PER_SEC / period_ns; 328 dev_dbg(pwmchip_parent(chip), "duty_ns=%d, period_ns=%d (%u)\n", 329 duty_ns, period_ns, period); local 336 tcnt = period_ns / tin_ns; 373 chan->period_ns 308 __pwm_samsung_config(struct pwm_chip *chip, struct pwm_device *pwm, int duty_ns, int period_ns, bool force_period) argument 380 pwm_samsung_config(struct pwm_chip *chip, struct pwm_device *pwm, int duty_ns, int period_ns) argument [all...] |
H A D | pwm-omap-dmtimer.c | 141 * @period_ns: New period in nano seconds 148 int duty_ns, int period_ns) 157 duty_ns, period_ns); local 160 period_ns == pwm_get_period(pwm)) 193 period_cycles = pwm_omap_dmtimer_get_clock_cycles(clk_rate, period_ns); 199 period_ns, clk_rate); local 212 duty_ns, period_ns, clk_rate); local 146 pwm_omap_dmtimer_config(struct pwm_chip *chip, struct pwm_device *pwm, int duty_ns, int period_ns) argument
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H A D | pwm-fsl-ftm.c | 128 unsigned int period_ns, 137 c = c * period_ns; 155 unsigned int period_ns, 162 ret = fsl_pwm_calculate_period_clk(fpc, period_ns, FSL_PWM_CLK_SYS, 178 ret = fsl_pwm_calculate_period_clk(fpc, period_ns, m0, periodcfg); 182 return fsl_pwm_calculate_period_clk(fpc, period_ns, m1, periodcfg); 191 unsigned int period_ns = fsl_pwm_ticks_to_ns(fpc, period); local 194 do_div(duty, period_ns); 127 fsl_pwm_calculate_period_clk(struct fsl_pwm_chip *fpc, unsigned int period_ns, enum fsl_pwm_clk index, struct fsl_pwm_periodcfg *periodcfg ) argument 154 fsl_pwm_calculate_period(struct fsl_pwm_chip *fpc, unsigned int period_ns, struct fsl_pwm_periodcfg *periodcfg) argument
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H A D | pwm-rcar.c | 72 static int rcar_pwm_get_clock_division(struct rcar_pwm_chip *rp, int period_ns) argument 81 tmp = (u64)period_ns * clk_rate + div - 1; 106 int period_ns) 115 tmp = period_ns * 100ULL; 105 rcar_pwm_set_counter(struct rcar_pwm_chip *rp, int div, int duty_ns, int period_ns) argument
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H A D | pwm-stmpe.c | 98 int duty_ns, int period_ns) 153 pwm->hwpwm, duty_ns, period_ns); local 163 } else if (duty_ns == period_ns) { 187 duty = DIV_ROUND_CLOSEST(duty, period_ns); 97 stmpe_24xx_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, int duty_ns, int period_ns) argument
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H A D | pwm-tegra.c | 95 int duty_ns, int period_ns) 104 * Convert from duty_ns / period_ns to a fixed number of duty ticks 109 c = DIV_ROUND_CLOSEST_ULL(c, period_ns); 116 if (period_ns < pc->min_period_ns) 121 * cycles at the PWM clock rate will take period_ns nanoseconds. 145 period_ns); 167 rate = mul_u64_u64_div_u64(pc->clk_rate, period_ns, 94 tegra_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, int duty_ns, int period_ns) argument
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H A D | pwm-crc.c | 40 static int crc_pwm_calc_clk_div(int period_ns) argument 44 clk_div = PWM_BASE_CLK_MHZ * period_ns / (256 * NSEC_PER_USEC); 60 dev_err(dev, "un-supported period_ns\n");
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H A D | pwm-imx1.c | 65 struct pwm_device *pwm, u64 duty_ns, u64 period_ns) 77 * register to follow the ratio of duty_ns vs. period_ns 88 p = mul_u64_u64_div_u64(max, duty_ns, period_ns); 64 pwm_imx1_config(struct pwm_chip *chip, struct pwm_device *pwm, u64 duty_ns, u64 period_ns) argument
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H A D | pwm-mediatek.c | 119 int duty_ns, int period_ns) 140 cnt_period = DIV_ROUND_CLOSEST_ULL((u64)period_ns * 1000, resolution); 144 cnt_period = DIV_ROUND_CLOSEST_ULL((u64)period_ns * 1000, 150 dev_err(pwmchip_parent(chip), "period of %d ns not supported\n", period_ns); local 118 pwm_mediatek_config(struct pwm_chip *chip, struct pwm_device *pwm, int duty_ns, int period_ns) argument
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H A D | pwm-twl-led.c | 74 int duty_ns, int period_ns) 76 int duty_cycle = DIV_ROUND_UP(duty_ns * TWL4030_LED_MAX, period_ns) + 1; 194 int duty_ns, int period_ns) 196 int duty_cycle = (duty_ns * TWL6030_LED_MAX) / period_ns; 73 twl4030_pwmled_config(struct pwm_chip *chip, struct pwm_device *pwm, int duty_ns, int period_ns) argument 193 twl6030_pwmled_config(struct pwm_chip *chip, struct pwm_device *pwm, int duty_ns, int period_ns) argument
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H A D | pwm-berlin.c | 76 u64 duty_ns, u64 period_ns) 84 cycles *= period_ns; 97 do_div(cycles, period_ns); 75 berlin_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, u64 duty_ns, u64 period_ns) argument
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H A D | pwm-brcmstb.c | 96 u64 duty_ns, u64 period_ns) 104 * If asking for a duty_ns equal to period_ns, we need to substract 108 if (duty_ns == period_ns) { 124 pc = mul_u64_u64_div_u64(period_ns, rate, NSEC_PER_SEC); 95 brcmstb_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, u64 duty_ns, u64 period_ns) argument
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H A D | pwm-vt8500.c | 73 u64 duty_ns, u64 period_ns) 88 c = c * period_ns; 106 dc = div64_u64(c, period_ns); 72 vt8500_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, u64 duty_ns, u64 period_ns) argument
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H A D | pwm-sprd.c | 101 * Thus the period_ns and duty_ns calculation formula should be: 102 * period_ns = NSEC_PER_SEC * (prescale + 1) * mod / clk_rate 124 int duty_ns, int period_ns) 140 duty = duty_ns * SPRD_PWM_MOD_MAX / period_ns; 142 tmp = (u64)chn->clk_rate * period_ns; 123 sprd_pwm_config(struct sprd_pwm_chip *spc, struct pwm_device *pwm, int duty_ns, int period_ns) argument
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/linux-master/include/xen/interface/ |
H A D | vcpu.h | 126 uint64_t period_ns; member in struct:vcpu_set_periodic_timer
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/linux-master/drivers/gpu/drm/vkms/ |
H A D | vkms_crtc.c | 24 output->period_ns); 73 out->period_ns = ktime_set(0, vblank->framedur_ns); 74 hrtimer_start(&out->vblank_hrtimer, out->period_ns, HRTIMER_MODE_REL); 113 *vblank_time -= output->period_ns;
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/linux-master/include/linux/ |
H A D | pwm.h | 327 * @period_ns: duration (in nanoseconds) of one cycle 332 int period_ns) 339 if (duty_ns < 0 || period_ns < 0) 343 if (state.duty_cycle == duty_ns && state.period == period_ns) 347 state.period = period_ns; 458 int period_ns) 331 pwm_config(struct pwm_device *pwm, int duty_ns, int period_ns) argument 457 pwm_config(struct pwm_device *pwm, int duty_ns, int period_ns) argument
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/linux-master/drivers/mtd/nand/raw/ |
H A D | renesas-nand-controller.c | 191 #define TO_CYCLES64(ps, period_ns) ((unsigned int)DIV_ROUND_UP_ULL(div_u64(ps, 1000), \ 192 period_ns)) 894 unsigned int period_ns = 1000000000 / rnandc->ext_clk_rate; local 911 TIMINGS_ASYN_TRWP(TO_CYCLES64(sdr->tRP_min, period_ns)) | 912 TIMINGS_ASYN_TRWH(TO_CYCLES64(sdr->tREH_min, period_ns)); 914 TIM_SEQ0_TCCS(TO_CYCLES64(sdr->tCCS_min, period_ns)) | 915 TIM_SEQ0_TADL(TO_CYCLES64(sdr->tADL_min, period_ns)) | 916 TIM_SEQ0_TRHW(TO_CYCLES64(sdr->tRHW_min, period_ns)) | 917 TIM_SEQ0_TWHR(TO_CYCLES64(sdr->tWHR_min, period_ns)); 919 TIM_SEQ1_TWB(TO_CYCLES64(sdr->tWB_max, period_ns)) | [all...] |
/linux-master/include/linux/platform_data/ |
H A D | lp855x.h | 131 * @period_ns : platform specific pwm period value. unit is nano. 140 unsigned int period_ns; member in struct:lp855x_platform_data
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/linux-master/drivers/net/ethernet/renesas/ |
H A D | ravb_ptp.c | 225 u64 period_ns; local 228 period_ns = req->period.sec * NSEC_PER_SEC + req->period.nsec; 236 if (period_ns > U32_MAX) { 246 perout->period = (u32)period_ns;
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