Searched refs:op1 (Results 1 - 25 of 44) sorted by relevance

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/linux-master/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/
H A Dphy_qmath.h11 u16 qm_mulu16(u16 op1, u16 op2);
13 s16 qm_muls16(s16 op1, s16 op2);
15 s32 qm_add32(s32 op1, s32 op2);
17 s16 qm_add16(s16 op1, s16 op2);
19 s16 qm_sub16(s16 op1, s16 op2);
H A Dphy_qmath.c13 u16 qm_mulu16(u16 op1, u16 op2) argument
15 return (u16) (((u32) op1 * (u32) op2) >> 16);
26 s16 qm_muls16(s16 op1, s16 op2) argument
29 if (op1 == (s16) 0x8000 && op2 == (s16) 0x8000)
32 result = ((s32) (op1) * (s32) (op2));
42 s32 qm_add32(s32 op1, s32 op2) argument
45 result = op1 + op2;
46 if (op1 < 0 && op2 < 0 && result > 0)
48 else if (op1 > 0 && op2 > 0 && result < 0)
59 s16 qm_add16(s16 op1, s1 argument
78 qm_sub16(s16 op1, s16 op2) argument
[all...]
/linux-master/arch/x86/kvm/svm/
H A Dsvm_ops.h19 #define svm_asm1(insn, op1, clobber...) \
23 :: op1 : clobber : fault); \
29 #define svm_asm2(insn, op1, op2, clobber...) \
33 :: op1, op2 : clobber : fault); \
/linux-master/arch/arc/include/asm/
H A Datomic64-arcv2.h49 #define ATOMIC64_OP(op, op1, op2) \
57 " " #op1 " %L0, %L0, %L2 \n" \
66 #define ATOMIC64_OP_RETURN(op, op1, op2) \
74 " " #op1 " %L0, %L0, %L2 \n" \
88 #define ATOMIC64_FETCH_OP(op, op1, op2) \
96 " " #op1 " %L1, %L0, %L3 \n" \
115 #define ATOMIC64_OPS(op, op1, op2) \
116 ATOMIC64_OP(op, op1, op2) \
117 ATOMIC64_OP_RETURN(op, op1, op2) \
118 ATOMIC64_FETCH_OP(op, op1, op
[all...]
/linux-master/include/crypto/
H A Dpolyval.h17 void polyval_mul_non4k(u8 *op1, const u8 *op2);
/linux-master/lib/zlib_dfltcc/
H A Ddfltcc_util.h29 Byte **op1,
36 Byte *t2 = op1 ? *op1 : NULL;
62 if (op1)
63 *op1 = t2;
26 dfltcc( int fn, void *param, Byte **op1, size_t *len1, const Byte **op2, size_t *len2, void *hist ) argument
/linux-master/include/trace/events/
H A Dhost1x.h50 TP_PROTO(const char *name, u32 op1, u32 op2),
52 TP_ARGS(name, op1, op2),
56 __field(u32, op1)
62 __entry->op1 = op1;
66 TP_printk("name=%s, op1=%08x, op2=%08x",
67 __entry->name, __entry->op1, __entry->op2)
71 TP_PROTO(const char *name, u32 op1, u32 op2, u32 op3, u32 op4),
73 TP_ARGS(name, op1, op2, op3, op4),
77 __field(u32, op1)
[all...]
/linux-master/drivers/gpu/drm/i915/gt/
H A Dintel_gpu_commands.h344 #define MI_MATH_INSTR(opcode, op1, op2) ((opcode) << 20 | (op1) << 10 | (op2))
347 #define MI_MATH_LOAD(op1, op2) MI_MATH_INSTR(0x080, op1, op2)
348 #define MI_MATH_LOADINV(op1, op2) MI_MATH_INSTR(0x480, op1, op2)
349 #define MI_MATH_LOAD0(op1) MI_MATH_INSTR(0x081, op1)
350 #define MI_MATH_LOAD1(op1) MI_MATH_INSTR(0x481, op1)
[all...]
/linux-master/arch/arm/include/asm/
H A Datomic.h311 #define ATOMIC64_OP(op, op1, op2) \
320 " " #op1 " %Q0, %Q0, %Q4\n" \
330 #define ATOMIC64_OP_RETURN(op, op1, op2) \
341 " " #op1 " %Q0, %Q0, %Q4\n" \
353 #define ATOMIC64_FETCH_OP(op, op1, op2) \
364 " " #op1 " %Q1, %Q0, %Q5\n" \
376 #define ATOMIC64_OPS(op, op1, op2) \
377 ATOMIC64_OP(op, op1, op2) \
378 ATOMIC64_OP_RETURN(op, op1, op2) \
379 ATOMIC64_FETCH_OP(op, op1, op
[all...]
/linux-master/arch/sh/kernel/
H A Dkprobes.c149 struct kprobe *op1, *op2; local
153 op1 = this_cpu_ptr(&saved_next_opcode);
158 op1->addr = (kprobe_opcode_t *) regs->regs[reg_nr];
161 op1->addr =
166 op1->addr =
171 op1->addr = (kprobe_opcode_t *) regs->pr;
176 op1->addr = p->addr + 1;
186 op1->addr = p->addr + 2;
194 op1->addr = p->addr + 1;
197 op1
[all...]
/linux-master/arch/powerpc/math-emu/
H A Dmath.c28 #define FLOATFUNC(x) static inline int x(void *op1, void *op2, void *op3, \
228 void *op0 = NULL, *op1 = NULL, *op2 = NULL, *op3 = NULL; local
333 op1 = (void *)&current->thread.TS_FPR((insn >> 16) & 0x1f);
339 op1 = (void *)&current->thread.TS_FPR((insn >> 16) & 0x1f);
345 op1 = (void *)&current->thread.TS_FPR((insn >> 16) & 0x1f);
354 op1 = (void *)((idx ? regs->gpr[idx] : 0) + sdisp);
364 op1 = (void *)(regs->gpr[idx] + sdisp);
373 op1 = (void *)&current->thread.TS_FPR((insn >> 16) & 0x1f);
378 op1 = (void *)&current->thread.TS_FPR((insn >> 11) & 0x1f);
384 op1
[all...]
/linux-master/arch/arm64/crypto/
H A Dpolyval-ce-glue.c46 asmlinkage void pmull_polyval_mul(u8 *op1, const u8 *op2);
61 static void internal_polyval_mul(u8 *op1, const u8 *op2) argument
65 pmull_polyval_mul(op1, op2);
68 polyval_mul_non4k(op1, op2);
/linux-master/arch/x86/crypto/
H A Dpolyval-clmulni_glue.c50 asmlinkage void clmul_polyval_mul(u8 *op1, const u8 *op2);
70 static void internal_polyval_mul(u8 *op1, const u8 *op2) argument
74 clmul_polyval_mul(op1, op2);
77 polyval_mul_non4k(op1, op2);
H A Dcast6-avx-x86_64-asm_64.S85 #define lookup_32bit(src, dst, op1, op2, op3, interleave_op, il_reg) \
91 op1 (RID1,RID2,4), dst ## d; \
115 #define F_tail(a, x, gi1, gi2, op1, op2, op3) \
116 lookup_32bit(##gi1, RFS1, op1, op2, op3, shr_next, ##gi1); \
117 lookup_32bit(##gi2, RFS3, op1, op2, op3, shr_next, ##gi2); \
119 lookup_32bit(##gi1, RFS2, op1, op2, op3, dummy, none); \
122 lookup_32bit(##gi2, RFS1, op1, op2, op3, dummy, none); \
129 #define F_2(a1, b1, a2, b2, op0, op1, op2, op3) \
133 F_tail(b1, RX, RGI1, RGI2, op1, op2, op3); \
134 F_tail(b2, RTMP, RGI3, RGI4, op1, op
[all...]
H A Dcast5-avx-x86_64-asm_64.S85 #define lookup_32bit(src, dst, op1, op2, op3, interleave_op, il_reg) \
91 op1 (RID1,RID2,4), dst ## d; \
115 #define F_tail(a, x, gi1, gi2, op1, op2, op3) \
116 lookup_32bit(##gi1, RFS1, op1, op2, op3, shr_next, ##gi1); \
117 lookup_32bit(##gi2, RFS3, op1, op2, op3, shr_next, ##gi2); \
119 lookup_32bit(##gi1, RFS2, op1, op2, op3, dummy, none); \
122 lookup_32bit(##gi2, RFS1, op1, op2, op3, dummy, none); \
129 #define F_2(a1, b1, a2, b2, op0, op1, op2, op3) \
133 F_tail(b1, RX, RGI1, RGI2, op1, op2, op3); \
134 F_tail(b2, RTMP, RGI3, RGI4, op1, op
[all...]
/linux-master/drivers/gpu/host1x/
H A Dcdma.h83 void host1x_cdma_push(struct host1x_cdma *cdma, u32 op1, u32 op2);
84 void host1x_cdma_push_wide(struct host1x_cdma *cdma, u32 op1, u32 op2,
H A Dcdma.c138 static void host1x_pushbuffer_push(struct push_buffer *pb, u32 op1, u32 op2) argument
143 *(p++) = op1;
592 void host1x_cdma_push(struct host1x_cdma *cdma, u32 op1, u32 op2) argument
600 op1, op2);
610 host1x_pushbuffer_push(pb, op1, op2);
622 void host1x_cdma_push_wide(struct host1x_cdma *cdma, u32 op1, u32 op2, argument
631 trace_host1x_cdma_push_wide(dev_name(channel->dev), op1, op2,
655 host1x_pushbuffer_push(pb, op1, op2);
/linux-master/arch/arm64/tools/
H A Dgen-sysreg.awk155 op1 = $4
164 define("REG_" reg, "S" op0 "_" op1 "_C" crn "_C" crm "_" op2)
165 define("SYS_" reg, "sys_reg(" op0 ", " op1 ", " crn ", " crm ", " op2 ")")
168 define("SYS_" reg "_Op1", op1)
195 op1 = null
/linux-master/crypto/
H A Dpolyval-generic.c87 void polyval_mul_non4k(u8 *op1, const u8 *op2) argument
92 copy_and_reverse((u8 *)&a, op1);
96 copy_and_reverse(op1, (u8 *)&a);
/linux-master/arch/arm64/include/asm/
H A Desr.h206 #define ESR_ELx_SYS64_ISS_SYS_VAL(op0, op1, op2, crn, crm) \
208 ((op1) << ESR_ELx_SYS64_ISS_OP1_SHIFT) | \
220 * op0=1, op1=3, op2=1, crn=7, crm={ 5, 10, 11, 12, 13, 14 }, WRITE (L=0)
240 * op0 = 3, op1= 0, crn = 0, {crm = 0, 4-7}, READ (L = 1)
322 #define ESR_ELx_CP15_32_ISS_SYS_VAL(op1, op2, crn, crm) \
323 (((op1) << ESR_ELx_CP15_32_ISS_OP1_SHIFT) | \
343 #define ESR_ELx_CP15_64_ISS_SYS_VAL(op1, crm) \
344 (((op1) << ESR_ELx_CP15_64_ISS_OP1_SHIFT) | \
/linux-master/tools/arch/arm/include/uapi/asm/
H A Dkvm.h166 #define __ARM_CP15_REG(op1,crn,crm,op2) \
168 ARM_CP15_REG_SHIFT_MASK(op1, OPC1) | \
175 #define __ARM_CP15_REG64(op1,crm) \
176 (__ARM_CP15_REG(op1, 0, crm, 0) | KVM_REG_SIZE_U64)
/linux-master/arch/x86/kvm/vmx/
H A Dvmx_ops.h189 #define vmx_asm1(insn, op1, error_args...) \
195 : : op1 : "cc" : error, fault); \
206 #define vmx_asm2(insn, op1, op2, error_args...) \
212 : : op1, op2 : "cc" : error, fault); \
/linux-master/arch/arm64/include/uapi/asm/
H A Dkvm.h249 #define __ARM64_SYS_REG(op0,op1,crn,crm,op2) \
252 ARM64_SYS_REG_SHIFT_MASK(op1, OP1) | \
518 * AArch64 with op0==3, op1=={0, 1, 3}, CRn==0, CRm=={0-7},
527 #define KVM_ARM_FEATURE_ID_RANGE_IDX(op0, op1, crn, crm, op2) \
529 __u64 __op1 = (op1) & 3; \
/linux-master/tools/arch/arm64/include/uapi/asm/
H A Dkvm.h249 #define __ARM64_SYS_REG(op0,op1,crn,crm,op2) \
252 ARM64_SYS_REG_SHIFT_MASK(op1, OP1) | \
518 * AArch64 with op0==3, op1=={0, 1, 3}, CRn==0, CRm=={0-7},
527 #define KVM_ARM_FEATURE_ID_RANGE_IDX(op0, op1, crn, crm, op2) \
529 __u64 __op1 = (op1) & 3; \
/linux-master/drivers/gpu/host1x/hw/
H A Dchannel_hw.c145 u32 op1 = host1x_opcode_gather_wide(g->words); local
148 host1x_cdma_push_wide(cdma, op1, op2, op3, op4);
155 u32 op1 = host1x_opcode_gather(g->words); local
157 host1x_cdma_push(cdma, op1, op2);

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