Searched refs:nvif_wr32 (Results 1 - 15 of 15) sorted by relevance

/linux-master/drivers/gpu/drm/nouveau/dispnv04/
H A Doverlay.c154 nvif_wr32(dev, NV_PVIDEO_BASE(flip), 0);
155 nvif_wr32(dev, NV_PVIDEO_OFFSET_BUFF(flip), nvbo->offset);
156 nvif_wr32(dev, NV_PVIDEO_SIZE_IN(flip), src_h << 16 | src_w);
157 nvif_wr32(dev, NV_PVIDEO_POINT_IN(flip), src_y << 16 | src_x);
158 nvif_wr32(dev, NV_PVIDEO_DS_DX(flip), (src_w << 20) / crtc_w);
159 nvif_wr32(dev, NV_PVIDEO_DT_DY(flip), (src_h << 20) / crtc_h);
160 nvif_wr32(dev, NV_PVIDEO_POINT_OUT(flip), crtc_y << 16 | crtc_x);
161 nvif_wr32(dev, NV_PVIDEO_SIZE_OUT(flip), crtc_h << 16 | crtc_w);
175 nvif_wr32(dev, NV_PVIDEO_UVPLANE_BASE(flip), 0);
176 nvif_wr32(de
[all...]
H A Dhw.c683 nvif_wr32(device, NV_PVIDEO_STOP, 1);
684 nvif_wr32(device, NV_PVIDEO_INTR_EN, 0);
685 nvif_wr32(device, NV_PVIDEO_OFFSET_BUFF(0), 0);
686 nvif_wr32(device, NV_PVIDEO_OFFSET_BUFF(1), 0);
687 nvif_wr32(device, NV_PVIDEO_LIMIT(0), drm->client.device.info.ram_size - 1);
688 nvif_wr32(device, NV_PVIDEO_LIMIT(1), drm->client.device.info.ram_size - 1);
689 nvif_wr32(device, NV_PVIDEO_UVPLANE_LIMIT(0), drm->client.device.info.ram_size - 1);
690 nvif_wr32(device, NV_PVIDEO_UVPLANE_LIMIT(1), drm->client.device.info.ram_size - 1);
691 nvif_wr32(device, NV_PBUS_POWERCTRL_2, 0);
H A Dtvnv17.h134 nvif_wr32(&device->object, reg, val);
H A Ddac.c266 nvif_wr32(device, NV_PBUS_POWERCTRL_2, saved_powerctrl_2 & 0xd7ffffff);
269 nvif_wr32(device, NV_PBUS_POWERCTRL_4, saved_powerctrl_4 & 0xffffffcf);
324 nvif_wr32(device, NV_PBUS_POWERCTRL_4, saved_powerctrl_4);
325 nvif_wr32(device, NV_PBUS_POWERCTRL_2, saved_powerctrl_2);
H A Dhw.h76 nvif_wr32(device, reg, val);
96 nvif_wr32(device, reg, val);
/linux-master/drivers/gpu/drm/nouveau/nvif/
H A Duserc361.c40 nvif_wr32(&user->object, 0x90, token);
/linux-master/drivers/gpu/drm/nouveau/
H A Dnouveau_vga.c19 nvif_wr32(device, 0x088060, state);
22 nvif_wr32(device, 0x088054, state);
24 nvif_wr32(device, 0x001854, state);
H A Dnouveau_led.c72 nvif_wr32(device, 0x61c880, div);
73 nvif_wr32(device, 0x61c884, 0xc0000000 | duty);
H A Dnouveau_dma.h87 nvif_wr32(&chan->user, chan->user_put, ((val) << 2) + chan->push.addr);\
H A Dnouveau_dma.c92 nvif_wr32(chan->userd, 0x8c, chan->dma.ib_put);
H A Dnouveau_backlight.c84 nvif_wr32(device, NV40_PMC_BACKLIGHT,
H A Dnouveau_bios.c257 nvif_wr32(device, NV_PBUS_POWERCTRL_2, 0);
1952 nvif_wr32(device, 0x00001304, ROM32(bios->data[hwsq_entry_offset]));
1957 nvif_wr32(device, 0x00001400 + i, ROM32(bios->data[hwsq_entry_offset + i + 4]));
1960 nvif_wr32(device, NV_PBUS_DEBUG_4, nvif_rd32(device, NV_PBUS_DEBUG_4) | 0x18);
H A Dnouveau_svm.c746 nvif_wr32(device, buffer->getaddr, buffer->get);
/linux-master/drivers/gpu/drm/nouveau/include/nvif/
H A Dobject.h70 #define nvif_wr32(a,b,c) nvif_wr((a), iowrite32_native, 4, (b), (u32)(c)) macro
74 nvif_wr32(__object, _addr, (_data & ~(c)) | (d)); \
126 #define NVIF_WR32_(p,o,dr,f) nvif_wr32((p), (o) + (dr), (f))
/linux-master/drivers/gpu/drm/nouveau/dispnv50/
H A Ddisp.c142 nvif_wr32(&device->object, 0x070000, 0x00000001);

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