1/* 2 * Copyright 2005-2006 Erik Waling 3 * Copyright 2006 Stephane Marchesin 4 * Copyright 2007-2009 Stuart Bennett 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 20 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF 21 * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 22 * SOFTWARE. 23 */ 24 25#include "nouveau_drv.h" 26#include "nouveau_bios.h" 27#include "nouveau_reg.h" 28#include "dispnv04/hw.h" 29#include "nouveau_encoder.h" 30 31#include <subdev/gsp.h> 32 33#include <linux/io-mapping.h> 34#include <linux/firmware.h> 35 36/* these defines are made up */ 37#define NV_CIO_CRE_44_HEADA 0x0 38#define NV_CIO_CRE_44_HEADB 0x3 39#define FEATURE_MOBILE 0x10 /* also FEATURE_QUADRO for BMP */ 40 41#define EDID1_LEN 128 42 43#define BIOSLOG(sip, fmt, arg...) NV_DEBUG(sip->dev, fmt, ##arg) 44#define LOG_OLD_VALUE(x) 45 46struct init_exec { 47 bool execute; 48 bool repeat; 49}; 50 51static bool nv_cksum(const uint8_t *data, unsigned int length) 52{ 53 /* 54 * There's a few checksums in the BIOS, so here's a generic checking 55 * function. 56 */ 57 int i; 58 uint8_t sum = 0; 59 60 for (i = 0; i < length; i++) 61 sum += data[i]; 62 63 if (sum) 64 return true; 65 66 return false; 67} 68 69static uint16_t clkcmptable(struct nvbios *bios, uint16_t clktable, int pxclk) 70{ 71 int compare_record_len, i = 0; 72 uint16_t compareclk, scriptptr = 0; 73 74 if (bios->major_version < 5) /* pre BIT */ 75 compare_record_len = 3; 76 else 77 compare_record_len = 4; 78 79 do { 80 compareclk = ROM16(bios->data[clktable + compare_record_len * i]); 81 if (pxclk >= compareclk * 10) { 82 if (bios->major_version < 5) { 83 uint8_t tmdssub = bios->data[clktable + 2 + compare_record_len * i]; 84 scriptptr = ROM16(bios->data[bios->init_script_tbls_ptr + tmdssub * 2]); 85 } else 86 scriptptr = ROM16(bios->data[clktable + 2 + compare_record_len * i]); 87 break; 88 } 89 i++; 90 } while (compareclk); 91 92 return scriptptr; 93} 94 95static void 96run_digital_op_script(struct drm_device *dev, uint16_t scriptptr, 97 struct dcb_output *dcbent, int head, bool dl) 98{ 99 struct nouveau_drm *drm = nouveau_drm(dev); 100 101 NV_INFO(drm, "0x%04X: Parsing digital output script table\n", 102 scriptptr); 103 NVWriteVgaCrtc(dev, 0, NV_CIO_CRE_44, head ? NV_CIO_CRE_44_HEADB : 104 NV_CIO_CRE_44_HEADA); 105 nouveau_bios_run_init_table(dev, scriptptr, dcbent, head); 106 107 nv04_dfp_bind_head(dev, dcbent, head, dl); 108} 109 110static int call_lvds_manufacturer_script(struct drm_device *dev, struct dcb_output *dcbent, int head, enum LVDS_script script) 111{ 112 struct nouveau_drm *drm = nouveau_drm(dev); 113 struct nvbios *bios = &drm->vbios; 114 uint8_t sub = bios->data[bios->fp.xlated_entry + script] + (bios->fp.link_c_increment && dcbent->or & DCB_OUTPUT_C ? 1 : 0); 115 uint16_t scriptofs = ROM16(bios->data[bios->init_script_tbls_ptr + sub * 2]); 116#ifdef __powerpc__ 117 struct pci_dev *pdev = to_pci_dev(dev->dev); 118#endif 119 120 if (!bios->fp.xlated_entry || !sub || !scriptofs) 121 return -EINVAL; 122 123 run_digital_op_script(dev, scriptofs, dcbent, head, bios->fp.dual_link); 124 125 if (script == LVDS_PANEL_OFF) { 126 /* off-on delay in ms */ 127 mdelay(ROM16(bios->data[bios->fp.xlated_entry + 7])); 128 } 129#ifdef __powerpc__ 130 /* Powerbook specific quirks */ 131 if (script == LVDS_RESET && 132 (pdev->device == 0x0179 || pdev->device == 0x0189 || 133 pdev->device == 0x0329)) 134 nv_write_tmds(dev, dcbent->or, 0, 0x02, 0x72); 135#endif 136 137 return 0; 138} 139 140static int run_lvds_table(struct drm_device *dev, struct dcb_output *dcbent, int head, enum LVDS_script script, int pxclk) 141{ 142 /* 143 * The BIT LVDS table's header has the information to setup the 144 * necessary registers. Following the standard 4 byte header are: 145 * A bitmask byte and a dual-link transition pxclk value for use in 146 * selecting the init script when not using straps; 4 script pointers 147 * for panel power, selected by output and on/off; and 8 table pointers 148 * for panel init, the needed one determined by output, and bits in the 149 * conf byte. These tables are similar to the TMDS tables, consisting 150 * of a list of pxclks and script pointers. 151 */ 152 struct nouveau_drm *drm = nouveau_drm(dev); 153 struct nvbios *bios = &drm->vbios; 154 unsigned int outputset = (dcbent->or == 4) ? 1 : 0; 155 uint16_t scriptptr = 0, clktable; 156 157 /* 158 * For now we assume version 3.0 table - g80 support will need some 159 * changes 160 */ 161 162 switch (script) { 163 case LVDS_INIT: 164 return -ENOSYS; 165 case LVDS_BACKLIGHT_ON: 166 case LVDS_PANEL_ON: 167 scriptptr = ROM16(bios->data[bios->fp.lvdsmanufacturerpointer + 7 + outputset * 2]); 168 break; 169 case LVDS_BACKLIGHT_OFF: 170 case LVDS_PANEL_OFF: 171 scriptptr = ROM16(bios->data[bios->fp.lvdsmanufacturerpointer + 11 + outputset * 2]); 172 break; 173 case LVDS_RESET: 174 clktable = bios->fp.lvdsmanufacturerpointer + 15; 175 if (dcbent->or == 4) 176 clktable += 8; 177 178 if (dcbent->lvdsconf.use_straps_for_mode) { 179 if (bios->fp.dual_link) 180 clktable += 4; 181 if (bios->fp.if_is_24bit) 182 clktable += 2; 183 } else { 184 /* using EDID */ 185 int cmpval_24bit = (dcbent->or == 4) ? 4 : 1; 186 187 if (bios->fp.dual_link) { 188 clktable += 4; 189 cmpval_24bit <<= 1; 190 } 191 192 if (bios->fp.strapless_is_24bit & cmpval_24bit) 193 clktable += 2; 194 } 195 196 clktable = ROM16(bios->data[clktable]); 197 if (!clktable) { 198 NV_ERROR(drm, "Pixel clock comparison table not found\n"); 199 return -ENOENT; 200 } 201 scriptptr = clkcmptable(bios, clktable, pxclk); 202 } 203 204 if (!scriptptr) { 205 NV_ERROR(drm, "LVDS output init script not found\n"); 206 return -ENOENT; 207 } 208 run_digital_op_script(dev, scriptptr, dcbent, head, bios->fp.dual_link); 209 210 return 0; 211} 212 213int call_lvds_script(struct drm_device *dev, struct dcb_output *dcbent, int head, enum LVDS_script script, int pxclk) 214{ 215 /* 216 * LVDS operations are multiplexed in an effort to present a single API 217 * which works with two vastly differing underlying structures. 218 * This acts as the demux 219 */ 220 221 struct nouveau_drm *drm = nouveau_drm(dev); 222 struct nvif_object *device = &drm->client.device.object; 223 struct nvbios *bios = &drm->vbios; 224 uint8_t lvds_ver = bios->data[bios->fp.lvdsmanufacturerpointer]; 225 uint32_t sel_clk_binding, sel_clk; 226 int ret; 227 228 if (bios->fp.last_script_invoc == (script << 1 | head) || !lvds_ver || 229 (lvds_ver >= 0x30 && script == LVDS_INIT)) 230 return 0; 231 232 if (!bios->fp.lvds_init_run) { 233 bios->fp.lvds_init_run = true; 234 call_lvds_script(dev, dcbent, head, LVDS_INIT, pxclk); 235 } 236 237 if (script == LVDS_PANEL_ON && bios->fp.reset_after_pclk_change) 238 call_lvds_script(dev, dcbent, head, LVDS_RESET, pxclk); 239 if (script == LVDS_RESET && bios->fp.power_off_for_reset) 240 call_lvds_script(dev, dcbent, head, LVDS_PANEL_OFF, pxclk); 241 242 NV_INFO(drm, "Calling LVDS script %d:\n", script); 243 244 /* don't let script change pll->head binding */ 245 sel_clk_binding = nvif_rd32(device, NV_PRAMDAC_SEL_CLK) & 0x50000; 246 247 if (lvds_ver < 0x30) 248 ret = call_lvds_manufacturer_script(dev, dcbent, head, script); 249 else 250 ret = run_lvds_table(dev, dcbent, head, script, pxclk); 251 252 bios->fp.last_script_invoc = (script << 1 | head); 253 254 sel_clk = NVReadRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK) & ~0x50000; 255 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK, sel_clk | sel_clk_binding); 256 /* some scripts set a value in NV_PBUS_POWERCTRL_2 and break video overlay */ 257 nvif_wr32(device, NV_PBUS_POWERCTRL_2, 0); 258 259 return ret; 260} 261 262struct lvdstableheader { 263 uint8_t lvds_ver, headerlen, recordlen; 264}; 265 266static int parse_lvds_manufacturer_table_header(struct drm_device *dev, struct nvbios *bios, struct lvdstableheader *lth) 267{ 268 /* 269 * BMP version (0xa) LVDS table has a simple header of version and 270 * record length. The BIT LVDS table has the typical BIT table header: 271 * version byte, header length byte, record length byte, and a byte for 272 * the maximum number of records that can be held in the table. 273 */ 274 275 struct nouveau_drm *drm = nouveau_drm(dev); 276 uint8_t lvds_ver, headerlen, recordlen; 277 278 memset(lth, 0, sizeof(struct lvdstableheader)); 279 280 if (bios->fp.lvdsmanufacturerpointer == 0x0) { 281 NV_ERROR(drm, "Pointer to LVDS manufacturer table invalid\n"); 282 return -EINVAL; 283 } 284 285 lvds_ver = bios->data[bios->fp.lvdsmanufacturerpointer]; 286 287 switch (lvds_ver) { 288 case 0x0a: /* pre NV40 */ 289 headerlen = 2; 290 recordlen = bios->data[bios->fp.lvdsmanufacturerpointer + 1]; 291 break; 292 case 0x30: /* NV4x */ 293 headerlen = bios->data[bios->fp.lvdsmanufacturerpointer + 1]; 294 if (headerlen < 0x1f) { 295 NV_ERROR(drm, "LVDS table header not understood\n"); 296 return -EINVAL; 297 } 298 recordlen = bios->data[bios->fp.lvdsmanufacturerpointer + 2]; 299 break; 300 case 0x40: /* G80/G90 */ 301 headerlen = bios->data[bios->fp.lvdsmanufacturerpointer + 1]; 302 if (headerlen < 0x7) { 303 NV_ERROR(drm, "LVDS table header not understood\n"); 304 return -EINVAL; 305 } 306 recordlen = bios->data[bios->fp.lvdsmanufacturerpointer + 2]; 307 break; 308 default: 309 NV_ERROR(drm, 310 "LVDS table revision %d.%d not currently supported\n", 311 lvds_ver >> 4, lvds_ver & 0xf); 312 return -ENOSYS; 313 } 314 315 lth->lvds_ver = lvds_ver; 316 lth->headerlen = headerlen; 317 lth->recordlen = recordlen; 318 319 return 0; 320} 321 322static int 323get_fp_strap(struct drm_device *dev, struct nvbios *bios) 324{ 325 struct nouveau_drm *drm = nouveau_drm(dev); 326 struct nvif_object *device = &drm->client.device.object; 327 328 /* 329 * The fp strap is normally dictated by the "User Strap" in 330 * PEXTDEV_BOOT_0[20:16], but on BMP cards when bit 2 of the 331 * Internal_Flags struct at 0x48 is set, the user strap gets overriden 332 * by the PCI subsystem ID during POST, but not before the previous user 333 * strap has been committed to CR58 for CR57=0xf on head A, which may be 334 * read and used instead 335 */ 336 337 if (bios->major_version < 5 && bios->data[0x48] & 0x4) 338 return NVReadVgaCrtc5758(dev, 0, 0xf) & 0xf; 339 340 if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_MAXWELL) 341 return nvif_rd32(device, 0x001800) & 0x0000000f; 342 else 343 if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA) 344 return (nvif_rd32(device, NV_PEXTDEV_BOOT_0) >> 24) & 0xf; 345 else 346 return (nvif_rd32(device, NV_PEXTDEV_BOOT_0) >> 16) & 0xf; 347} 348 349static int parse_fp_mode_table(struct drm_device *dev, struct nvbios *bios) 350{ 351 struct nouveau_drm *drm = nouveau_drm(dev); 352 uint8_t *fptable; 353 uint8_t fptable_ver, headerlen = 0, recordlen, fpentries = 0xf, fpindex; 354 int ret, ofs, fpstrapping; 355 struct lvdstableheader lth; 356 357 if (bios->fp.fptablepointer == 0x0) { 358 /* Most laptop cards lack an fp table. They use DDC. */ 359 NV_DEBUG(drm, "Pointer to flat panel table invalid\n"); 360 bios->digital_min_front_porch = 0x4b; 361 return 0; 362 } 363 364 fptable = &bios->data[bios->fp.fptablepointer]; 365 fptable_ver = fptable[0]; 366 367 switch (fptable_ver) { 368 /* 369 * BMP version 0x5.0x11 BIOSen have version 1 like tables, but no 370 * version field, and miss one of the spread spectrum/PWM bytes. 371 * This could affect early GF2Go parts (not seen any appropriate ROMs 372 * though). Here we assume that a version of 0x05 matches this case 373 * (combining with a BMP version check would be better), as the 374 * common case for the panel type field is 0x0005, and that is in 375 * fact what we are reading the first byte of. 376 */ 377 case 0x05: /* some NV10, 11, 15, 16 */ 378 recordlen = 42; 379 ofs = -1; 380 break; 381 case 0x10: /* some NV15/16, and NV11+ */ 382 recordlen = 44; 383 ofs = 0; 384 break; 385 case 0x20: /* NV40+ */ 386 headerlen = fptable[1]; 387 recordlen = fptable[2]; 388 fpentries = fptable[3]; 389 /* 390 * fptable[4] is the minimum 391 * RAMDAC_FP_HCRTC -> RAMDAC_FP_HSYNC_START gap 392 */ 393 bios->digital_min_front_porch = fptable[4]; 394 ofs = -7; 395 break; 396 default: 397 NV_ERROR(drm, 398 "FP table revision %d.%d not currently supported\n", 399 fptable_ver >> 4, fptable_ver & 0xf); 400 return -ENOSYS; 401 } 402 403 if (!bios->is_mobile) /* !mobile only needs digital_min_front_porch */ 404 return 0; 405 406 ret = parse_lvds_manufacturer_table_header(dev, bios, <h); 407 if (ret) 408 return ret; 409 410 if (lth.lvds_ver == 0x30 || lth.lvds_ver == 0x40) { 411 bios->fp.fpxlatetableptr = bios->fp.lvdsmanufacturerpointer + 412 lth.headerlen + 1; 413 bios->fp.xlatwidth = lth.recordlen; 414 } 415 if (bios->fp.fpxlatetableptr == 0x0) { 416 NV_ERROR(drm, "Pointer to flat panel xlat table invalid\n"); 417 return -EINVAL; 418 } 419 420 fpstrapping = get_fp_strap(dev, bios); 421 422 fpindex = bios->data[bios->fp.fpxlatetableptr + 423 fpstrapping * bios->fp.xlatwidth]; 424 425 if (fpindex > fpentries) { 426 NV_ERROR(drm, "Bad flat panel table index\n"); 427 return -ENOENT; 428 } 429 430 /* nv4x cards need both a strap value and fpindex of 0xf to use DDC */ 431 if (lth.lvds_ver > 0x10) 432 bios->fp_no_ddc = fpstrapping != 0xf || fpindex != 0xf; 433 434 /* 435 * If either the strap or xlated fpindex value are 0xf there is no 436 * panel using a strap-derived bios mode present. this condition 437 * includes, but is different from, the DDC panel indicator above 438 */ 439 if (fpstrapping == 0xf || fpindex == 0xf) 440 return 0; 441 442 bios->fp.mode_ptr = bios->fp.fptablepointer + headerlen + 443 recordlen * fpindex + ofs; 444 445 NV_INFO(drm, "BIOS FP mode: %dx%d (%dkHz pixel clock)\n", 446 ROM16(bios->data[bios->fp.mode_ptr + 11]) + 1, 447 ROM16(bios->data[bios->fp.mode_ptr + 25]) + 1, 448 ROM16(bios->data[bios->fp.mode_ptr + 7]) * 10); 449 450 return 0; 451} 452 453bool nouveau_bios_fp_mode(struct drm_device *dev, struct drm_display_mode *mode) 454{ 455 struct nouveau_drm *drm = nouveau_drm(dev); 456 struct nvbios *bios = &drm->vbios; 457 uint8_t *mode_entry = &bios->data[bios->fp.mode_ptr]; 458 459 if (!mode) /* just checking whether we can produce a mode */ 460 return bios->fp.mode_ptr; 461 462 memset(mode, 0, sizeof(struct drm_display_mode)); 463 /* 464 * For version 1.0 (version in byte 0): 465 * bytes 1-2 are "panel type", including bits on whether Colour/mono, 466 * single/dual link, and type (TFT etc.) 467 * bytes 3-6 are bits per colour in RGBX 468 */ 469 mode->clock = ROM16(mode_entry[7]) * 10; 470 /* bytes 9-10 is HActive */ 471 mode->hdisplay = ROM16(mode_entry[11]) + 1; 472 /* 473 * bytes 13-14 is HValid Start 474 * bytes 15-16 is HValid End 475 */ 476 mode->hsync_start = ROM16(mode_entry[17]) + 1; 477 mode->hsync_end = ROM16(mode_entry[19]) + 1; 478 mode->htotal = ROM16(mode_entry[21]) + 1; 479 /* bytes 23-24, 27-30 similarly, but vertical */ 480 mode->vdisplay = ROM16(mode_entry[25]) + 1; 481 mode->vsync_start = ROM16(mode_entry[31]) + 1; 482 mode->vsync_end = ROM16(mode_entry[33]) + 1; 483 mode->vtotal = ROM16(mode_entry[35]) + 1; 484 mode->flags |= (mode_entry[37] & 0x10) ? 485 DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; 486 mode->flags |= (mode_entry[37] & 0x1) ? 487 DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; 488 /* 489 * bytes 38-39 relate to spread spectrum settings 490 * bytes 40-43 are something to do with PWM 491 */ 492 493 mode->status = MODE_OK; 494 mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED; 495 drm_mode_set_name(mode); 496 return bios->fp.mode_ptr; 497} 498 499int nouveau_bios_parse_lvds_table(struct drm_device *dev, int pxclk, bool *dl, bool *if_is_24bit) 500{ 501 /* 502 * The LVDS table header is (mostly) described in 503 * parse_lvds_manufacturer_table_header(): the BIT header additionally 504 * contains the dual-link transition pxclk (in 10s kHz), at byte 5 - if 505 * straps are not being used for the panel, this specifies the frequency 506 * at which modes should be set up in the dual link style. 507 * 508 * Following the header, the BMP (ver 0xa) table has several records, 509 * indexed by a separate xlat table, indexed in turn by the fp strap in 510 * EXTDEV_BOOT. Each record had a config byte, followed by 6 script 511 * numbers for use by INIT_SUB which controlled panel init and power, 512 * and finally a dword of ms to sleep between power off and on 513 * operations. 514 * 515 * In the BIT versions, the table following the header serves as an 516 * integrated config and xlat table: the records in the table are 517 * indexed by the FP strap nibble in EXTDEV_BOOT, and each record has 518 * two bytes - the first as a config byte, the second for indexing the 519 * fp mode table pointed to by the BIT 'D' table 520 * 521 * DDC is not used until after card init, so selecting the correct table 522 * entry and setting the dual link flag for EDID equipped panels, 523 * requiring tests against the native-mode pixel clock, cannot be done 524 * until later, when this function should be called with non-zero pxclk 525 */ 526 struct nouveau_drm *drm = nouveau_drm(dev); 527 struct nvbios *bios = &drm->vbios; 528 int fpstrapping = get_fp_strap(dev, bios), lvdsmanufacturerindex = 0; 529 struct lvdstableheader lth; 530 uint16_t lvdsofs; 531 int ret, chip_version = bios->chip_version; 532 533 ret = parse_lvds_manufacturer_table_header(dev, bios, <h); 534 if (ret) 535 return ret; 536 537 switch (lth.lvds_ver) { 538 case 0x0a: /* pre NV40 */ 539 lvdsmanufacturerindex = bios->data[ 540 bios->fp.fpxlatemanufacturertableptr + 541 fpstrapping]; 542 543 /* we're done if this isn't the EDID panel case */ 544 if (!pxclk) 545 break; 546 547 if (chip_version < 0x25) { 548 /* nv17 behaviour 549 * 550 * It seems the old style lvds script pointer is reused 551 * to select 18/24 bit colour depth for EDID panels. 552 */ 553 lvdsmanufacturerindex = 554 (bios->legacy.lvds_single_a_script_ptr & 1) ? 555 2 : 0; 556 if (pxclk >= bios->fp.duallink_transition_clk) 557 lvdsmanufacturerindex++; 558 } else if (chip_version < 0x30) { 559 /* nv28 behaviour (off-chip encoder) 560 * 561 * nv28 does a complex dance of first using byte 121 of 562 * the EDID to choose the lvdsmanufacturerindex, then 563 * later attempting to match the EDID manufacturer and 564 * product IDs in a table (signature 'pidt' (panel id 565 * table?)), setting an lvdsmanufacturerindex of 0 and 566 * an fp strap of the match index (or 0xf if none) 567 */ 568 lvdsmanufacturerindex = 0; 569 } else { 570 /* nv31, nv34 behaviour */ 571 lvdsmanufacturerindex = 0; 572 if (pxclk >= bios->fp.duallink_transition_clk) 573 lvdsmanufacturerindex = 2; 574 if (pxclk >= 140000) 575 lvdsmanufacturerindex = 3; 576 } 577 578 /* 579 * nvidia set the high nibble of (cr57=f, cr58) to 580 * lvdsmanufacturerindex in this case; we don't 581 */ 582 break; 583 case 0x30: /* NV4x */ 584 case 0x40: /* G80/G90 */ 585 lvdsmanufacturerindex = fpstrapping; 586 break; 587 default: 588 NV_ERROR(drm, "LVDS table revision not currently supported\n"); 589 return -ENOSYS; 590 } 591 592 lvdsofs = bios->fp.xlated_entry = bios->fp.lvdsmanufacturerpointer + lth.headerlen + lth.recordlen * lvdsmanufacturerindex; 593 switch (lth.lvds_ver) { 594 case 0x0a: 595 bios->fp.power_off_for_reset = bios->data[lvdsofs] & 1; 596 bios->fp.reset_after_pclk_change = bios->data[lvdsofs] & 2; 597 bios->fp.dual_link = bios->data[lvdsofs] & 4; 598 bios->fp.link_c_increment = bios->data[lvdsofs] & 8; 599 *if_is_24bit = bios->data[lvdsofs] & 16; 600 break; 601 case 0x30: 602 case 0x40: 603 /* 604 * No sign of the "power off for reset" or "reset for panel 605 * on" bits, but it's safer to assume we should 606 */ 607 bios->fp.power_off_for_reset = true; 608 bios->fp.reset_after_pclk_change = true; 609 610 /* 611 * It's ok lvdsofs is wrong for nv4x edid case; dual_link is 612 * over-written, and if_is_24bit isn't used 613 */ 614 bios->fp.dual_link = bios->data[lvdsofs] & 1; 615 bios->fp.if_is_24bit = bios->data[lvdsofs] & 2; 616 bios->fp.strapless_is_24bit = bios->data[bios->fp.lvdsmanufacturerpointer + 4]; 617 bios->fp.duallink_transition_clk = ROM16(bios->data[bios->fp.lvdsmanufacturerpointer + 5]) * 10; 618 break; 619 } 620 621 /* set dual_link flag for EDID case */ 622 if (pxclk && (chip_version < 0x25 || chip_version > 0x28)) 623 bios->fp.dual_link = (pxclk >= bios->fp.duallink_transition_clk); 624 625 *dl = bios->fp.dual_link; 626 627 return 0; 628} 629 630int run_tmds_table(struct drm_device *dev, struct dcb_output *dcbent, int head, int pxclk) 631{ 632 /* 633 * the pxclk parameter is in kHz 634 * 635 * This runs the TMDS regs setting code found on BIT bios cards 636 * 637 * For ffs(or) == 1 use the first table, for ffs(or) == 2 and 638 * ffs(or) == 3, use the second. 639 */ 640 641 struct nouveau_drm *drm = nouveau_drm(dev); 642 struct nvif_object *device = &drm->client.device.object; 643 struct nvbios *bios = &drm->vbios; 644 int cv = bios->chip_version; 645 uint16_t clktable = 0, scriptptr; 646 uint32_t sel_clk_binding, sel_clk; 647 648 /* pre-nv17 off-chip tmds uses scripts, post nv17 doesn't */ 649 if (cv >= 0x17 && cv != 0x1a && cv != 0x20 && 650 dcbent->location != DCB_LOC_ON_CHIP) 651 return 0; 652 653 switch (ffs(dcbent->or)) { 654 case 1: 655 clktable = bios->tmds.output0_script_ptr; 656 break; 657 case 2: 658 case 3: 659 clktable = bios->tmds.output1_script_ptr; 660 break; 661 } 662 663 if (!clktable) { 664 NV_ERROR(drm, "Pixel clock comparison table not found\n"); 665 return -EINVAL; 666 } 667 668 scriptptr = clkcmptable(bios, clktable, pxclk); 669 670 if (!scriptptr) { 671 NV_ERROR(drm, "TMDS output init script not found\n"); 672 return -ENOENT; 673 } 674 675 /* don't let script change pll->head binding */ 676 sel_clk_binding = nvif_rd32(device, NV_PRAMDAC_SEL_CLK) & 0x50000; 677 run_digital_op_script(dev, scriptptr, dcbent, head, pxclk >= 165000); 678 sel_clk = NVReadRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK) & ~0x50000; 679 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK, sel_clk | sel_clk_binding); 680 681 return 0; 682} 683 684static void parse_script_table_pointers(struct nvbios *bios, uint16_t offset) 685{ 686 /* 687 * Parses the init table segment for pointers used in script execution. 688 * 689 * offset + 0 (16 bits): init script tables pointer 690 * offset + 2 (16 bits): macro index table pointer 691 * offset + 4 (16 bits): macro table pointer 692 * offset + 6 (16 bits): condition table pointer 693 * offset + 8 (16 bits): io condition table pointer 694 * offset + 10 (16 bits): io flag condition table pointer 695 * offset + 12 (16 bits): init function table pointer 696 */ 697 698 bios->init_script_tbls_ptr = ROM16(bios->data[offset]); 699} 700 701static int parse_bit_A_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry) 702{ 703 /* 704 * Parses the load detect values for g80 cards. 705 * 706 * offset + 0 (16 bits): loadval table pointer 707 */ 708 709 struct nouveau_drm *drm = nouveau_drm(dev); 710 uint16_t load_table_ptr; 711 uint8_t version, headerlen, entrylen, num_entries; 712 713 if (bitentry->length != 3) { 714 NV_ERROR(drm, "Do not understand BIT A table\n"); 715 return -EINVAL; 716 } 717 718 load_table_ptr = ROM16(bios->data[bitentry->offset]); 719 720 if (load_table_ptr == 0x0) { 721 NV_DEBUG(drm, "Pointer to BIT loadval table invalid\n"); 722 return -EINVAL; 723 } 724 725 version = bios->data[load_table_ptr]; 726 727 if (version != 0x10) { 728 NV_ERROR(drm, "BIT loadval table version %d.%d not supported\n", 729 version >> 4, version & 0xF); 730 return -ENOSYS; 731 } 732 733 headerlen = bios->data[load_table_ptr + 1]; 734 entrylen = bios->data[load_table_ptr + 2]; 735 num_entries = bios->data[load_table_ptr + 3]; 736 737 if (headerlen != 4 || entrylen != 4 || num_entries != 2) { 738 NV_ERROR(drm, "Do not understand BIT loadval table\n"); 739 return -EINVAL; 740 } 741 742 /* First entry is normal dac, 2nd tv-out perhaps? */ 743 bios->dactestval = ROM32(bios->data[load_table_ptr + headerlen]) & 0x3ff; 744 745 return 0; 746} 747 748static int parse_bit_display_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry) 749{ 750 /* 751 * Parses the flat panel table segment that the bit entry points to. 752 * Starting at bitentry->offset: 753 * 754 * offset + 0 (16 bits): ??? table pointer - seems to have 18 byte 755 * records beginning with a freq. 756 * offset + 2 (16 bits): mode table pointer 757 */ 758 struct nouveau_drm *drm = nouveau_drm(dev); 759 760 if (bitentry->length != 4) { 761 NV_ERROR(drm, "Do not understand BIT display table\n"); 762 return -EINVAL; 763 } 764 765 bios->fp.fptablepointer = ROM16(bios->data[bitentry->offset + 2]); 766 767 return 0; 768} 769 770static int parse_bit_init_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry) 771{ 772 /* 773 * Parses the init table segment that the bit entry points to. 774 * 775 * See parse_script_table_pointers for layout 776 */ 777 struct nouveau_drm *drm = nouveau_drm(dev); 778 779 if (bitentry->length < 14) { 780 NV_ERROR(drm, "Do not understand init table\n"); 781 return -EINVAL; 782 } 783 784 parse_script_table_pointers(bios, bitentry->offset); 785 return 0; 786} 787 788static int parse_bit_i_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry) 789{ 790 /* 791 * BIT 'i' (info?) table 792 * 793 * offset + 0 (32 bits): BIOS version dword (as in B table) 794 * offset + 5 (8 bits): BIOS feature byte (same as for BMP?) 795 * offset + 13 (16 bits): pointer to table containing DAC load 796 * detection comparison values 797 * 798 * There's other things in the table, purpose unknown 799 */ 800 801 struct nouveau_drm *drm = nouveau_drm(dev); 802 uint16_t daccmpoffset; 803 uint8_t dacver, dacheaderlen; 804 805 if (bitentry->length < 6) { 806 NV_ERROR(drm, "BIT i table too short for needed information\n"); 807 return -EINVAL; 808 } 809 810 /* 811 * bit 4 seems to indicate a mobile bios (doesn't suffer from BMP's 812 * Quadro identity crisis), other bits possibly as for BMP feature byte 813 */ 814 bios->feature_byte = bios->data[bitentry->offset + 5]; 815 bios->is_mobile = bios->feature_byte & FEATURE_MOBILE; 816 817 if (bitentry->length < 15) { 818 NV_WARN(drm, "BIT i table not long enough for DAC load " 819 "detection comparison table\n"); 820 return -EINVAL; 821 } 822 823 daccmpoffset = ROM16(bios->data[bitentry->offset + 13]); 824 825 /* doesn't exist on g80 */ 826 if (!daccmpoffset) 827 return 0; 828 829 /* 830 * The first value in the table, following the header, is the 831 * comparison value, the second entry is a comparison value for 832 * TV load detection. 833 */ 834 835 dacver = bios->data[daccmpoffset]; 836 dacheaderlen = bios->data[daccmpoffset + 1]; 837 838 if (dacver != 0x00 && dacver != 0x10) { 839 NV_WARN(drm, "DAC load detection comparison table version " 840 "%d.%d not known\n", dacver >> 4, dacver & 0xf); 841 return -ENOSYS; 842 } 843 844 bios->dactestval = ROM32(bios->data[daccmpoffset + dacheaderlen]); 845 bios->tvdactestval = ROM32(bios->data[daccmpoffset + dacheaderlen + 4]); 846 847 return 0; 848} 849 850static int parse_bit_lvds_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry) 851{ 852 /* 853 * Parses the LVDS table segment that the bit entry points to. 854 * Starting at bitentry->offset: 855 * 856 * offset + 0 (16 bits): LVDS strap xlate table pointer 857 */ 858 859 struct nouveau_drm *drm = nouveau_drm(dev); 860 861 if (bitentry->length != 2) { 862 NV_ERROR(drm, "Do not understand BIT LVDS table\n"); 863 return -EINVAL; 864 } 865 866 /* 867 * No idea if it's still called the LVDS manufacturer table, but 868 * the concept's close enough. 869 */ 870 bios->fp.lvdsmanufacturerpointer = ROM16(bios->data[bitentry->offset]); 871 872 return 0; 873} 874 875static int 876parse_bit_M_tbl_entry(struct drm_device *dev, struct nvbios *bios, 877 struct bit_entry *bitentry) 878{ 879 /* 880 * offset + 2 (8 bits): number of options in an 881 * INIT_RAM_RESTRICT_ZM_REG_GROUP opcode option set 882 * offset + 3 (16 bits): pointer to strap xlate table for RAM 883 * restrict option selection 884 * 885 * There's a bunch of bits in this table other than the RAM restrict 886 * stuff that we don't use - their use currently unknown 887 */ 888 889 /* 890 * Older bios versions don't have a sufficiently long table for 891 * what we want 892 */ 893 if (bitentry->length < 0x5) 894 return 0; 895 896 if (bitentry->version < 2) { 897 bios->ram_restrict_group_count = bios->data[bitentry->offset + 2]; 898 bios->ram_restrict_tbl_ptr = ROM16(bios->data[bitentry->offset + 3]); 899 } else { 900 bios->ram_restrict_group_count = bios->data[bitentry->offset + 0]; 901 bios->ram_restrict_tbl_ptr = ROM16(bios->data[bitentry->offset + 1]); 902 } 903 904 return 0; 905} 906 907static int parse_bit_tmds_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry) 908{ 909 /* 910 * Parses the pointer to the TMDS table 911 * 912 * Starting at bitentry->offset: 913 * 914 * offset + 0 (16 bits): TMDS table pointer 915 * 916 * The TMDS table is typically found just before the DCB table, with a 917 * characteristic signature of 0x11,0x13 (1.1 being version, 0x13 being 918 * length?) 919 * 920 * At offset +7 is a pointer to a script, which I don't know how to 921 * run yet. 922 * At offset +9 is a pointer to another script, likewise 923 * Offset +11 has a pointer to a table where the first word is a pxclk 924 * frequency and the second word a pointer to a script, which should be 925 * run if the comparison pxclk frequency is less than the pxclk desired. 926 * This repeats for decreasing comparison frequencies 927 * Offset +13 has a pointer to a similar table 928 * The selection of table (and possibly +7/+9 script) is dictated by 929 * "or" from the DCB. 930 */ 931 932 struct nouveau_drm *drm = nouveau_drm(dev); 933 uint16_t tmdstableptr, script1, script2; 934 935 if (bitentry->length != 2) { 936 NV_ERROR(drm, "Do not understand BIT TMDS table\n"); 937 return -EINVAL; 938 } 939 940 tmdstableptr = ROM16(bios->data[bitentry->offset]); 941 if (!tmdstableptr) { 942 NV_INFO(drm, "Pointer to TMDS table not found\n"); 943 return -EINVAL; 944 } 945 946 NV_INFO(drm, "TMDS table version %d.%d\n", 947 bios->data[tmdstableptr] >> 4, bios->data[tmdstableptr] & 0xf); 948 949 /* nv50+ has v2.0, but we don't parse it atm */ 950 if (bios->data[tmdstableptr] != 0x11) 951 return -ENOSYS; 952 953 /* 954 * These two scripts are odd: they don't seem to get run even when 955 * they are not stubbed. 956 */ 957 script1 = ROM16(bios->data[tmdstableptr + 7]); 958 script2 = ROM16(bios->data[tmdstableptr + 9]); 959 if (bios->data[script1] != 'q' || bios->data[script2] != 'q') 960 NV_WARN(drm, "TMDS table script pointers not stubbed\n"); 961 962 bios->tmds.output0_script_ptr = ROM16(bios->data[tmdstableptr + 11]); 963 bios->tmds.output1_script_ptr = ROM16(bios->data[tmdstableptr + 13]); 964 965 return 0; 966} 967 968struct bit_table { 969 const char id; 970 int (* const parse_fn)(struct drm_device *, struct nvbios *, struct bit_entry *); 971}; 972 973#define BIT_TABLE(id, funcid) ((struct bit_table){ id, parse_bit_##funcid##_tbl_entry }) 974 975int 976bit_table(struct drm_device *dev, u8 id, struct bit_entry *bit) 977{ 978 struct nouveau_drm *drm = nouveau_drm(dev); 979 struct nvbios *bios = &drm->vbios; 980 u8 entries, *entry; 981 982 if (bios->type != NVBIOS_BIT) 983 return -ENODEV; 984 985 entries = bios->data[bios->offset + 10]; 986 entry = &bios->data[bios->offset + 12]; 987 while (entries--) { 988 if (entry[0] == id) { 989 bit->id = entry[0]; 990 bit->version = entry[1]; 991 bit->length = ROM16(entry[2]); 992 bit->offset = ROM16(entry[4]); 993 bit->data = ROMPTR(dev, entry[4]); 994 return 0; 995 } 996 997 entry += bios->data[bios->offset + 9]; 998 } 999 1000 return -ENOENT; 1001} 1002 1003static int 1004parse_bit_table(struct nvbios *bios, const uint16_t bitoffset, 1005 struct bit_table *table) 1006{ 1007 struct drm_device *dev = bios->dev; 1008 struct nouveau_drm *drm = nouveau_drm(dev); 1009 struct bit_entry bitentry; 1010 1011 if (bit_table(dev, table->id, &bitentry) == 0) 1012 return table->parse_fn(dev, bios, &bitentry); 1013 1014 NV_INFO(drm, "BIT table '%c' not found\n", table->id); 1015 return -ENOSYS; 1016} 1017 1018static int 1019parse_bit_structure(struct nvbios *bios, const uint16_t bitoffset) 1020{ 1021 int ret; 1022 1023 /* 1024 * The only restriction on parsing order currently is having 'i' first 1025 * for use of bios->*_version or bios->feature_byte while parsing; 1026 * functions shouldn't be actually *doing* anything apart from pulling 1027 * data from the image into the bios struct, thus no interdependencies 1028 */ 1029 ret = parse_bit_table(bios, bitoffset, &BIT_TABLE('i', i)); 1030 if (ret) /* info? */ 1031 return ret; 1032 if (bios->major_version >= 0x60) /* g80+ */ 1033 parse_bit_table(bios, bitoffset, &BIT_TABLE('A', A)); 1034 parse_bit_table(bios, bitoffset, &BIT_TABLE('D', display)); 1035 ret = parse_bit_table(bios, bitoffset, &BIT_TABLE('I', init)); 1036 if (ret) 1037 return ret; 1038 parse_bit_table(bios, bitoffset, &BIT_TABLE('M', M)); /* memory? */ 1039 parse_bit_table(bios, bitoffset, &BIT_TABLE('L', lvds)); 1040 parse_bit_table(bios, bitoffset, &BIT_TABLE('T', tmds)); 1041 1042 return 0; 1043} 1044 1045static int parse_bmp_structure(struct drm_device *dev, struct nvbios *bios, unsigned int offset) 1046{ 1047 /* 1048 * Parses the BMP structure for useful things, but does not act on them 1049 * 1050 * offset + 5: BMP major version 1051 * offset + 6: BMP minor version 1052 * offset + 9: BMP feature byte 1053 * offset + 10: BCD encoded BIOS version 1054 * 1055 * offset + 18: init script table pointer (for bios versions < 5.10h) 1056 * offset + 20: extra init script table pointer (for bios 1057 * versions < 5.10h) 1058 * 1059 * offset + 24: memory init table pointer (used on early bios versions) 1060 * offset + 26: SDR memory sequencing setup data table 1061 * offset + 28: DDR memory sequencing setup data table 1062 * 1063 * offset + 54: index of I2C CRTC pair to use for CRT output 1064 * offset + 55: index of I2C CRTC pair to use for TV output 1065 * offset + 56: index of I2C CRTC pair to use for flat panel output 1066 * offset + 58: write CRTC index for I2C pair 0 1067 * offset + 59: read CRTC index for I2C pair 0 1068 * offset + 60: write CRTC index for I2C pair 1 1069 * offset + 61: read CRTC index for I2C pair 1 1070 * 1071 * offset + 67: maximum internal PLL frequency (single stage PLL) 1072 * offset + 71: minimum internal PLL frequency (single stage PLL) 1073 * 1074 * offset + 75: script table pointers, as described in 1075 * parse_script_table_pointers 1076 * 1077 * offset + 89: TMDS single link output A table pointer 1078 * offset + 91: TMDS single link output B table pointer 1079 * offset + 95: LVDS single link output A table pointer 1080 * offset + 105: flat panel timings table pointer 1081 * offset + 107: flat panel strapping translation table pointer 1082 * offset + 117: LVDS manufacturer panel config table pointer 1083 * offset + 119: LVDS manufacturer strapping translation table pointer 1084 * 1085 * offset + 142: PLL limits table pointer 1086 * 1087 * offset + 156: minimum pixel clock for LVDS dual link 1088 */ 1089 1090 struct nouveau_drm *drm = nouveau_drm(dev); 1091 uint8_t *bmp = &bios->data[offset], bmp_version_major, bmp_version_minor; 1092 uint16_t bmplength; 1093 uint16_t legacy_scripts_offset, legacy_i2c_offset; 1094 1095 /* load needed defaults in case we can't parse this info */ 1096 bios->digital_min_front_porch = 0x4b; 1097 bios->fmaxvco = 256000; 1098 bios->fminvco = 128000; 1099 bios->fp.duallink_transition_clk = 90000; 1100 1101 bmp_version_major = bmp[5]; 1102 bmp_version_minor = bmp[6]; 1103 1104 NV_INFO(drm, "BMP version %d.%d\n", 1105 bmp_version_major, bmp_version_minor); 1106 1107 /* 1108 * Make sure that 0x36 is blank and can't be mistaken for a DCB 1109 * pointer on early versions 1110 */ 1111 if (bmp_version_major < 5) 1112 *(uint16_t *)&bios->data[0x36] = 0; 1113 1114 /* 1115 * Seems that the minor version was 1 for all major versions prior 1116 * to 5. Version 6 could theoretically exist, but I suspect BIT 1117 * happened instead. 1118 */ 1119 if ((bmp_version_major < 5 && bmp_version_minor != 1) || bmp_version_major > 5) { 1120 NV_ERROR(drm, "You have an unsupported BMP version. " 1121 "Please send in your bios\n"); 1122 return -ENOSYS; 1123 } 1124 1125 if (bmp_version_major == 0) 1126 /* nothing that's currently useful in this version */ 1127 return 0; 1128 else if (bmp_version_major == 1) 1129 bmplength = 44; /* exact for 1.01 */ 1130 else if (bmp_version_major == 2) 1131 bmplength = 48; /* exact for 2.01 */ 1132 else if (bmp_version_major == 3) 1133 bmplength = 54; 1134 /* guessed - mem init tables added in this version */ 1135 else if (bmp_version_major == 4 || bmp_version_minor < 0x1) 1136 /* don't know if 5.0 exists... */ 1137 bmplength = 62; 1138 /* guessed - BMP I2C indices added in version 4*/ 1139 else if (bmp_version_minor < 0x6) 1140 bmplength = 67; /* exact for 5.01 */ 1141 else if (bmp_version_minor < 0x10) 1142 bmplength = 75; /* exact for 5.06 */ 1143 else if (bmp_version_minor == 0x10) 1144 bmplength = 89; /* exact for 5.10h */ 1145 else if (bmp_version_minor < 0x14) 1146 bmplength = 118; /* exact for 5.11h */ 1147 else if (bmp_version_minor < 0x24) 1148 /* 1149 * Not sure of version where pll limits came in; 1150 * certainly exist by 0x24 though. 1151 */ 1152 /* length not exact: this is long enough to get lvds members */ 1153 bmplength = 123; 1154 else if (bmp_version_minor < 0x27) 1155 /* 1156 * Length not exact: this is long enough to get pll limit 1157 * member 1158 */ 1159 bmplength = 144; 1160 else 1161 /* 1162 * Length not exact: this is long enough to get dual link 1163 * transition clock. 1164 */ 1165 bmplength = 158; 1166 1167 /* checksum */ 1168 if (nv_cksum(bmp, 8)) { 1169 NV_ERROR(drm, "Bad BMP checksum\n"); 1170 return -EINVAL; 1171 } 1172 1173 /* 1174 * Bit 4 seems to indicate either a mobile bios or a quadro card -- 1175 * mobile behaviour consistent (nv11+), quadro only seen nv18gl-nv36gl 1176 * (not nv10gl), bit 5 that the flat panel tables are present, and 1177 * bit 6 a tv bios. 1178 */ 1179 bios->feature_byte = bmp[9]; 1180 1181 if (bmp_version_major < 5 || bmp_version_minor < 0x10) 1182 bios->old_style_init = true; 1183 legacy_scripts_offset = 18; 1184 if (bmp_version_major < 2) 1185 legacy_scripts_offset -= 4; 1186 bios->init_script_tbls_ptr = ROM16(bmp[legacy_scripts_offset]); 1187 bios->extra_init_script_tbl_ptr = ROM16(bmp[legacy_scripts_offset + 2]); 1188 1189 if (bmp_version_major > 2) { /* appears in BMP 3 */ 1190 bios->legacy.mem_init_tbl_ptr = ROM16(bmp[24]); 1191 bios->legacy.sdr_seq_tbl_ptr = ROM16(bmp[26]); 1192 bios->legacy.ddr_seq_tbl_ptr = ROM16(bmp[28]); 1193 } 1194 1195 legacy_i2c_offset = 0x48; /* BMP version 2 & 3 */ 1196 if (bmplength > 61) 1197 legacy_i2c_offset = offset + 54; 1198 bios->legacy.i2c_indices.crt = bios->data[legacy_i2c_offset]; 1199 bios->legacy.i2c_indices.tv = bios->data[legacy_i2c_offset + 1]; 1200 bios->legacy.i2c_indices.panel = bios->data[legacy_i2c_offset + 2]; 1201 1202 if (bmplength > 74) { 1203 bios->fmaxvco = ROM32(bmp[67]); 1204 bios->fminvco = ROM32(bmp[71]); 1205 } 1206 if (bmplength > 88) 1207 parse_script_table_pointers(bios, offset + 75); 1208 if (bmplength > 94) { 1209 bios->tmds.output0_script_ptr = ROM16(bmp[89]); 1210 bios->tmds.output1_script_ptr = ROM16(bmp[91]); 1211 /* 1212 * Never observed in use with lvds scripts, but is reused for 1213 * 18/24 bit panel interface default for EDID equipped panels 1214 * (if_is_24bit not set directly to avoid any oscillation). 1215 */ 1216 bios->legacy.lvds_single_a_script_ptr = ROM16(bmp[95]); 1217 } 1218 if (bmplength > 108) { 1219 bios->fp.fptablepointer = ROM16(bmp[105]); 1220 bios->fp.fpxlatetableptr = ROM16(bmp[107]); 1221 bios->fp.xlatwidth = 1; 1222 } 1223 if (bmplength > 120) { 1224 bios->fp.lvdsmanufacturerpointer = ROM16(bmp[117]); 1225 bios->fp.fpxlatemanufacturertableptr = ROM16(bmp[119]); 1226 } 1227#if 0 1228 if (bmplength > 143) 1229 bios->pll_limit_tbl_ptr = ROM16(bmp[142]); 1230#endif 1231 1232 if (bmplength > 157) 1233 bios->fp.duallink_transition_clk = ROM16(bmp[156]) * 10; 1234 1235 return 0; 1236} 1237 1238static uint16_t findstr(uint8_t *data, int n, const uint8_t *str, int len) 1239{ 1240 int i, j; 1241 1242 for (i = 0; i <= (n - len); i++) { 1243 for (j = 0; j < len; j++) 1244 if (data[i + j] != str[j]) 1245 break; 1246 if (j == len) 1247 return i; 1248 } 1249 1250 return 0; 1251} 1252 1253void * 1254olddcb_table(struct drm_device *dev) 1255{ 1256 struct nouveau_drm *drm = nouveau_drm(dev); 1257 u8 *dcb = NULL; 1258 1259 if (drm->client.device.info.family > NV_DEVICE_INFO_V0_TNT) 1260 dcb = ROMPTR(dev, drm->vbios.data[0x36]); 1261 if (!dcb) { 1262 NV_WARN(drm, "No DCB data found in VBIOS\n"); 1263 return NULL; 1264 } 1265 1266 if (dcb[0] >= 0x42) { 1267 NV_WARN(drm, "DCB version 0x%02x unknown\n", dcb[0]); 1268 return NULL; 1269 } else 1270 if (dcb[0] >= 0x30) { 1271 if (ROM32(dcb[6]) == 0x4edcbdcb) 1272 return dcb; 1273 } else 1274 if (dcb[0] >= 0x20) { 1275 if (ROM32(dcb[4]) == 0x4edcbdcb) 1276 return dcb; 1277 } else 1278 if (dcb[0] >= 0x15) { 1279 if (!memcmp(&dcb[-7], "DEV_REC", 7)) 1280 return dcb; 1281 } else { 1282 /* 1283 * v1.4 (some NV15/16, NV11+) seems the same as v1.5, but 1284 * always has the same single (crt) entry, even when tv-out 1285 * present, so the conclusion is this version cannot really 1286 * be used. 1287 * 1288 * v1.2 tables (some NV6/10, and NV15+) normally have the 1289 * same 5 entries, which are not specific to the card and so 1290 * no use. 1291 * 1292 * v1.2 does have an I2C table that read_dcb_i2c_table can 1293 * handle, but cards exist (nv11 in #14821) with a bad i2c 1294 * table pointer, so use the indices parsed in 1295 * parse_bmp_structure. 1296 * 1297 * v1.1 (NV5+, maybe some NV4) is entirely unhelpful 1298 */ 1299 NV_WARN(drm, "No useful DCB data in VBIOS\n"); 1300 return NULL; 1301 } 1302 1303 NV_WARN(drm, "DCB header validation failed\n"); 1304 return NULL; 1305} 1306 1307void * 1308olddcb_outp(struct drm_device *dev, u8 idx) 1309{ 1310 u8 *dcb = olddcb_table(dev); 1311 if (dcb && dcb[0] >= 0x30) { 1312 if (idx < dcb[2]) 1313 return dcb + dcb[1] + (idx * dcb[3]); 1314 } else 1315 if (dcb && dcb[0] >= 0x20) { 1316 u8 *i2c = ROMPTR(dev, dcb[2]); 1317 u8 *ent = dcb + 8 + (idx * 8); 1318 if (i2c && ent < i2c) 1319 return ent; 1320 } else 1321 if (dcb && dcb[0] >= 0x15) { 1322 u8 *i2c = ROMPTR(dev, dcb[2]); 1323 u8 *ent = dcb + 4 + (idx * 10); 1324 if (i2c && ent < i2c) 1325 return ent; 1326 } 1327 1328 return NULL; 1329} 1330 1331int 1332olddcb_outp_foreach(struct drm_device *dev, void *data, 1333 int (*exec)(struct drm_device *, void *, int idx, u8 *outp)) 1334{ 1335 int ret, idx = -1; 1336 u8 *outp = NULL; 1337 while ((outp = olddcb_outp(dev, ++idx))) { 1338 if (ROM32(outp[0]) == 0x00000000) 1339 break; /* seen on an NV11 with DCB v1.5 */ 1340 if (ROM32(outp[0]) == 0xffffffff) 1341 break; /* seen on an NV17 with DCB v2.0 */ 1342 1343 if ((outp[0] & 0x0f) == DCB_OUTPUT_UNUSED) 1344 continue; 1345 if ((outp[0] & 0x0f) == DCB_OUTPUT_EOL) 1346 break; 1347 1348 ret = exec(dev, data, idx, outp); 1349 if (ret) 1350 return ret; 1351 } 1352 1353 return 0; 1354} 1355 1356u8 * 1357olddcb_conntab(struct drm_device *dev) 1358{ 1359 u8 *dcb = olddcb_table(dev); 1360 if (dcb && dcb[0] >= 0x30 && dcb[1] >= 0x16) { 1361 u8 *conntab = ROMPTR(dev, dcb[0x14]); 1362 if (conntab && conntab[0] >= 0x30 && conntab[0] <= 0x40) 1363 return conntab; 1364 } 1365 return NULL; 1366} 1367 1368u8 * 1369olddcb_conn(struct drm_device *dev, u8 idx) 1370{ 1371 u8 *conntab = olddcb_conntab(dev); 1372 if (conntab && idx < conntab[2]) 1373 return conntab + conntab[1] + (idx * conntab[3]); 1374 return NULL; 1375} 1376 1377static struct dcb_output *new_dcb_entry(struct dcb_table *dcb) 1378{ 1379 struct dcb_output *entry = &dcb->entry[dcb->entries]; 1380 1381 memset(entry, 0, sizeof(struct dcb_output)); 1382 entry->index = dcb->entries++; 1383 1384 return entry; 1385} 1386 1387static void fabricate_dcb_output(struct dcb_table *dcb, int type, int i2c, 1388 int heads, int or) 1389{ 1390 struct dcb_output *entry = new_dcb_entry(dcb); 1391 1392 entry->type = type; 1393 entry->i2c_index = i2c; 1394 entry->heads = heads; 1395 if (type != DCB_OUTPUT_ANALOG) 1396 entry->location = !DCB_LOC_ON_CHIP; /* ie OFF CHIP */ 1397 entry->or = or; 1398} 1399 1400static bool 1401parse_dcb20_entry(struct drm_device *dev, struct dcb_table *dcb, 1402 uint32_t conn, uint32_t conf, struct dcb_output *entry) 1403{ 1404 struct nouveau_drm *drm = nouveau_drm(dev); 1405 int link = 0; 1406 1407 entry->type = conn & 0xf; 1408 entry->i2c_index = (conn >> 4) & 0xf; 1409 entry->heads = (conn >> 8) & 0xf; 1410 entry->connector = (conn >> 12) & 0xf; 1411 entry->bus = (conn >> 16) & 0xf; 1412 entry->location = (conn >> 20) & 0x3; 1413 entry->or = (conn >> 24) & 0xf; 1414 1415 switch (entry->type) { 1416 case DCB_OUTPUT_ANALOG: 1417 /* 1418 * Although the rest of a CRT conf dword is usually 1419 * zeros, mac biosen have stuff there so we must mask 1420 */ 1421 entry->crtconf.maxfreq = (dcb->version < 0x30) ? 1422 (conf & 0xffff) * 10 : 1423 (conf & 0xff) * 10000; 1424 break; 1425 case DCB_OUTPUT_LVDS: 1426 { 1427 uint32_t mask; 1428 if (conf & 0x1) 1429 entry->lvdsconf.use_straps_for_mode = true; 1430 if (dcb->version < 0x22) { 1431 mask = ~0xd; 1432 /* 1433 * The laptop in bug 14567 lies and claims to not use 1434 * straps when it does, so assume all DCB 2.0 laptops 1435 * use straps, until a broken EDID using one is produced 1436 */ 1437 entry->lvdsconf.use_straps_for_mode = true; 1438 /* 1439 * Both 0x4 and 0x8 show up in v2.0 tables; assume they 1440 * mean the same thing (probably wrong, but might work) 1441 */ 1442 if (conf & 0x4 || conf & 0x8) 1443 entry->lvdsconf.use_power_scripts = true; 1444 } else { 1445 mask = ~0x7; 1446 if (conf & 0x2) 1447 entry->lvdsconf.use_acpi_for_edid = true; 1448 if (conf & 0x4) 1449 entry->lvdsconf.use_power_scripts = true; 1450 entry->lvdsconf.sor.link = (conf & 0x00000030) >> 4; 1451 link = entry->lvdsconf.sor.link; 1452 } 1453 if (conf & mask) { 1454 /* 1455 * Until we even try to use these on G8x, it's 1456 * useless reporting unknown bits. They all are. 1457 */ 1458 if (dcb->version >= 0x40) 1459 break; 1460 1461 NV_ERROR(drm, "Unknown LVDS configuration bits, " 1462 "please report\n"); 1463 } 1464 break; 1465 } 1466 case DCB_OUTPUT_TV: 1467 { 1468 if (dcb->version >= 0x30) 1469 entry->tvconf.has_component_output = conf & (0x8 << 4); 1470 else 1471 entry->tvconf.has_component_output = false; 1472 1473 break; 1474 } 1475 case DCB_OUTPUT_DP: 1476 entry->dpconf.sor.link = (conf & 0x00000030) >> 4; 1477 entry->extdev = (conf & 0x0000ff00) >> 8; 1478 switch ((conf & 0x00e00000) >> 21) { 1479 case 0: 1480 entry->dpconf.link_bw = 162000; 1481 break; 1482 case 1: 1483 entry->dpconf.link_bw = 270000; 1484 break; 1485 case 2: 1486 entry->dpconf.link_bw = 540000; 1487 break; 1488 case 3: 1489 default: 1490 entry->dpconf.link_bw = 810000; 1491 break; 1492 } 1493 switch ((conf & 0x0f000000) >> 24) { 1494 case 0xf: 1495 case 0x4: 1496 entry->dpconf.link_nr = 4; 1497 break; 1498 case 0x3: 1499 case 0x2: 1500 entry->dpconf.link_nr = 2; 1501 break; 1502 default: 1503 entry->dpconf.link_nr = 1; 1504 break; 1505 } 1506 link = entry->dpconf.sor.link; 1507 break; 1508 case DCB_OUTPUT_TMDS: 1509 if (dcb->version >= 0x40) { 1510 entry->tmdsconf.sor.link = (conf & 0x00000030) >> 4; 1511 entry->extdev = (conf & 0x0000ff00) >> 8; 1512 link = entry->tmdsconf.sor.link; 1513 } 1514 else if (dcb->version >= 0x30) 1515 entry->tmdsconf.slave_addr = (conf & 0x00000700) >> 8; 1516 else if (dcb->version >= 0x22) 1517 entry->tmdsconf.slave_addr = (conf & 0x00000070) >> 4; 1518 break; 1519 case DCB_OUTPUT_EOL: 1520 /* weird g80 mobile type that "nv" treats as a terminator */ 1521 dcb->entries--; 1522 return false; 1523 default: 1524 break; 1525 } 1526 1527 if (dcb->version < 0x40) { 1528 /* Normal entries consist of a single bit, but dual link has 1529 * the next most significant bit set too 1530 */ 1531 entry->duallink_possible = 1532 ((1 << (ffs(entry->or) - 1)) * 3 == entry->or); 1533 } else { 1534 entry->duallink_possible = (entry->sorconf.link == 3); 1535 } 1536 1537 /* unsure what DCB version introduces this, 3.0? */ 1538 if (conf & 0x100000) 1539 entry->i2c_upper_default = true; 1540 1541 entry->hasht = (entry->extdev << 8) | (entry->location << 4) | 1542 entry->type; 1543 entry->hashm = (entry->heads << 8) | (link << 6) | entry->or; 1544 return true; 1545} 1546 1547static bool 1548parse_dcb15_entry(struct drm_device *dev, struct dcb_table *dcb, 1549 uint32_t conn, uint32_t conf, struct dcb_output *entry) 1550{ 1551 struct nouveau_drm *drm = nouveau_drm(dev); 1552 1553 switch (conn & 0x0000000f) { 1554 case 0: 1555 entry->type = DCB_OUTPUT_ANALOG; 1556 break; 1557 case 1: 1558 entry->type = DCB_OUTPUT_TV; 1559 break; 1560 case 2: 1561 case 4: 1562 if (conn & 0x10) 1563 entry->type = DCB_OUTPUT_LVDS; 1564 else 1565 entry->type = DCB_OUTPUT_TMDS; 1566 break; 1567 case 3: 1568 entry->type = DCB_OUTPUT_LVDS; 1569 break; 1570 default: 1571 NV_ERROR(drm, "Unknown DCB type %d\n", conn & 0x0000000f); 1572 return false; 1573 } 1574 1575 entry->i2c_index = (conn & 0x0003c000) >> 14; 1576 entry->heads = ((conn & 0x001c0000) >> 18) + 1; 1577 entry->or = entry->heads; /* same as heads, hopefully safe enough */ 1578 entry->location = (conn & 0x01e00000) >> 21; 1579 entry->bus = (conn & 0x0e000000) >> 25; 1580 entry->duallink_possible = false; 1581 1582 switch (entry->type) { 1583 case DCB_OUTPUT_ANALOG: 1584 entry->crtconf.maxfreq = (conf & 0xffff) * 10; 1585 break; 1586 case DCB_OUTPUT_TV: 1587 entry->tvconf.has_component_output = false; 1588 break; 1589 case DCB_OUTPUT_LVDS: 1590 if ((conn & 0x00003f00) >> 8 != 0x10) 1591 entry->lvdsconf.use_straps_for_mode = true; 1592 entry->lvdsconf.use_power_scripts = true; 1593 break; 1594 default: 1595 break; 1596 } 1597 1598 return true; 1599} 1600 1601static 1602void merge_like_dcb_entries(struct drm_device *dev, struct dcb_table *dcb) 1603{ 1604 /* 1605 * DCB v2.0 lists each output combination separately. 1606 * Here we merge compatible entries to have fewer outputs, with 1607 * more options 1608 */ 1609 1610 struct nouveau_drm *drm = nouveau_drm(dev); 1611 int i, newentries = 0; 1612 1613 for (i = 0; i < dcb->entries; i++) { 1614 struct dcb_output *ient = &dcb->entry[i]; 1615 int j; 1616 1617 for (j = i + 1; j < dcb->entries; j++) { 1618 struct dcb_output *jent = &dcb->entry[j]; 1619 1620 if (jent->type == 100) /* already merged entry */ 1621 continue; 1622 1623 /* merge heads field when all other fields the same */ 1624 if (jent->i2c_index == ient->i2c_index && 1625 jent->type == ient->type && 1626 jent->location == ient->location && 1627 jent->or == ient->or) { 1628 NV_INFO(drm, "Merging DCB entries %d and %d\n", 1629 i, j); 1630 ient->heads |= jent->heads; 1631 jent->type = 100; /* dummy value */ 1632 } 1633 } 1634 } 1635 1636 /* Compact entries merged into others out of dcb */ 1637 for (i = 0; i < dcb->entries; i++) { 1638 if (dcb->entry[i].type == 100) 1639 continue; 1640 1641 if (newentries != i) { 1642 dcb->entry[newentries] = dcb->entry[i]; 1643 dcb->entry[newentries].index = newentries; 1644 } 1645 newentries++; 1646 } 1647 1648 dcb->entries = newentries; 1649} 1650 1651static bool 1652apply_dcb_encoder_quirks(struct drm_device *dev, int idx, u32 *conn, u32 *conf) 1653{ 1654 struct nouveau_drm *drm = nouveau_drm(dev); 1655 struct dcb_table *dcb = &drm->vbios.dcb; 1656 1657 /* Dell Precision M6300 1658 * DCB entry 2: 02025312 00000010 1659 * DCB entry 3: 02026312 00000020 1660 * 1661 * Identical, except apparently a different connector on a 1662 * different SOR link. Not a clue how we're supposed to know 1663 * which one is in use if it even shares an i2c line... 1664 * 1665 * Ignore the connector on the second SOR link to prevent 1666 * nasty problems until this is sorted (assuming it's not a 1667 * VBIOS bug). 1668 */ 1669 if (nv_match_device(dev, 0x040d, 0x1028, 0x019b)) { 1670 if (*conn == 0x02026312 && *conf == 0x00000020) 1671 return false; 1672 } 1673 1674 /* GeForce3 Ti 200 1675 * 1676 * DCB reports an LVDS output that should be TMDS: 1677 * DCB entry 1: f2005014 ffffffff 1678 */ 1679 if (nv_match_device(dev, 0x0201, 0x1462, 0x8851)) { 1680 if (*conn == 0xf2005014 && *conf == 0xffffffff) { 1681 fabricate_dcb_output(dcb, DCB_OUTPUT_TMDS, 1, 1, DCB_OUTPUT_B); 1682 return false; 1683 } 1684 } 1685 1686 /* XFX GT-240X-YA 1687 * 1688 * So many things wrong here, replace the entire encoder table.. 1689 */ 1690 if (nv_match_device(dev, 0x0ca3, 0x1682, 0x3003)) { 1691 if (idx == 0) { 1692 *conn = 0x02001300; /* VGA, connector 1 */ 1693 *conf = 0x00000028; 1694 } else 1695 if (idx == 1) { 1696 *conn = 0x01010312; /* DVI, connector 0 */ 1697 *conf = 0x00020030; 1698 } else 1699 if (idx == 2) { 1700 *conn = 0x01010310; /* VGA, connector 0 */ 1701 *conf = 0x00000028; 1702 } else 1703 if (idx == 3) { 1704 *conn = 0x02022362; /* HDMI, connector 2 */ 1705 *conf = 0x00020010; 1706 } else { 1707 *conn = 0x0000000e; /* EOL */ 1708 *conf = 0x00000000; 1709 } 1710 } 1711 1712 /* Some other twisted XFX board (rhbz#694914) 1713 * 1714 * The DVI/VGA encoder combo that's supposed to represent the 1715 * DVI-I connector actually point at two different ones, and 1716 * the HDMI connector ends up paired with the VGA instead. 1717 * 1718 * Connector table is missing anything for VGA at all, pointing it 1719 * an invalid conntab entry 2 so we figure it out ourself. 1720 */ 1721 if (nv_match_device(dev, 0x0615, 0x1682, 0x2605)) { 1722 if (idx == 0) { 1723 *conn = 0x02002300; /* VGA, connector 2 */ 1724 *conf = 0x00000028; 1725 } else 1726 if (idx == 1) { 1727 *conn = 0x01010312; /* DVI, connector 0 */ 1728 *conf = 0x00020030; 1729 } else 1730 if (idx == 2) { 1731 *conn = 0x04020310; /* VGA, connector 0 */ 1732 *conf = 0x00000028; 1733 } else 1734 if (idx == 3) { 1735 *conn = 0x02021322; /* HDMI, connector 1 */ 1736 *conf = 0x00020010; 1737 } else { 1738 *conn = 0x0000000e; /* EOL */ 1739 *conf = 0x00000000; 1740 } 1741 } 1742 1743 /* fdo#50830: connector indices for VGA and DVI-I are backwards */ 1744 if (nv_match_device(dev, 0x0421, 0x3842, 0xc793)) { 1745 if (idx == 0 && *conn == 0x02000300) 1746 *conn = 0x02011300; 1747 else 1748 if (idx == 1 && *conn == 0x04011310) 1749 *conn = 0x04000310; 1750 else 1751 if (idx == 2 && *conn == 0x02011312) 1752 *conn = 0x02000312; 1753 } 1754 1755 return true; 1756} 1757 1758static void 1759fabricate_dcb_encoder_table(struct drm_device *dev, struct nvbios *bios) 1760{ 1761 struct dcb_table *dcb = &bios->dcb; 1762 int all_heads = (nv_two_heads(dev) ? 3 : 1); 1763 1764#ifdef __powerpc__ 1765 /* Apple iMac G4 NV17 */ 1766 if (of_machine_is_compatible("PowerMac4,5")) { 1767 fabricate_dcb_output(dcb, DCB_OUTPUT_TMDS, 0, all_heads, DCB_OUTPUT_B); 1768 fabricate_dcb_output(dcb, DCB_OUTPUT_ANALOG, 1, all_heads, DCB_OUTPUT_C); 1769 return; 1770 } 1771#endif 1772 1773 /* Make up some sane defaults */ 1774 fabricate_dcb_output(dcb, DCB_OUTPUT_ANALOG, 1775 bios->legacy.i2c_indices.crt, 1, DCB_OUTPUT_B); 1776 1777 if (nv04_tv_identify(dev, bios->legacy.i2c_indices.tv) >= 0) 1778 fabricate_dcb_output(dcb, DCB_OUTPUT_TV, 1779 bios->legacy.i2c_indices.tv, 1780 all_heads, DCB_OUTPUT_A); 1781 1782 else if (bios->tmds.output0_script_ptr || 1783 bios->tmds.output1_script_ptr) 1784 fabricate_dcb_output(dcb, DCB_OUTPUT_TMDS, 1785 bios->legacy.i2c_indices.panel, 1786 all_heads, DCB_OUTPUT_B); 1787} 1788 1789static int 1790parse_dcb_entry(struct drm_device *dev, void *data, int idx, u8 *outp) 1791{ 1792 struct nouveau_drm *drm = nouveau_drm(dev); 1793 struct dcb_table *dcb = &drm->vbios.dcb; 1794 u32 conf = (dcb->version >= 0x20) ? ROM32(outp[4]) : ROM32(outp[6]); 1795 u32 conn = ROM32(outp[0]); 1796 bool ret; 1797 1798 if (apply_dcb_encoder_quirks(dev, idx, &conn, &conf)) { 1799 struct dcb_output *entry = new_dcb_entry(dcb); 1800 1801 NV_INFO(drm, "DCB outp %02d: %08x %08x\n", idx, conn, conf); 1802 1803 if (dcb->version >= 0x20) 1804 ret = parse_dcb20_entry(dev, dcb, conn, conf, entry); 1805 else 1806 ret = parse_dcb15_entry(dev, dcb, conn, conf, entry); 1807 entry->id = idx; 1808 1809 if (!ret) 1810 return 1; /* stop parsing */ 1811 1812 /* Ignore the I2C index for on-chip TV-out, as there 1813 * are cards with bogus values (nv31m in bug 23212), 1814 * and it's otherwise useless. 1815 */ 1816 if (entry->type == DCB_OUTPUT_TV && 1817 entry->location == DCB_LOC_ON_CHIP) 1818 entry->i2c_index = 0x0f; 1819 } 1820 1821 return 0; 1822} 1823 1824static void 1825dcb_fake_connectors(struct nvbios *bios) 1826{ 1827 struct dcb_table *dcbt = &bios->dcb; 1828 u8 map[16] = { }; 1829 int i, idx = 0; 1830 1831 /* heuristic: if we ever get a non-zero connector field, assume 1832 * that all the indices are valid and we don't need fake them. 1833 * 1834 * and, as usual, a blacklist of boards with bad bios data.. 1835 */ 1836 if (!nv_match_device(bios->dev, 0x0392, 0x107d, 0x20a2)) { 1837 for (i = 0; i < dcbt->entries; i++) { 1838 if (dcbt->entry[i].connector) 1839 return; 1840 } 1841 } 1842 1843 /* no useful connector info available, we need to make it up 1844 * ourselves. the rule here is: anything on the same i2c bus 1845 * is considered to be on the same connector. any output 1846 * without an associated i2c bus is assigned its own unique 1847 * connector index. 1848 */ 1849 for (i = 0; i < dcbt->entries; i++) { 1850 u8 i2c = dcbt->entry[i].i2c_index; 1851 if (i2c == 0x0f) { 1852 dcbt->entry[i].connector = idx++; 1853 } else { 1854 if (!map[i2c]) 1855 map[i2c] = ++idx; 1856 dcbt->entry[i].connector = map[i2c] - 1; 1857 } 1858 } 1859 1860 /* if we created more than one connector, destroy the connector 1861 * table - just in case it has random, rather than stub, entries. 1862 */ 1863 if (i > 1) { 1864 u8 *conntab = olddcb_conntab(bios->dev); 1865 if (conntab) 1866 conntab[0] = 0x00; 1867 } 1868} 1869 1870static int 1871parse_dcb_table(struct drm_device *dev, struct nvbios *bios) 1872{ 1873 struct nouveau_drm *drm = nouveau_drm(dev); 1874 struct dcb_table *dcb = &bios->dcb; 1875 u8 *dcbt, *conn; 1876 int idx; 1877 1878 dcbt = olddcb_table(dev); 1879 if (!dcbt) { 1880 /* handle pre-DCB boards */ 1881 if (bios->type == NVBIOS_BMP) { 1882 fabricate_dcb_encoder_table(dev, bios); 1883 return 0; 1884 } 1885 1886 return -EINVAL; 1887 } 1888 1889 NV_INFO(drm, "DCB version %d.%d\n", dcbt[0] >> 4, dcbt[0] & 0xf); 1890 1891 dcb->version = dcbt[0]; 1892 olddcb_outp_foreach(dev, NULL, parse_dcb_entry); 1893 1894 /* 1895 * apart for v2.1+ not being known for requiring merging, this 1896 * guarantees dcbent->index is the index of the entry in the rom image 1897 */ 1898 if (dcb->version < 0x21) 1899 merge_like_dcb_entries(dev, dcb); 1900 1901 /* dump connector table entries to log, if any exist */ 1902 idx = -1; 1903 while ((conn = olddcb_conn(dev, ++idx))) { 1904 if (conn[0] != 0xff) { 1905 if (olddcb_conntab(dev)[3] < 4) 1906 NV_INFO(drm, "DCB conn %02d: %04x\n", 1907 idx, ROM16(conn[0])); 1908 else 1909 NV_INFO(drm, "DCB conn %02d: %08x\n", 1910 idx, ROM32(conn[0])); 1911 } 1912 } 1913 dcb_fake_connectors(bios); 1914 return 0; 1915} 1916 1917static int load_nv17_hwsq_ucode_entry(struct drm_device *dev, struct nvbios *bios, uint16_t hwsq_offset, int entry) 1918{ 1919 /* 1920 * The header following the "HWSQ" signature has the number of entries, 1921 * and the entry size 1922 * 1923 * An entry consists of a dword to write to the sequencer control reg 1924 * (0x00001304), followed by the ucode bytes, written sequentially, 1925 * starting at reg 0x00001400 1926 */ 1927 1928 struct nouveau_drm *drm = nouveau_drm(dev); 1929 struct nvif_object *device = &drm->client.device.object; 1930 uint8_t bytes_to_write; 1931 uint16_t hwsq_entry_offset; 1932 int i; 1933 1934 if (bios->data[hwsq_offset] <= entry) { 1935 NV_ERROR(drm, "Too few entries in HW sequencer table for " 1936 "requested entry\n"); 1937 return -ENOENT; 1938 } 1939 1940 bytes_to_write = bios->data[hwsq_offset + 1]; 1941 1942 if (bytes_to_write != 36) { 1943 NV_ERROR(drm, "Unknown HW sequencer entry size\n"); 1944 return -EINVAL; 1945 } 1946 1947 NV_INFO(drm, "Loading NV17 power sequencing microcode\n"); 1948 1949 hwsq_entry_offset = hwsq_offset + 2 + entry * bytes_to_write; 1950 1951 /* set sequencer control */ 1952 nvif_wr32(device, 0x00001304, ROM32(bios->data[hwsq_entry_offset])); 1953 bytes_to_write -= 4; 1954 1955 /* write ucode */ 1956 for (i = 0; i < bytes_to_write; i += 4) 1957 nvif_wr32(device, 0x00001400 + i, ROM32(bios->data[hwsq_entry_offset + i + 4])); 1958 1959 /* twiddle NV_PBUS_DEBUG_4 */ 1960 nvif_wr32(device, NV_PBUS_DEBUG_4, nvif_rd32(device, NV_PBUS_DEBUG_4) | 0x18); 1961 1962 return 0; 1963} 1964 1965static int load_nv17_hw_sequencer_ucode(struct drm_device *dev, 1966 struct nvbios *bios) 1967{ 1968 /* 1969 * BMP based cards, from NV17, need a microcode loading to correctly 1970 * control the GPIO etc for LVDS panels 1971 * 1972 * BIT based cards seem to do this directly in the init scripts 1973 * 1974 * The microcode entries are found by the "HWSQ" signature. 1975 */ 1976 1977 static const uint8_t hwsq_signature[] = { 'H', 'W', 'S', 'Q' }; 1978 const int sz = sizeof(hwsq_signature); 1979 int hwsq_offset; 1980 1981 hwsq_offset = findstr(bios->data, bios->length, hwsq_signature, sz); 1982 if (!hwsq_offset) 1983 return 0; 1984 1985 /* always use entry 0? */ 1986 return load_nv17_hwsq_ucode_entry(dev, bios, hwsq_offset + sz, 0); 1987} 1988 1989uint8_t *nouveau_bios_embedded_edid(struct drm_device *dev) 1990{ 1991 struct nouveau_drm *drm = nouveau_drm(dev); 1992 struct nvbios *bios = &drm->vbios; 1993 static const uint8_t edid_sig[] = { 1994 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00 }; 1995 uint16_t offset = 0; 1996 uint16_t newoffset; 1997 int searchlen = NV_PROM_SIZE; 1998 1999 if (bios->fp.edid) 2000 return bios->fp.edid; 2001 2002 while (searchlen) { 2003 newoffset = findstr(&bios->data[offset], searchlen, 2004 edid_sig, 8); 2005 if (!newoffset) 2006 return NULL; 2007 offset += newoffset; 2008 if (!nv_cksum(&bios->data[offset], EDID1_LEN)) 2009 break; 2010 2011 searchlen -= offset; 2012 offset++; 2013 } 2014 2015 NV_INFO(drm, "Found EDID in BIOS\n"); 2016 2017 return bios->fp.edid = &bios->data[offset]; 2018} 2019 2020static bool NVInitVBIOS(struct drm_device *dev) 2021{ 2022 struct nouveau_drm *drm = nouveau_drm(dev); 2023 struct nvkm_bios *bios = nvxx_bios(&drm->client.device); 2024 struct nvbios *legacy = &drm->vbios; 2025 2026 memset(legacy, 0, sizeof(struct nvbios)); 2027 spin_lock_init(&legacy->lock); 2028 legacy->dev = dev; 2029 2030 legacy->data = bios->data; 2031 legacy->length = bios->size; 2032 legacy->major_version = bios->version.major; 2033 legacy->chip_version = bios->version.chip; 2034 if (bios->bit_offset) { 2035 legacy->type = NVBIOS_BIT; 2036 legacy->offset = bios->bit_offset; 2037 return !parse_bit_structure(legacy, legacy->offset + 6); 2038 } else 2039 if (bios->bmp_offset) { 2040 legacy->type = NVBIOS_BMP; 2041 legacy->offset = bios->bmp_offset; 2042 return !parse_bmp_structure(dev, legacy, legacy->offset); 2043 } 2044 2045 return false; 2046} 2047 2048int 2049nouveau_run_vbios_init(struct drm_device *dev) 2050{ 2051 struct nouveau_drm *drm = nouveau_drm(dev); 2052 struct nvbios *bios = &drm->vbios; 2053 2054 /* Reset the BIOS head to 0. */ 2055 bios->state.crtchead = 0; 2056 2057 if (bios->major_version < 5) /* BMP only */ 2058 load_nv17_hw_sequencer_ucode(dev, bios); 2059 2060 if (bios->execute) { 2061 bios->fp.last_script_invoc = 0; 2062 bios->fp.lvds_init_run = false; 2063 } 2064 2065 return 0; 2066} 2067 2068static bool 2069nouveau_bios_posted(struct drm_device *dev) 2070{ 2071 struct nouveau_drm *drm = nouveau_drm(dev); 2072 unsigned htotal; 2073 2074 if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA) 2075 return true; 2076 2077 htotal = NVReadVgaCrtc(dev, 0, 0x06); 2078 htotal |= (NVReadVgaCrtc(dev, 0, 0x07) & 0x01) << 8; 2079 htotal |= (NVReadVgaCrtc(dev, 0, 0x07) & 0x20) << 4; 2080 htotal |= (NVReadVgaCrtc(dev, 0, 0x25) & 0x01) << 10; 2081 htotal |= (NVReadVgaCrtc(dev, 0, 0x41) & 0x01) << 11; 2082 return (htotal != 0); 2083} 2084 2085int 2086nouveau_bios_init(struct drm_device *dev) 2087{ 2088 struct nouveau_drm *drm = nouveau_drm(dev); 2089 struct nvbios *bios = &drm->vbios; 2090 int ret; 2091 2092 /* only relevant for PCI devices */ 2093 if (!dev_is_pci(dev->dev) || 2094 nvkm_gsp_rm(nvxx_device(&drm->client.device)->gsp)) 2095 return 0; 2096 2097 if (!NVInitVBIOS(dev)) 2098 return -ENODEV; 2099 2100 if (drm->client.device.info.family < NV_DEVICE_INFO_V0_TESLA) { 2101 ret = parse_dcb_table(dev, bios); 2102 if (ret) 2103 return ret; 2104 } 2105 2106 if (!bios->major_version) /* we don't run version 0 bios */ 2107 return 0; 2108 2109 /* init script execution disabled */ 2110 bios->execute = false; 2111 2112 /* ... unless card isn't POSTed already */ 2113 if (!nouveau_bios_posted(dev)) { 2114 NV_INFO(drm, "Adaptor not initialised, " 2115 "running VBIOS init tables.\n"); 2116 bios->execute = true; 2117 } 2118 2119 ret = nouveau_run_vbios_init(dev); 2120 if (ret) 2121 return ret; 2122 2123 /* feature_byte on BMP is poor, but init always sets CR4B */ 2124 if (bios->major_version < 5) 2125 bios->is_mobile = NVReadVgaCrtc(dev, 0, NV_CIO_CRE_4B) & 0x40; 2126 2127 /* all BIT systems need p_f_m_t for digital_min_front_porch */ 2128 if (bios->is_mobile || bios->major_version >= 5) 2129 ret = parse_fp_mode_table(dev, bios); 2130 2131 /* allow subsequent scripts to execute */ 2132 bios->execute = true; 2133 2134 return 0; 2135} 2136 2137void 2138nouveau_bios_takedown(struct drm_device *dev) 2139{ 2140} 2141